公开(公告)号：US20160163870A1

公开(公告)日：2016-06-09

申请号：US14961016

申请日：2015-12-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daigo Ito ,  Takahisa ISHIYAMA ,  Kazuya HANAOKA

IPC: H01L29/786 ,  H01L21/02 ,  H01L21/467 ,  H01L29/66 ,  H01L21/4763

CPC classification number: H01L29/7869 ,  H01L21/02178 ,  H01L21/02266 ,  H01L21/0228 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/467 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/1248 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78696

Abstract: Provided is a semiconductor device which can suppress an increase in oxygen vacancies in an oxide semiconductor layer and a manufacturing method of the semiconductor device. The semiconductor device includes a first oxide semiconductor layer over the first insulating layer; a second oxide semiconductor layer over the first oxide semiconductor layer; a third oxide semiconductor layer over the second oxide semiconductor layer; a source electrode layer and a drain electrode layer each over the third oxide semiconductor layer; a fourth semiconductor layer over the source and drain electrode layers, and the third oxide semiconductor layer; a gate insulating layer over the fourth oxide semiconductor layer; a gate electrode layer over the gate electrode layer and overlapping with the source and drain electrode layers, and the fourth oxide semiconductor layer; and a second insulating layer over the first insulating layer, and the source, gate, and drain electrode layers.

Abstract translation: 提供一种能够抑制氧化物半导体层的氧空位增加的半导体装置及半导体装置的制造方法。 半导体器件包括在第一绝缘层上的第一氧化物半导体层; 在所述第一氧化物半导体层上的第二氧化物半导体层; 在所述第二氧化物半导体层上的第三氧化物半导体层; 每个在所述第三氧化物半导体层上的源电极层和漏电极层; 在源极和漏极电极层上的第四半导体层和第三氧化物半导体层; 在第四氧化物半导体层上的栅极绝缘层; 在栅电极层上方并与源电极层和漏电极层重叠的栅电极层和第四氧化物半导体层; 以及第一绝缘层上的第二绝缘层，以及源极，栅极和漏极电极层。

公开(公告)号：US09276125B2

公开(公告)日：2016-03-01

申请号：US14190370

申请日：2014-02-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Akihisa Shimomura ,  Tomoaki Moriwaka ,  Daigo Ito

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L29/66742 ,  H01L29/66969

Abstract: A miniaturized transistor having high electrical characteristics is provided with high yield. In a semiconductor device including the transistor, high performance, high reliability, and high productivity can be achieved. The semiconductor device includes a base insulating film, an oxide semiconductor film with a bottom surface and side surfaces in the base insulating film and a top surface exposed from the base insulating film, a source electrode and a drain electrode over the base insulating film and the oxide semiconductor film, a gate insulating film over the oxide semiconductor film, the source electrode, and the drain electrode, and a gate electrode over the gate insulating film and overlapping the oxide semiconductor film.

Abstract translation: 提供具有高电特性的小型化晶体管，其产率高。 在包括晶体管的半导体器件中，可以实现高性能，高可靠性和高生产率。 半导体器件包括基底绝缘膜，底表面的氧化物半导体膜和基底绝缘膜中的侧表面以及从基底绝缘膜暴露的顶表面，在基底绝缘膜上的源电极和漏电极以及 氧化物半导体膜，氧化物半导体膜上的栅极绝缘膜，源电极和漏电极以及栅极绝缘膜上的与电极半导体膜重叠的栅电极。

公开(公告)号：US09209267B2

公开(公告)日：2015-12-08

申请号：US14734492

申请日：2015-06-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daigo Ito ,  Yuichi Sato ,  Kosei Noda

IPC: H01L21/265 ,  H01L29/66 ,  H01L21/02 ,  H01L29/786

CPC classification number: H01L29/66477 ,  H01L21/02565 ,  H01L21/265 ,  H01L29/66969 ,  H01L29/7869

Abstract: An oxide semiconductor film is formed over a substrate. A sacrifice film is formed to such a thickness that the local maximum of the concentration distribution of an injected substance injected into the oxide semiconductor film in the depth direction of the oxide semiconductor film is located in a region from an interface between the substrate and the oxide semiconductor film to a surface of the oxide semiconductor film. Oxygen ions are injected as the injected substance into the oxide semiconductor film through the sacrifice film at such an acceleration voltage that the local maximum of the concentration distribution of the injected substance in the depth direction of the oxide semiconductor film is located in the region, and then the sacrifice film is removed. Further, a semiconductor device is manufactured using the oxide semiconductor film.

Abstract translation: 在基板上形成氧化物半导体膜。 牺牲膜形成为使得在氧化物半导体膜的深度方向上注入到氧化物半导体膜中的注入物质的浓度分布的局部最大值位于从衬底和氧化物之间的界面的区域中的局部最大值 半导体膜到氧化物半导体膜的表面。 将氧离子作为注入物质通过牺牲膜以这样的加速电压注入到氧化物半导体膜中，使得注入物质在氧化物半导体膜的深度方向上的浓度分布的局部最大值位于该区域中，以及 然后去除牺牲膜。 此外，使用氧化物半导体膜制造半导体器件。

公开(公告)号：US09076825B2

公开(公告)日：2015-07-07

申请号：US14162364

申请日：2014-01-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiaki Yamamoto ,  Koichi Ito ,  Motomu Kurata ,  Taiga Muraoka ,  Daigo Ito

IPC: H01L29/10 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L29/7869 ,  H01L29/78693 ,  H01L29/78696

Abstract: When an oxide semiconductor film is microfabricated to have an island shape, with the use of a hard mask, unevenness of an end portion of the oxide semiconductor film can be suppressed. Specifically, a hard mask is formed over the oxide semiconductor film, a resist is formed over the hard mask, light exposure is performed to form a resist mask, the hard mask is processed using the resist mask as a mask, the oxide semiconductor film is processed using the processed hard mask as a mask, the resist mask and the processed hard mask are removed, a source electrode and a drain electrode are formed in contact with the processed oxide semiconductor film, a gate insulating film is formed over the source electrode and the drain electrode, and a gate electrode is formed over the gate insulating film, the gate electrode overlapping with the oxide semiconductor film.

Abstract translation: 当氧化物半导体膜被微细化以具有岛状时，通过使用硬掩模，可以抑制氧化物半导体膜的端部的不均匀性。 具体地，在氧化物半导体膜上形成硬掩模，在硬掩模上形成抗蚀剂，进行曝光以形成抗蚀剂掩模，使用抗蚀剂掩模作为掩模来处理硬掩模，氧化物半导体膜为 使用处理后的硬掩模作为掩模处理，除去抗蚀剂掩模和加工的硬掩模，形成与处理的氧化物半导体膜接触的源电极和漏电极，在源极上形成栅极绝缘膜， 漏电极和栅电极形成在栅极绝缘膜上方，栅电极与氧化物半导体膜重叠。

公开(公告)号：US20150179747A1

公开(公告)日：2015-06-25

申请号：US14573463

申请日：2014-12-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daigo Ito ,  Kazuya Hanaoka

IPC: H01L29/417 ,  H01L29/786

CPC classification number: H01L29/41733 ,  H01L29/7869 ,  H01L29/78696

Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device includes a source electrode layer and a drain electrode layer which are electrically connected to an oxide semiconductor layer, a gate insulating film over the oxide semiconductor layer; the source electrode layer, and the drain electrode layer; and a gate electrode layer that overlaps with the oxide semiconductor layer, the source electrode layer, and the drain electrode layer with the gate insulating film positioned therebetween. The source electrode layer and the drain electrode layer each include a first conductive layer and a second conductive layer. The first conductive layer is in contact with a top surface of the oxide semiconductor layer. The second conductive layer is in contact with a side surface of the oxide semiconductor layer. The first conductive layer and the second conductive layer are electrically connected to each other.

Abstract translation: 提供了具有良好的电气特性的半导体器件。 半导体器件包括与氧化物半导体层电连接的源极电极层和漏极电极层，氧化物半导体层上的栅极绝缘膜; 源极电极层和漏极电极层; 以及栅极电极层，其与氧化物半导体层，源极电极层和漏极电极层重叠，栅极绝缘膜位于它们之间。 源极电极层和漏极电极层各自包括第一导电层和第二导电层。 第一导电层与氧化物半导体层的顶表面接触。 第二导电层与氧化物半导体层的侧表面接触。 第一导电层和第二导电层彼此电连接。

公开(公告)号：US10141452B2

公开(公告)日：2018-11-27

申请号：US15864033

申请日：2018-01-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daigo Ito ,  Daisuke Matsubayashi ,  Masaharu Nagai ,  Yoshiaki Yamamoto ,  Takashi Hamada ,  Yutaka Okazaki ,  Shinya Sasagawa ,  Motomu Kurata ,  Naoto Yamade

IPC: H01L29/786 ,  H01L21/46 ,  H01L27/12 ,  H01L29/66 ,  H01L21/425 ,  H01L29/423 ,  H01L29/49 ,  H01L29/78 ,  H01L29/24 ,  H01L29/778

Abstract: A semiconductor device includes a first insulating layer over a substrate, a first metal oxide layer over the first insulating layer, an oxide semiconductor layer over the first metal oxide layer, a second metal oxide layer over the oxide semiconductor layer, a gate insulating layer over the second metal oxide layer, a second insulating layer over the second metal oxide layer, and a gate electrode layer over the gate insulating layer. The gate insulating layer includes a region in contact with a side surface of the gate electrode layer. The second insulating layer includes a region in contact with the gate insulating layer. The oxide semiconductor layer includes first to third regions. The first region includes a region overlapping with the gate electrode layer. The second region, which is between the first and third regions, includes a region overlapping with the gate insulating layer or the second insulating layer. The second and third regions each include a region containing an element N (N is phosphorus, argon, or xenon).

公开(公告)号：US10020322B2

公开(公告)日：2018-07-10

申请号：US15390894

申请日：2016-12-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daigo Ito ,  Takahisa Ishiyama ,  Katsuaki Tochibayashi ,  Yoshinori Ando ,  Yasutaka Suzuki ,  Mitsuhiro Ichijo ,  Toshiya Endo ,  Shunpei Yamazaki

IPC: H01L29/10 ,  H01L27/12 ,  H01L29/49 ,  H01L29/786 ,  H01L29/778 ,  H01L29/24

CPC classification number: H01L27/1225 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L29/24 ,  H01L29/4908 ,  H01L29/7781 ,  H01L29/7782 ,  H01L29/7786 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2224/05 ,  H01L2224/48463

Abstract: A highly reliable semiconductor device which includes an oxide semiconductor is provided. Alternatively, a transistor having normally-off characteristics which includes an oxide semiconductor is provided. The transistor includes a first conductor, a first insulator, a second insulator, a third insulator, a first oxide, an oxide semiconductor, a second conductor, a second oxide, a fourth insulator, a third conductor, a fourth conductor, a fifth insulator, and a sixth insulator. The second conductor is separated from the sixth insulator by the second oxide. The third conductor and the fourth conductor are separated from the sixth insulator by the fifth insulator. The second oxide has a function of suppressing permeation of oxygen as long as oxygen contained in the sixth insulator is sufficiently supplied to the oxide semiconductor through the second oxide. The fifth insulator has a barrier property against oxygen.

公开(公告)号：US20140339547A1

公开(公告)日：2014-11-20

申请号：US14278705

申请日：2014-05-15

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Suguru HONDO ,  Daigo Ito

IPC: H01L29/786 ,  H01L23/31 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L23/3192 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78606 ,  H01L29/78609 ,  H01L29/78648 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A transistor with stable electric characteristics is provided. A transistor with small variation in electrical characteristics is provided. A miniaturized transistor is provided. A transistor having low off-state current is provided. A transistor having high on-state current is provided. A semiconductor device including the transistor is provided. One embodiment of the present invention is a semiconductor device including an island-shaped stack including a base insulating film and an oxide semiconductor film over the base insulating film; a protective insulating film facing a side surface of the stack and not facing a top surface of the stack; a first conductive film and a second conductive film which are provided over and in contact with the stack to be apart from each other; an insulating film over the stack, the first conductive film, and the second conductive film; and a third conductive film over the insulating film.

Abstract translation: 提供具有稳定电特性的晶体管。 提供了一种电特性变化小的晶体管。 提供了一种小型化的晶体管。 提供具有低截止电流的晶体管。 提供具有高导通电流的晶体管。 提供包括晶体管的半导体器件。 本发明的一个实施例是一种半导体器件，其包括在基底绝缘膜上的包括基底绝缘膜和氧化物半导体膜的岛状叠层; 面向堆叠的侧表面并且不面向堆叠的顶表面的保护性绝缘膜; 第一导电膜和第二导电膜，其设置在堆叠之间并与堆叠接触以彼此分开; 叠层上的绝缘膜，第一导电膜和第二导电膜; 和绝缘膜上的第三导电膜。

公开(公告)号：US20230178656A1

公开(公告)日：2023-06-08

申请号：US18102808

申请日：2023-01-30

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Yoshiyuki Kobayashi ,  Daisuke Matsubayashi ,  Akihisa Shimomura ,  Daigo Ito

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/423

CPC classification number: H01L29/7869 ,  H01L29/42376 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78645 ,  H01L29/78648 ,  H01L29/78693 ,  H01L29/78696

Abstract: To provide a semiconductor device in which a large current can flow. To provide a semiconductor device which can be driven stably at a high driving voltage. The semiconductor device includes a semiconductor layer, a first electrode and a second electrode electrically connected to the semiconductor layer and apart from each other in a region overlapping with the semiconductor layer, a first gate electrode and a second gate electrode with the semiconductor layer therebetween, a first gate insulating layer between the semiconductor layer and the first gate electrode, and a second gate insulating layer between the semiconductor layer and the second gate electrode. The first gate electrode overlaps with part of the first electrode, the semiconductor layer, and part of the second electrode. The second gate electrode overlaps with the semiconductor layer and part of the first electrode, and does not overlap with the second electrode.

公开(公告)号：US10685983B2

公开(公告)日：2020-06-16

申请号：US15794464

申请日：2017-10-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daigo Ito ,  Yutaka Okazaki ,  Takahisa Ishiyama

IPC: H01L27/12 ,  H01L27/115 ,  H01L29/786 ,  H01L27/11556

Abstract: To provide a semiconductor device capable of retaining data for a long time. The semiconductor device includes a first transistor, an insulator covering the first transistor, and a second transistor over the insulator. The first transistor includes a first gate electrode, a second gate electrode overlapping with the first gate electrode, and a semiconductor between the first gate electrode and the second gate electrode. The first gate electrode is electrically connected to one of a source and a drain of the second transistor.