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公开(公告)号：US08698160B2
公开(公告)日：2014-04-15
申请号：US13764320
申请日：2013-02-11
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Hisashi Ohtani
IPC: H01L29/04
CPC classification number: H01L33/16 , G02B5/30 , G02B27/017 , G02B27/0172 , G02B2027/0178 , G02F2001/13625 , G09G3/3225 , H01L27/12 , H01L27/124 , H01L29/4908 , H01L29/66757 , H01L29/78621 , H01L29/78627
Abstract: The object of the present invention is to form a low-concentration impurity region with good accuracy in a top gate type TFT. Phosphorus is added to a semiconductor layer by using a pattern made of a conductive film as a mask to form an N-type impurity region in a self-alignment manner. A positive photoresist is applied to a substrate so as to cover the pattern and then is exposed to light applied to the back of the substrate and then is developed, whereby a photoresist 110 is formed. The pattern is etched by using the photoresist pattern as an etching mask to form a gate electrode. A channel forming region, a source region, a drain region, and low-concentration impurity regions, are formed in the semiconductor layer in a self-alignment manner by using the gate electrode as a doping mask.
Abstract translation: 本发明的目的是在顶栅型TFT中形成具有高精度的低浓度杂质区。 通过使用由导电膜形成的图案作为掩模将磷添加到半导体层中，以自对准方式形成N型杂质区。 将正性光致抗蚀剂施加到基板上以覆盖图案，然后暴露于施加到基板背面的光，然后显影，由此形成光致抗蚀剂110。 通过使用光致抗蚀剂图案作为蚀刻掩模来蚀刻图案以形成栅电极。 通过使用栅极作为掺杂掩模，以自对准的方式在半导体层中形成沟道形成区域，源极区域，漏极区域和低浓度杂质区域。
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公开(公告)号：US20130285078A1
公开(公告)日：2013-10-31
申请号：US13848122
申请日：2013-03-21
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Hisashi Ohtani
IPC: H01L27/12
CPC classification number: H01L27/124 , G02F1/13454 , H01L27/1237 , H01L29/42384 , H01L29/4908 , H01L29/78621
Abstract: A semiconductor integrated circuit having a high withstand voltage TFT and a TFT which is capable of operating at high speed in a circuit of thin film transistors (TFT) and methods for fabricating such circuit will be provided. A gate insulating film of the TFT required to operate at high speed (e.g., TFT used for a logic circuit) is relatively thinned less than a gate insulating film of the TFT which is required to have high withstand voltage (e.g., TFT used for switching high voltage signals).
Abstract translation: 将提供一种具有高耐压TFT和能够在薄膜晶体管（TFT）的电路中高速运行的TFT的半导体集成电路及其制造方法。 TFT需要高速操作所需的栅极绝缘膜（例如，用于逻辑电路的TFT）比要求具有高耐压的TFT的栅极绝缘膜（例如用于开关的TFT）要薄 高压信号）。
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公开(公告)号：US20130270570A1
公开(公告)日：2013-10-17
申请号：US13764320
申请日：2013-02-11
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Hisashi Ohtani
IPC: H01L33/16
CPC classification number: H01L33/16 , G02B5/30 , G02B27/017 , G02B27/0172 , G02B2027/0178 , G02F2001/13625 , G09G3/3225 , H01L27/12 , H01L27/124 , H01L29/4908 , H01L29/66757 , H01L29/78621 , H01L29/78627
Abstract: The object of the present invention is to form a low-concentration impurity region with good accuracy in a top gate type TFT. Phosphorus is added to a semiconductor layer by using a pattern made of a conductive film as a mask to form an N-type impurity region in a self-alignment manner. A positive photoresist is applied to a substrate so as to cover the pattern and then is exposed to light applied to the back of the substrate and then is developed, whereby a photoresist 110 is formed. The pattern is etched by using the photoresist pattern as an etching mask to forma gate electrode. A channel forming region, a source region, a drain region, and low-concentration impurity regions, are formed in the semiconductor layer in a self-alignment manner by using the gate electrode as a doping mask.
Abstract translation: 本发明的目的是在顶栅型TFT中形成具有高精度的低浓度杂质区。 通过使用由导电膜形成的图案作为掩模将磷添加到半导体层中，以自对准方式形成N型杂质区。 将正性光致抗蚀剂施加到基板上以覆盖图案，然后暴露于施加到基板背面的光，然后显影，由此形成光致抗蚀剂110。 通过使用光致抗蚀剂图案作为蚀刻掩模来蚀刻图案以形成栅电极。 通过使用栅极作为掺杂掩模，以自对准的方式在半导体层中形成沟道形成区域，源极区域，漏极区域和低浓度杂质区域。
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公开(公告)号：US20130134401A1
公开(公告)日：2013-05-30
申请号：US13731129
申请日：2012-12-31
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Satoshi MURAKAMI , Hisashi Ohtani , Shunpei Yamazaki
IPC: H01L51/52
CPC classification number: H01L51/5246 , H01L27/3225 , H01L27/3244 , H01L27/3246 , H01L27/3276 , H01L27/3295 , H01L27/3297 , H01L51/0005 , H01L51/5203 , H01L51/5237 , H01L51/525 , H01L51/5253 , H01L51/56 , H01L2251/5323
Abstract: It is an object of the present invention to provide a technology for manufacturing a highly reliable display device at a low cost with high yield. In the present invention, a spacer is formed over a pixel electrode, thereby protecting the pixel electrode layer from a mask in formation of an electroluminescent layer. In addition, since a layer that includes an organic material that has water permeability is sealed in a display device with a sealing material and the sealing material and the layer that includes the organic material are not in contact, deterioration of a light-emitting element due to a contaminant such as water can be prevented. The sealing material is formed in a portion of a driver circuit region in the display device, and thus, the narrower frame margin of the display device can also be accomplished.
Abstract translation: 本发明的目的是提供一种以高成本低成本制造高度可靠的显示装置的技术。 在本发明中，在像素电极上形成间隔物，从而在形成电致发光层时保护像素电极层免受掩模的影响。 此外，由于包含具有透水性的有机材料的层被密封在具有密封材料的显示装置中，并且密封材料和包含有机材料的层不接触，所以发光元件的劣化由于 可以防止诸如水的污染物。 密封材料形成在显示装置中的驱动电路区域的一部分中，因此也可以实现显示装置的较窄的边缘。
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公开(公告)号：US09508619B2
公开(公告)日：2016-11-29
申请号：US13912309
申请日：2013-06-07
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Tomoyuki Aoki , Takuya Tsurume , Hiroki Adachi , Nozomi Horikoshi , Hisashi Ohtani
IPC: G06K19/067 , H01L23/29 , G06K19/077 , H01L23/31 , H01L23/60 , H01L23/66 , H01L27/12 , H01L27/13 , H01L21/56 , H01L23/14
CPC classification number: H01L23/29 , G06K19/07749 , H01L21/563 , H01L23/145 , H01L23/295 , H01L23/3121 , H01L23/60 , H01L23/66 , H01L27/1214 , H01L27/1266 , H01L27/13 , H01L2223/6677 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2924/09701 , H01L2924/12032 , H01L2924/12044 , H01L2924/19041 , H01L2924/3025 , Y10T428/31522 , H01L2924/00
Abstract: A separation layer and a semiconductor element layer including a thin film transistor are formed. A conductive resin electrically connected to the semiconductor element layer is formed. A first sealing layer including a fiber and an organic resin layer is formed over the semiconductor element layer and the conductive resin. A groove is formed in the first sealing layer, the semiconductor element layer, and the separation layer. A liquid is dropped into the groove to separate the separation layer and the semiconductor element layer. The first sealing layer over the conductive resin is removed to form an opening. A set of the first sealing layer and the semiconductor element layer is divided into a chip. The chip is bonded to an antenna formed over a base material. A second sealing layer including a fiber and an organic resin layer is formed so as to cover the antenna and the chip.
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Patent Agency Ranking
公开(公告)号：US09502440B2
公开(公告)日：2016-11-22
申请号：US14983822
申请日：2015-12-30
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Masataka Nakada , Hidenori Mori , Hisashi Ohtani
IPC: G02F1/136 , H01L27/12 , G02F1/1335 , G02F1/1343 , G02F1/1333 , G02F1/1368 , H01L29/417 , H01L29/786 , G02F1/1362
CPC classification number: H01L27/124 , G02F1/133345 , G02F1/133553 , G02F1/13439 , G02F1/1368 , G02F2001/136218 , H01L29/41733 , H01L29/78618
Abstract: A novel display device capable of excellent reflective display is provided. The display device includes a transistor including a gate electrode layer, a gate insulating layer over the gate electrode layer, a semiconductor layer over the gate insulating layer, and a source electrode layer and a drain electrode layer over the gate insulating layer and the semiconductor layer; a reflective electrode layer on the same plane as the source electrode layer and the drain electrode layer; a coloring layer overlapping with the reflective electrode layer; a pixel electrode layer overlapping with the coloring layer; and an anti-oxidation conductive layer connected to one of the source electrode layer and the drain electrode layer. The pixel electrode layer is connected to the transistor through the anti-oxidation conductive layer.
Abstract translation: 提供能够出色的反射显示的新颖的显示装置。 显示装置包括晶体管，其包括栅极电极层，栅极电极层上的栅极绝缘层，栅极绝缘层上的半导体层以及栅极绝缘层和半导体层上的源电极层和漏电极层 ; 与源电极层和漏电极层在同一平面上的反射电极层; 着色层与反射电极层重叠; 与着色层重叠的像素电极层; 以及连接到源极电极层和漏极电极层之一的抗氧化导电层。 像素电极层通过抗氧化导电层与晶体管连接。
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公开(公告)号：US09412060B2
公开(公告)日：2016-08-09
申请号：US14500343
申请日：2014-09-29
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shunpei Yamazaki , Jun Koyama , Kiyoshi Kato , Takaaki Koen , Yuto Yakubo , Makoto Yanagisawa , Hisashi Ohtani , Eiji Sugiyama , Nozomi Horikoshi
IPC: H01L39/00 , G06K19/077 , H01L23/29 , H01L23/31
CPC classification number: G06K19/07735 , G06K19/07722 , G06K19/07794 , H01L23/295 , H01L23/3157 , H01L2924/0002 , H01L2924/09701 , H01L2924/12044 , H01L2924/19041 , H01L2924/3011 , H01L2924/3025 , H01L2924/00
Abstract: A semiconductor device capable of wireless communication, which has high reliability in terms of resistance to external force, in particular, pressing force and can prevent electrostatic discharge in an integrated circuit without preventing reception of an electric wave. The semiconductor device includes an on-chip antenna connected to the integrated circuit and a booster antenna which transmits a signal or power included in a received electric wave to the on-chip antenna without contact. In the semiconductor device, the integrated circuit and the on-chip antenna are interposed between a pair of structure bodies formed by impregnating a fiber body with a resin. One of the structure bodies is provided between the on-chip antenna and the booster antenna. A conductive film having a surface resistance value of approximately 106 to 1014 Ω/cm2 is formed on at least one surface of each structure body.
Abstract translation: 一种能够进行无线通信的半导体装置，其在外力方面具有高的可靠性，特别是按压力，并且能够防止集成电路中的静电放电，而不会妨碍电波的接收。 半导体器件包括连接到集成电路的片上天线和将接收到的电波中包含的信号或功率发送到片上天线而不接触的增强天线。 在半导体器件中，集成电路和片上天线插入通过用树脂浸渍纤维体而形成的一对结构体之间。 其中一个结构体设置在片上天线和增强天线之间。 在每个结构体的至少一个表面上形成表面电阻值为大约106至1014Ω/ cm2的导电膜。
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公开(公告)号：US09281495B2
公开(公告)日：2016-03-08
申请号：US13731129
申请日：2012-12-31
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Satoshi Murakami , Hisashi Ohtani , Shunpei Yamazaki
Abstract: It is an object of the present invention to provide a technology for manufacturing a highly reliable display device at a low cost with high yield. In the present invention, a spacer is formed over a pixel electrode, thereby protecting the pixel electrode layer from a mask in formation of an electroluminescent layer. In addition, since a layer that includes an organic material that has water permeability is sealed in a display device with a sealing material and the sealing material and the layer that includes the organic material are not in contact, deterioration of a light-emitting element due to a contaminant such as water can be prevented. The sealing material is formed in a portion of a driver circuit region in the display device, and thus, the narrower frame margin of the display device can also be accomplished.
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公开(公告)号：US09245907B2
公开(公告)日：2016-01-26
申请号：US14217585
申请日：2014-03-18
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Masataka Nakada , Hidenori Mori , Hisashi Ohtani
IPC: G02F1/136 , H01L27/12 , G02F1/1335 , G02F1/1343 , G02F1/1362
CPC classification number: H01L27/124 , G02F1/133345 , G02F1/133553 , G02F1/13439 , G02F1/1368 , G02F2001/136218 , H01L29/41733 , H01L29/78618
Abstract: A novel display device capable of excellent reflective display is provided. The display device includes a transistor including a gate electrode layer, a gate insulating layer over the gate electrode layer, a semiconductor layer over the gate insulating layer, and a source electrode layer and a drain electrode layer over the gate insulating layer and the semiconductor layer; a reflective electrode layer on the same plane as the source electrode layer and the drain electrode layer; a coloring layer overlapping with the reflective electrode layer; a pixel electrode layer overlapping with the coloring layer; and an anti-oxidation conductive layer connected to one of the source electrode layer and the drain electrode layer. The pixel electrode layer is connected to the transistor through the anti-oxidation conductive layer.
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公开(公告)号：US20140327020A1
公开(公告)日：2014-11-06
申请号：US14337305
申请日：2014-07-22
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Hisashi Ohtani
CPC classification number: H01L27/156 , H01L33/62 , H05B33/0821 , H05B33/0857 , H05B33/145
Abstract: It is an object of the invention to provide a light emitting device in which burden on a light emitting element having low luminous efficiency is relieved, and the deterioration of a light emitting element, the reduction in color reproduction due to the deteriorated light emitting element, and increase in electric power consumption can be suppressed. A light emitting device according to the invention has light emitting elements each of which emits one of colors corresponding to three primary colors. Further, one feature of the light emitting device according to the invention has a light emitting element which emits a neutral color. The light emitting device according to the invention has a structure in which a plurality of pixels having light emitting elements each of which emits one of colors corresponding to three primary colors, and a light emitting element which emits a neutral color as one group, are arranged.
Abstract translation: 本发明的目的是提供一种发光装置，其中减轻了发光效率低的发光元件的负担，并且发光元件的劣化，由于劣化的发光元件引起的色彩再现的减少， 并且可以抑制电力消耗的增加。 根据本发明的发光器件具有发光元件，每个发光元件发射对应于三原色的一种颜色。 此外，根据本发明的发光器件的一个特征是具有发出中性色的发光元件。 根据本发明的发光器件具有这样的结构，其中，具有发光元件的多个像素发出与三原色对应的颜色，并且发射中性色的发光元件作为一个组， 。
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