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    HEAT RADIATING MEMBER AND ELECTRONIC DEVICE INCLUDING SAME
    11.
    发明申请
    HEAT RADIATING MEMBER AND ELECTRONIC DEVICE INCLUDING SAME 有权

    公开(公告)号：US20230008679A1

    公开(公告)日：2023-01-12

    申请号：US17862205

    申请日：2022-07-11

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Yunjeong PARK ,  Kyungha KOO ,  Dongku KANG ,  Jihong KIM ,  Haein CHUNG

    IPC: G06F1/20 ,  H05K7/20 ,  G02B27/01

    Abstract: Various embodiments of the disclosure relate to a heat radiating structure and an electronic device including the same. According to various embodiments of the disclosure, it is possible to provide an electronic device including: a housing including a first surface facing a first direction, a second surface facing a second direction opposite to the first direction, and a third surface enclosing an internal space between the first surface and the second surface, wherein at least one portion of the third surface faces a third direction different from the first direction and the second direction, wherein a first opening is formed in the first surface, and a second opening is formed in the third surface; a substrate disposed in the internal space; an electronic component disposed on at least one surface of the substrate; and a mesh member disposed in the internal space and disposed adjacent to the first opening and the second opening.

    STORAGE DEVICE FOR PROVIDING EVENT DATA AND OPERATION METHOD OF STORAGE DEVICE
    14.
    发明公开
    STORAGE DEVICE FOR PROVIDING EVENT DATA AND OPERATION METHOD OF STORAGE DEVICE 审中-公开

    公开(公告)号：US20240232010A9

    公开(公告)日：2024-07-11

    申请号：US18195607

    申请日：2023-05-10

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jihong KIM ,  Yongkoo JEONG ,  Jooyoung KIM

    IPC: G06F11/10 ,  G06F11/07

    CPC classification number: G06F11/1068 ,  G06F11/0772 ,  G06F11/0784

    Abstract: A storage device includes a non-volatile memory device that includes memory blocks each including one or more memory cells, a combo integrated circuit (IC) that includes a temperature sensor and a memory, and a controller that is connected with the combo IC through first channels and controls the non-volatile memory device to write or read data in or from selected memory cells. When the controller determines that a first event occurs based on temperature data read from the combo IC, the controller records first event data in the memory of the combo IC. In a first operation mode, the combo IC outputs the first event data to the controller through the first channels. In a second operation mode, under control of an external host, the combo IC outputs the first event data to the external host through second channels different from the first channels.

    STORAGE DEVICE FOR PROVIDING EVENT DATA AND OPERATION METHOD OF STORAGE DEVICE
    15.
    发明公开
    STORAGE DEVICE FOR PROVIDING EVENT DATA AND OPERATION METHOD OF STORAGE DEVICE 审中-公开

    公开(公告)号：US20240134745A1

    公开(公告)日：2024-04-25

    申请号：US18195607

    申请日：2023-05-09

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jihong KIM ,  Yongkoo JEONG ,  Jooyoung KIM

    IPC: G06F11/10 ,  G06F11/07

    CPC classification number: G06F11/1068 ,  G06F11/0772 ,  G06F11/0784

    Abstract: A storage device includes a non-volatile memory device that includes memory blocks each including one or more memory cells, a combo integrated circuit (IC) that includes a temperature sensor and a memory, and a controller that is connected with the combo IC through first channels and controls the non-volatile memory device to write or read data in or from selected memory cells. When the controller determines that a first event occurs based on temperature data read from the combo IC, the controller records first event data in the memory of the combo IC. In a first operation mode, the combo IC outputs the first event data to the controller through the first channels. In a second operation mode, under control of an external host, the combo IC outputs the first event data to the external host through second channels different from the first channels.

    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
    17.
    发明公开
    METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开

    公开(公告)号：US20230180475A1

    公开(公告)日：2023-06-08

    申请号：US17894524

    申请日：2022-08-24

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyunmook CHOI ,  Jihong KIM ,  Kyoungcho NA

    IPC: H01L27/11582 ,  H01L27/11556 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11565 ,  H01L27/1157 ,  G11C16/14

    CPC classification number: H01L27/11582 ,  H01L27/11556 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11565 ,  H01L27/1157 ,  G11C16/14

    Abstract: A method for manufacturing a semiconductor device including forming a first substrate and a second substrate thereon; forming a first stack region by alternately stacking first interlayer insulating and sacrificial layers on the second substrate; forming a second stack region by alternately stacking second interlayer insulating and sacrificial layers on the first stack region; forming first openings spaced apart from each other in the first direction by partially removing the second stack region; forming a first filling insulating layer in the first openings; forming a second opening by partially removing the second stack region between the first openings; removing the second sacrificial layers exposed through the second opening; forming a lower separation region including the first filling insulating layer and a second filling insulating layer, by forming the second filling insulating layer in the second opening and regions in which the second sacrificial layers have been removed.

    SEMICONDUCTOR DEVICE INCLUDING BLOCKING PATTERN, ELECTRONIC SYSTEM, AND METHOD OF FORMING THE SAME
    19.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING BLOCKING PATTERN, ELECTRONIC SYSTEM, AND METHOD OF FORMING THE SAME 有权

    公开(公告)号：US20230077589A1

    公开(公告)日：2023-03-16

    申请号：US17679863

    申请日：2022-02-24

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyunmook CHOI ,  Jooheon KANG ,  Sanghoon KIM ,  Jihong KIM

    IPC: H01L27/24

    Abstract: A semiconductor device includes a horizontal wiring layer on a substrate, a stack structure disposed on the horizontal wiring layer and including insulating layers and electrode layers alternately stacked on each other, and a pillar structure extending into the horizontal wiring layer and extending through the stack structure. The electrode layers include one or a plurality of selection lines adjacent to an uppermost end of the stack structure, and word lines surrounding the stack structure below the one or plurality of selection lines. The pillar structure includes a variable resistive layer, a channel layer between the variable resistive layer and the stack structure, a gate dielectric layer between the channel layer and the stack structure, and a blocking pattern disposed between the variable resistive layer and the channel layer and being adjacent to a first selection line among the one or plurality of selection lines.

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