公开(公告)号：US09252784B2

公开(公告)日：2016-02-02

申请号：US14488884

申请日：2014-09-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joon-Hee Lee ,  Jong-Won Choi ,  Young-Taek Lee ,  Byung-Hak Cho ,  Young-Gun Pu

IPC: H03L5/00 ,  H03L7/093 ,  H03B5/08 ,  H03L7/00 ,  H03L7/099

CPC classification number: H03L5/00 ,  H03B5/08 ,  H03L7/00 ,  H03L7/093 ,  H03L7/099

Abstract: An electronic device and a method for control of an output amplitude of a Voltage Control Oscillator (VCO) in the electronic device is provided. The electronic device includes a first circuit configured to output a frequency signal corresponding to a control voltage, and a second circuit configured to generate control bits that control an amplitude of the frequency signal based on a comparison result between a peak voltage of the frequency signal and a reference voltage of the frequency signal.

Abstract translation: 提供了一种用于控制电子设备中的电压控制振荡器（VCO）的输出幅度的电子设备和方法。 电子设备包括：第一电路，被配置为输出对应于控制电压的频率信号，以及第二电路，被配置为基于频率信号的峰值电压与频率信号的峰值电压之间的比较结果来生成控制频率信号的幅度的控制位; 频率信号的参考电压。

公开(公告)号：US10770473B2

公开(公告)日：2020-09-08

申请号：US16122037

申请日：2018-09-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Yun Lee ,  Jae-Hoon Jang ,  Jae-Duk Lee ,  Joon-Hee Lee ,  Young-Jin Jung

IPC: H01L27/11556 ,  H01L27/11582 ,  H01L21/768 ,  H01L21/308 ,  H01L21/28 ,  H01L27/11565

Abstract: A vertical type semiconductor device includes insulation patterns on a substrate and spaced apart from each other in a first direction perpendicular to a top surface of the substrate, a channel structure on the substrate and penetrating through the insulation patterns, a first conductive pattern partially filling a gap between the insulation patterns adjacent to each other in the first direction and the channel structure and having a slit in a surface thereof, the slit extending in a direction parallel with the top surface of the substrate, and a second conductive pattern on the first conductive pattern in the gap and filling the slit.

公开(公告)号：US20200022091A1

公开(公告)日：2020-01-16

申请号：US16502937

申请日：2019-07-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-Hyuk Jang ,  Jung-Woo Kim ,  Chul-Ho Kim ,  Joon-Hee Lee ,  Sang-Wook Han

IPC: H04W52/24 ,  H04B1/40

Abstract: In an operating method of a radio frequency integrated circuit (RFIC) including a transmission circuit and a reception circuit, the operating method includes receiving, from a modem, first information for setting transmission power of the transmission circuit or second information about a blocker which is a frequency signal unused by the RFIC, obtaining an allowable value of phase noise of a local oscillator included in the transmission circuit, using the first information, obtaining an allowable value of phase noise of a local oscillator included in the reception circuit, using the second information, determining a level of a driving voltage, using the obtained allowable values of the phase noises, and providing the driving voltage to the local oscillators.

公开(公告)号：US09762220B2

公开(公告)日：2017-09-12

申请号：US14974333

申请日：2015-12-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Wook Han ,  Sung-Jun Lee ,  Joon-Hee Lee ,  Jong-Won Choi

IPC: H03K3/03 ,  H03K7/08 ,  H03K5/131 ,  H03L7/083 ,  H03L7/181 ,  H03L7/10 ,  H03L7/197 ,  H03K5/00

CPC classification number: H03K5/131 ,  H03K2005/00071 ,  H03K2005/00273 ,  H03L7/083 ,  H03L7/102 ,  H03L7/181 ,  H03L7/1974 ,  H03L2207/06

Abstract: A voltage controlled oscillator (VCO) in a frequency synthesizer generates an output signal having a target frequency by being coarse tuned in accordance with a channel code derived through a binary tree search. Thereafter, the output signal of the VCO may be further tuned using a phase lock loop (PLL) circuit. Each stage of the binary tree search includes a comparison step that determines a channel code bit, and another step that confirms that the channel code converges to a final channel code within an established stage range value.

公开(公告)号：US08884377B2

公开(公告)日：2014-11-11

申请号：US13769493

申请日：2013-02-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sok-Won Lee ,  Joon-Hee Lee ,  Jung-Dal Choi ,  Seong-Min Jo

IPC: H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119 ,  H01L21/033 ,  H01L27/115 ,  H01L21/764 ,  H01L23/52 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/3213

CPC classification number: H01L23/4821 ,  H01L21/0337 ,  H01L21/32139 ,  H01L21/764 ,  H01L21/768 ,  H01L21/7682 ,  H01L21/76837 ,  H01L21/76838 ,  H01L21/76885 ,  H01L21/76895 ,  H01L23/4827 ,  H01L23/52 ,  H01L23/5222 ,  H01L23/528 ,  H01L23/53295 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11565 ,  H01L27/1157 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In one embodiment, first and second pattern structures respectively include first and second conductive line patterns and first and second hard masks sequentially stacked, and at least portions thereof extends in a first direction. The insulation layer patterns contact end portions of the first and second pattern structures. The first pattern structure and a first insulation layer pattern of the insulation layer patterns form a first closed curve shape in plan view, and the second pattern structure and a second insulation layer pattern of the insulation layer patterns form a second closed curve shape in plan view. The insulating interlayer covers upper portions of the first and second pattern structures and the insulation layer patterns, a first air gap between the first and second pattern structures, and a second air gap between the insulation layer patterns.

Abstract translation: 在一个实施例中，第一和第二图案结构分别包括第一和第二导线图案以及顺序堆叠的第一和第二硬掩模，并且其至少部分沿第一方向延伸。 绝缘层图案接触第一和第二图案结构的端部。 绝缘层图案的第一图案结构和第一绝缘层图案在平面图中形成第一闭合曲线形状，并且绝缘层图案的第二图案结构和第二绝缘层图案在平面图中形成第二闭合曲线形状 。 绝缘中间层覆盖第一和第二图案结构的上部和绝缘层图案，第一和第二图案结构之间的第一气隙，以及绝缘层图案之间的第二气隙。