METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE

    公开(公告)号:US20190164776A1

    公开(公告)日:2019-05-30

    申请号:US16123262

    申请日:2018-09-06

    Abstract: A method of manufacturing a semiconductor device, the method including forming dummy gate structures on a substrate; forming spacers on sidewalls of the dummy gate structures; forming a preliminary first interlayer insulation pattern to fill a gap between adjacent spacers; etching an upper portion of the preliminary first interlayer insulation pattern through a first etching process to form a preliminary second interlayer insulation pattern; implanting an ion on the dummy gate structures, the spacers, and the preliminary second interlayer insulation pattern through an ion-implanting process; etching an upper portion of the preliminary second interlayer insulation pattern through a second etching process to form an interlayer insulation pattern having a flat upper surface; and forming a capping pattern on the interlayer insulation pattern to fill a gap between the spacers.

    SUBSTRATE STRUCTURE AND SEMICONDUCTOR DEVICE ON THE SUBSTRATE STRUCTURE
    18.
    发明申请
    SUBSTRATE STRUCTURE AND SEMICONDUCTOR DEVICE ON THE SUBSTRATE STRUCTURE 审中-公开
    基板结构和半导体器件在基板结构上的应用

    公开(公告)号:US20150340445A1

    公开(公告)日:2015-11-26

    申请号:US14645888

    申请日:2015-03-12

    Abstract: A substrate structure include a lower substrate doped with n-type impurities having a first impurity concentration, an epitaxial layer on the lower substrate, and a metallic-contaminant collection area spaced apart from the epitaxial layer in the lower substrate, the metallic-contaminant collection area doped with impurities having a second impurity concentration higher than the first impurity concentration, the metallic-contaminant collection area having lattice defects, and an upper surface of the metallic-contaminant collection area being spaced apart from a top surface of the lower substrate at a distance in a range of about 0.1 μm to about 3 μm.

    Abstract translation: 衬底结构包括掺杂有具有第一杂质浓度的n型杂质的下衬底,下衬底上的外延层和与下衬底中的外延层间隔开的金属污染物收集区域,金属污染物收集 掺杂有第二杂质浓度高于第一杂质浓度的杂质的区域,金属污染物收集区域具有晶格缺陷,并且金属污染物收集区域的上表面与下基板的顶表面间隔开 在约0.1μm至约3μm的范围内的距离。

    FABRICATING METHOD OF SEMICONDUCTOR DEVICE
    19.
    发明申请
    FABRICATING METHOD OF SEMICONDUCTOR DEVICE 审中-公开
    半导体器件制造方法

    公开(公告)号:US20140357062A1

    公开(公告)日:2014-12-04

    申请号:US14290171

    申请日:2014-05-29

    Abstract: A method of fabricating a semiconductor device, the method including forming a trench on a substrate; forming an insulating layer pattern within the trench; depositing an amorphous material on the substrate and the insulating layer pattern; planarizing the amorphous material; removing a portion of the amorphous material, the removed portion of the amorphous material being on an area of the substrate where the trench has been formed; crystallizing remaining portions of the amorphous material into a single crystal material; and planarizing the single crystal material.

    Abstract translation: 一种制造半导体器件的方法,所述方法包括在衬底上形成沟槽; 在沟槽内形成绝缘层图案; 在基板和绝缘层图案上沉积非晶材料; 平面化无定形材料; 去除所述非晶材料的一部分,所述非晶材料的去除部分位于已经形成所述沟槽的所述衬底的区域上; 将所述无定形材料的剩余部分结晶成单晶材料; 并平面化单晶材料。

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