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公开(公告)号:US12159911B2
公开(公告)日:2024-12-03
申请号:US17552446
申请日:2021-12-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Gyeom Kim , Jinbum Kim , Dongwoo Kim , Dongsuk Shin , Sangmoon Lee , Seung Hun Lee
IPC: H01L29/41 , H01L21/02 , H01L27/092 , H01L29/06 , H01L29/40 , H01L29/417 , H01L29/423 , H01L29/66 , H01L29/78 , H01L29/786
Abstract: A semiconductor device includes a substrate including an active pattern, a channel pattern and a source/drain pattern on the active pattern, a gate electrode provided on the channel pattern and extended in a first direction, and an active contact coupled to the source/drain pattern. The active contact includes a buried portion buried in the source/drain pattern and a contact portion on the buried portion. The buried portion includes an expansion portion provided in a lower portion of the source/drain pattern and a vertical extension portion connecting the contact portion to the expansion portion.
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公开(公告)号:US12080797B2
公开(公告)日:2024-09-03
申请号:US17467656
申请日:2021-09-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dohyun Lee , Dongwoo Kim , Daeyong Kim , Rakhwan Kim
IPC: H01L29/78 , H01L29/08 , H01L29/10 , H01L29/417 , H01L29/66
CPC classification number: H01L29/7851 , H01L29/0847 , H01L29/1033 , H01L29/41791 , H01L29/66553
Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes an active region, a plurality of channel layers, gate electrodes, a source/drain region, and a contact structure. The active region is disposed on a substrate and extends in a first direction. The plurality of channel layers are disposed on the active region to be spaced apart from each other vertically. The gate electrodes are disposed on the substrate, intersecting the active region and the plurality of channel layers, extending in a third direction, and surrounding the plurality of channel layers. The source/drain region is disposed on the active region on at least one side of the gate electrodes, and contacting the plurality of channel layers. The contact structure is disposed between the gate electrodes, extending in the second direction, and contacting the source/drain region.
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公开(公告)号:US11614600B2
公开(公告)日:2023-03-28
申请号:US16765286
申请日:2018-12-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dongwoo Kim
Abstract: Disclosed are an optical lens assembly and an electronic device including the same.
The disclosed optical lens assembly may include a first lens, a second lens, a third lens, a fourth lens, a fifth lens, a sixth lens, and a seventh lens arranged from an object side to an image side, the first lens may have a negative refractive power, an object side surface or an image side surface of the seventh lens may include an aspherical shape that is convex toward the object side in a region near an optical axis and is concave toward the object side in a peripheral region, and the optical lens assembly may have a field of view ranging from 120° to 200°.-
公开(公告)号:US11380541B2
公开(公告)日:2022-07-05
申请号:US17006799
申请日:2020-08-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Gyeom Kim , Dongwoo Kim , Jihye Yi , JinBum Kim , Sangmoon Lee , Seunghun Lee
IPC: H01L21/02 , H01L21/285 , H01L21/768 , H01L21/8234 , H01L29/08 , H01L29/165 , H01L29/417 , H01L29/66 , H01L23/532 , H01L23/485 , H01L29/10 , H01L29/06 , B82Y10/00 , H01L29/423 , H01L29/775 , H01L29/78 , H01L21/28
Abstract: A semiconductor device is provided. The semiconductor device includes: an active region on a semiconductor substrate; a channel region on the active region; a source/drain region adjacent to the channel region on the active region; a gate structure overlapping the channel region, on the channel region; a contact structure on the source/drain region; a gate spacer between the contact structure and the gate structure; and a contact spacer surrounding a side surface of the contact structure. The source/drain region includes a first epitaxial region having a recessed surface and a second epitaxial region on the recessed surface of the first epitaxial region, and the second epitaxial region includes an extended portion, extended from a portion overlapping the contact structure in a vertical direction, in a horizontal direction and overlapping the contact spacer in the vertical direction.
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15.
公开(公告)号:US11114398B2
公开(公告)日:2021-09-07
申请号:US16848194
申请日:2020-04-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dongwoo Kim , Hyukwoo Kwon , Seongmin Choo , Byoungdeog Choi
IPC: H01L23/00
Abstract: An integrated circuit (IC) device includes a lower electrode formed on a substrate, and an upper support structure disposed around the lower electrode and supporting the lower electrode. The upper support structure includes an upper support pattern surrounding the lower electrode and extending in a lateral direction parallel to the substrate, the upper support pattern having a hole through which the lower electrode passes, and an upper spacer support pattern between the upper support pattern and the lower electrode inside the hole and having an outer sidewall in contact with the upper support pattern and an inner sidewall in contact with the lower electrode, wherein a width of the upper spacer support pattern in the lateral direction decreases in a direction toward the substrate. To manufacture an IC device, an upper support pattern is formed on a substrate. An upper spacer support film is formed to cover a sidewall and a top surface of the upper support pattern. A plurality of lower electrodes are formed inside a plurality of holes formed in the upper support pattern. Portions of the upper spacer support film are removed to form a plurality of upper spacer support patterns between the upper support pattern and the lower electrodes, respectively.
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公开(公告)号:US20170244688A1
公开(公告)日:2017-08-24
申请号:US15519508
申请日:2015-10-15
Applicant: Samsung Electronics Co., Ltd
Inventor: Jaehwan Kim , Junghun Kim , Jinwoo Lee , Yongjoon Jeon , Bokun Choi , Jongmu Choi , Dongeup Ham , Dongwoo Kim , Sangmi Park
IPC: H04L29/06
CPC classification number: H04L63/062 , G06F21/31 , G06F21/6218 , G06F2221/2115 , H04L63/08 , H04L63/0861 , H04L63/107
Abstract: In an authentication method according to an embodiment, an electronic device receives an authentication request message based on identification information from a server apparatus. In response to the authentication request message, the electronic device receives at least one of an input for authentication approval of a specific device and an input for authentication approval of a service offered through the specific device. Then, in response to the input, the electronic device transmits authentication approval information to the server apparatus.
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17.
公开(公告)号:US12082412B2
公开(公告)日:2024-09-03
申请号:US17154159
申请日:2021-01-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Ju-Young Lim , Jongsoo Kim , Jesuk Moon , Dongwoo Kim , Sunil Shim , Wonseok Cho
CPC classification number: H10B43/27 , H01L23/5226 , H10B41/10 , H10B41/27 , H10B41/40 , H10B43/10 , H10B43/40
Abstract: A three-dimensional semiconductor memory device includes a substrate including a cell array region and a connection region, an electrode structure including electrodes vertically stacked on the substrate, the electrodes including pad portions on the connection region, respectively, and the pad portions of the electrodes being stacked in a staircase structure, first vertical structures penetrating the electrode structure on the cell array region, and second vertical structures penetrating the electrode structure on the connection region, each of the second vertical structures including first parts spaced apart from each other in a first direction, and at least one second part connecting the first parts to each other, the at least one second part penetrating sidewalls of the pad portions, respectively.
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公开(公告)号:US11570831B2
公开(公告)日:2023-01-31
申请号:US16934396
申请日:2020-07-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dongwoo Kim , Hyunchul Lee , Sungjun Kim
Abstract: An electronic device is provided. The electronic device includes: wireless communication circuitry, at least one processor operatively connected with the wireless communication circuitry, and a memory operatively connected with the at least one processor. The memory stores instructions which, when executed, cause the at least one processor to control the electronic device to: identify a state of the electronic device, receive a system information block (SIB) from a first base station supporting a first cellular network via the wireless communication circuitry, identify whether a network to which the electronic device belongs supports dual connectivity (DC) between the first cellular network and a second cellular network based on information included in the SIB, enable a second cellular network function of the wireless communication circuitry based on the network supporting the DC, and transmit information indicating that the second cellular network function of the electronic device is enabled to the network via the wireless communication circuitry.
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公开(公告)号:US11444671B2
公开(公告)日:2022-09-13
申请号:US16747956
申请日:2020-01-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kwonyeol Park , Dongwoo Kim , Minho Shin , Changho Shin , Jonghun Rhee
Abstract: A method of receiving multicast transmission from a base station includes receiving allocation information about a feedback channel including a plurality of resources shared by another terminal, determining feedback information based on an estimated channel with the base station, determining a plurality of transmission power levels respectively corresponding to the plurality of resources based on the feedback information, and transmitting channel feedback to the base station on the feedback channel based on the plurality of transmission power levels.
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公开(公告)号:US09793381B2
公开(公告)日:2017-10-17
申请号:US15131611
申请日:2016-04-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyungin Choi , Dongwoo Kim , Chang Woo Sohn , Youngmoon Choi
IPC: H01L29/66 , H01L29/161 , H01L29/165 , H01L29/78 , H01L21/3065
CPC classification number: H01L29/66795 , H01L21/3065 , H01L29/161 , H01L29/165 , H01L29/66545 , H01L29/7848
Abstract: A method for manufacturing a semiconductor device includes forming a fin structure extending in a first direction on a substrate, forming a sacrificial gate pattern extending in a second direction to intersect the fin structure, forming a gate spacer layer covering the fin structure and the sacrificial gate pattern, providing a first ion beam having a first incident angle range and a second ion beam having a second incident angle range to the substrate, patterning the gate spacer layer using the first ion beam and the second ion beam to form gate spacers on sidewalls of the sacrificial gate pattern, forming source/drain regions at both sides of the sacrificial gate patterns, and replacing the sacrificial gate pattern with a gate electrode.
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