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公开(公告)号：US09698807B1
公开(公告)日：2017-07-04
申请号：US15199257
申请日：2016-06-30
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee , Brian G. Drost , Volodymyr Kratyuk
CPC classification number: H03M1/66 , H03L7/081 , H03L7/183 , H03M1/1033 , H03M1/1057 , H03M1/68 , H03M1/82
Abstract: A technique for on-chip time measurement includes dynamically scaling a range of a time-based digital-to-analog converter to enhance resolution of the time measurement. An apparatus includes a first time-based digital-to-analog converter configured to generate a first clock signal based on a first reference clock signal and a first digital code. The apparatus includes a second time-based digital-to-analog converter configured to generate a second clock signal based on a second reference clock signal and a second digital code. The first reference clock signal has a first frequency and the second reference clock signal has a second frequency that is harmonically related to the first frequency. The apparatus includes a time signal converter configured to generate an output signal having a level indicative of a time-of-arrival of a first edge of the first clock signal relative to a time-of-arrival of a second edge of the second clock signal.
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公开(公告)号：US09509278B2
公开(公告)日：2016-11-29
申请号：US13828066
申请日：2013-03-14
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee , Jeffrey L. Sonntag , Brian G. Drost , Mehrnaz Motiee
CPC classification number: H03H9/2457 , H03B5/30 , H03H9/02259 , H03H9/02275 , H03H9/2431 , H03H2009/02291 , H03H2009/02346 , H03H2009/02496
Abstract: An apparatus includes a microelectromechanical system (MEMS) device. The MEMS device includes a resonator suspended from a substrate, an anchor disposed at a center of the resonator, a plurality of suspended beams radiating between the anchor and the resonator, a plurality of first electrodes disposed about the anchor, and a plurality of second electrodes disposed about the anchor. The plurality of first electrodes and the resonator form a first electrostatic transducer. The plurality of second electrodes and the resonator form a second electrostatic transducer. The first electrostatic transducer and the second electrostatic transducer are configured to sustain rotational vibrations of the resonator at a predetermined frequency about an axis through the center of the resonator and orthogonal to a plane of the substrate in response to a signal on the first electrode.
Abstract translation: 一种装置包括微机电系统（MEMS）装置。 MEMS器件包括从衬底悬挂的谐振器，设置在谐振器中心的锚，在锚和谐振器之间辐射的多个悬臂，围绕锚定器设置的多个第一电极和多个第二电极 围绕锚点布置。 多个第一电极和谐振器形成第一静电换能器。 多个第二电极和谐振器形成第二静电换能器。 第一静电换能器和第二静电换能器被配置为响应于第一电极上的信号，以围绕谐振器的中心的轴线以预定的频率维持谐振器的旋转振动并且与基板的平面正交。
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公开(公告)号：US20150145607A1
公开(公告)日：2015-05-28
申请号：US14087993
申请日：2013-11-22
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee
IPC: H03L5/00
Abstract: Various techniques for automatic amplitude control of an oscillator are described. An apparatus includes an oscillator circuit configured to generate an oscillating signal. The apparatus includes a feedback circuit configured to control a bias signal of the oscillator circuit to maintain a target peak amplitude of the oscillating signal based on a current-mode indicator of a peak amplitude of the oscillating signal and a reference current. The feedback loop includes a rectifier circuit configured to generate the current-mode indicator and a summing node configured to provide a bias control signal based on a difference between the current-mode indicator and the reference current. The feedback circuit may include a capacitor coupled to the summing node and configured to accumulate charge according to the difference. A magnitude of the current-mode indicator may be at least two orders of magnitude less than a magnitude of the current through an output node of the oscillator circuit.
Abstract translation: 描述了用于振荡器的自动幅度控制的各种技术。 一种装置包括被配置为产生振荡信号的振荡器电路。 该装置包括反馈电路，其被配置为基于振荡信号的峰值幅度和参考电流的电流模式指示来控制振荡器电路的偏置信号，以维持振荡信号的目标峰值振幅。 反馈回路包括被配置为产生电流模式指示器的整流电路和被配置为基于电流模式指示器和参考电流之间的差提供偏置控制信号的求和节点。 反馈电路可以包括耦合到求和节点的电容器，并且被配置成根据该差异累加电荷。 电流模式指示器的幅度可以比通过振荡器电路的输出节点的电流的幅度小至少两个数量级。
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公开(公告)号：US10153084B2
公开(公告)日：2018-12-11
申请号：US15398241
申请日：2017-01-04
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee , Brian G. Drost
IPC: H01L23/64 , H01F27/34 , H01F27/28 , H01F41/04 , H01F27/36 , H01L23/50 , H01L49/02 , H01L23/552 , H01L23/58 , H01L23/66
Abstract: A technique for forming an integrated circuit including an inductor reduces magnetic coupling between the inductor and surrounding elements. The technique includes deliberate placement of circuit elements (e.g., terminals, pins, routing traces) in locations on the integrated circuit relative to a magnetic vector potential associated with the inductor and relative to a magnetic flux density field associated with the inductor to reduce or eliminate induced signals that degrade system performance.
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公开(公告)号：US20180190424A1
公开(公告)日：2018-07-05
申请号：US15398241
申请日：2017-01-04
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee , Brian G. Drost
CPC classification number: H01F27/34 , H01F17/0006 , H01F27/2804 , H01F27/365 , H01F41/041 , H01F2017/0073 , H01L23/50 , H01L23/552 , H01L23/585 , H01L23/645 , H01L23/66 , H01L28/10
Abstract: A technique for forming an integrated circuit including an inductor reduces magnetic coupling between the inductor and surrounding elements. The technique includes deliberate placement of circuit elements (e.g., terminals, pins, routing traces) in locations on the integrated circuit relative to a magnetic vector potential associated with the inductor and relative to a magnetic flux density field associated with the inductor to reduce or eliminate induced signals that degrade system performance.
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Patent Agency Ranking
公开(公告)号：US09813023B2
公开(公告)日：2017-11-07
申请号：US14970865
申请日：2015-12-16
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee
CPC classification number: H03B5/08 , H03B5/12 , H03B5/1212 , H03B5/1228 , H03L1/00 , H03L1/026 , H03L7/0812
Abstract: A low-complexity differential inductor and common-mode impedance network for reducing effects of flicker noise in an oscillator output signal have been disclosed. An oscillator includes a planar conductive loop comprising a first terminal, a second terminal, and a center tap. The planar conductive loop is formed from a first conductive layer above an integrated circuit substrate. The center tap is coupled to a first power supply node. The oscillator includes a planar conductive structure extending from a first point proximate to the center tap. The planar conductive structure extends along a line of symmetry of the planar conductive loop to a second point proximate to the first terminal and the second terminal. The planar conductive structure may be formed from the first conductive layer and may be directly coupled to the center tap.
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公开(公告)号：US20170115677A1
公开(公告)日：2017-04-27
申请号：US14918651
申请日：2015-10-21
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee , Vaibhav Karkare
Abstract: A low-noise voltage reference generator that utilizes internal gain and feedback to generate an output signal having reduced sensitivity to power supply variations and loading conditions is described. A method includes generating a current based on a voltage drop across a resistor. The voltage drop is based on a second voltage drop across a gate terminal of a transistor and a source terminal of the transistor. The method includes the current using a reference voltage to generate a mirrored current through a node coupled to the drain terminal of the transistor. The method includes generating a level-shifted voltage using a voltage on the node. The method includes buffering the level-shifted voltage using a power supply voltage to generate the reference voltage.
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公开(公告)号：US09489000B2
公开(公告)日：2016-11-08
申请号：US14040839
申请日：2013-09-30
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee , Brian G. Drost
CPC classification number: G05F1/575
Abstract: Reference signal generators using thermistors are disclosed. An apparatus includes a first device having a first temperature coefficient and a thermistor having a second temperature coefficient having a sign opposite to that of the first temperature coefficient. A circuit maintains equivalence of a first signal and a second signal and offsets a first temperature variation of the first device using a second temperature variation of the thermistor to generate the second signal having a low temperature coefficient. The first device may be a bipolar transistor configured to generate a base-emitter voltage and coupled in series with the thermistor. The first signal may be a first voltage on a first node. The second signal may be a second voltage on a second node. The circuit may be configured to maintain effective equivalence of the first voltage and the second voltage. The apparatus may include a resistor coupled to the second node.
Abstract translation: 公开了使用热敏电阻的参考信号发生器。 一种装置包括具有第一温度系数的第一装置和具有与第一温度系数相反的符号的第二温度系数的热敏电阻。 电路维持第一信号和第二信号的等效，并且利用热敏电阻的第二温度变化来抵消第一装置的第一温度变化，以产生具有低温度系数的第二信号。 第一器件可以是被配置为产生基极 - 发射极电压并与热敏电阻串联耦合的双极晶体管。 第一信号可以是第一节点上的第一电压。 第二信号可以是第二节点上的第二电压。 电路可以被配置为保持第一电压和第二电压的有效等效。 该装置可以包括耦合到第二节点的电阻器。
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公开(公告)号：US09007119B2
公开(公告)日：2015-04-14
申请号：US14137499
申请日：2013-12-20
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee , Brian G. Drost , Emmanuel P. Quevy
CPC classification number: H02N1/006 , B81B7/0045 , B81B7/008 , B81B2203/0118 , B81B2207/015 , B81B2207/03 , G01L25/00 , G01P15/097 , G01P15/125 , G01P2015/0831 , H03B5/30 , H03H9/02275 , H03H2009/0248 , H03H2009/02519 , H03L1/022 , H03L7/1976
Abstract: A method of operating a system including a MEMS device of an integrated circuit die includes generating an indicator of a device parameter of the MEMS device in a first mode of operating the system using a monitor structure formed using a MEMS structural layer of the integrated circuit die. The method includes generating, using a CMOS device of the integrated circuit die, a signal indicative of the device parameter and based on the indicator. The device parameter may be a geometric dimension of the MEMS device. The method may include, in a second mode of operating the system, compensating for a difference between a value of the signal and a target value of the signal. The method may include re-generating the indicator after exposing the MEMS device to stress and generating a second signal indicating a change in the device parameter.
Abstract translation: 一种操作包括集成电路管芯的MEMS器件的系统的方法包括：在使用由集成电路管芯的MEMS结构层形成的监视器结构的第一模式中，生成MEMS器件的器件参数的指示器 。 该方法包括使用集成电路管芯的CMOS器件产生指示器件参数并基于指示器的信号。 器件参数可以是MEMS器件的几何尺寸。 该方法可以包括在操作系统的第二模式中，补偿信号的值和信号的目标值之间的差异。 该方法可以包括在使MEMS器件暴露于应力之后重新产生指示符，并产生指示器件参数变化的第二信号。
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公开(公告)号：US20140306623A1
公开(公告)日：2014-10-16
申请号：US14137499
申请日：2013-12-20
Applicant: Silicon Laboratories Inc.
Inventor： Aaron J. Caffee , Brian G. Drost , Emmanuel P. Quevy
IPC: H02N1/00
CPC classification number: H02N1/006 , B81B7/0045 , B81B7/008 , B81B2203/0118 , B81B2207/015 , B81B2207/03 , G01L25/00 , G01P15/097 , G01P15/125 , G01P2015/0831 , H03B5/30 , H03H9/02275 , H03H2009/0248 , H03H2009/02519 , H03L1/022 , H03L7/1976
Abstract: A method of operating a system including a MEMS device of an integrated circuit die includes generating an indicator of a device parameter of the MEMS device in a first mode of operating the system using a monitor structure formed using a MEMS structural layer of the integrated circuit die. The method includes generating, using a CMOS device of the integrated circuit die, a signal indicative of the device parameter and based on the indicator. The device parameter may be a geometric dimension of the MEMS device. The method may include, in a second mode of operating the system, compensating for a difference between a value of the signal and a target value of the signal. The method may include re-generating the indicator after exposing the MEMS device to stress and generating a second signal indicating a change in the device parameter.
Abstract translation: 一种操作包括集成电路管芯的MEMS器件的系统的方法包括：在使用由集成电路管芯的MEMS结构层形成的监视器结构的第一模式中，生成MEMS器件的器件参数的指示器 。 该方法包括使用集成电路管芯的CMOS器件产生指示器件参数并基于指示器的信号。 器件参数可以是MEMS器件的几何尺寸。 该方法可以包括在操作系统的第二模式中，补偿信号的值和信号的目标值之间的差异。 该方法可以包括在使MEMS器件暴露于应力之后重新产生指示符，并产生指示器件参数变化的第二信号。
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