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    Microelectronic device package including antenna horn and semiconductor device
    14.
    发明授权
    Microelectronic device package including antenna horn and semiconductor device 有权

    公开(公告)号：US12224480B2

    公开(公告)日：2025-02-11

    申请号：US17736653

    申请日：2022-05-04

    Applicant: Texas Instruments Incorporated

    Inventor： Yiqi Tang ,  Rajen Manicon Murugan

    IPC: H01Q1/22 ,  H01L23/66 ,  H01Q9/04 ,  H01Q13/02 ,  H01Q19/10

    Abstract: An example semiconductor package comprises a patch antenna formed in a first conductor layer of a multilayer package substrate. The multilayer package substrate comprises conductor layers spaced from one another by dielectric material and coupled to one another by conductive vertical connection layers. The multilayer package substrate has a board side surface opposite a device side surface. The semiconductor package further comprises a semiconductor die mounted to the device side surface of the multilayer package substrate spaced from and coupled to the patch antenna. An antenna horn is mounted to the device side surface and aligned with the patch antenna using a mounting structure. The semiconductor package further comprises a reflector formed on a second conductor layer in the multilayer package substrate. The second conductor layer is positioned closer to the board side surface of the multilayer package substrate compared to the patch antenna.

    Ceramic semiconductor package seal rings
    16.
    发明授权
    Ceramic semiconductor package seal rings 有权

    公开(公告)号：US11881460B2

    公开(公告)日：2024-01-23

    申请号：US18172208

    申请日：2023-02-21

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Yiqi Tang ,  Li Jiang ,  Rajen Manicon Murugan

    IPC: H01L23/00 ,  H01L23/552 ,  H01L23/58 ,  H01L21/50 ,  H01L21/52

    CPC classification number: H01L23/585 ,  H01L21/50 ,  H01L21/52 ,  H01L23/552 ,  H01L23/562 ,  H01L23/564

    Abstract: In examples, a semiconductor package comprises a ceramic substrate and first and second metal layers covered by the ceramic substrate. The first metal layer is configured to carry signals at least in a 20 GHz to 28 GHz frequency range. The package comprises a semiconductor die positioned above the first and second metal layers and coupled to the first metal layer. The package comprises a ground shield positioned in a horizontal plane between the semiconductor die and the first metal layer, the ground shield including an orifice above a portion of the first metal layer. The package includes a metal seal ring coupled to a top surface of the ceramic substrate, the metal seal ring having a segment that is vertically aligned with a segment of the ground shield. The segment of the ground shield is between the orifice of the ground shield and a horizontal center of the ground shield. The package comprises a metal lid coupled to a top surface of the metal seal ring.

    SEMICONDUCTOR DEVICE WITH A POWER CONVERTER MODULE
    19.
    发明申请
    SEMICONDUCTOR DEVICE WITH A POWER CONVERTER MODULE 有权

    公开(公告)号：US20220028770A1

    公开(公告)日：2022-01-27

    申请号：US17227722

    申请日：2021-04-12

    Applicant: TEXAS INSTRUMENTS INCORPORATED

    Inventor： Rajen Manicon Murugan ,  Yiqi Tang

    IPC: H01L23/498 ,  H01L21/48 ,  H02M1/00

    Abstract: A semiconductor device includes a die with a power converter module. The power converter module includes an output port and a return port. The semiconductor device also includes a connection assembly that includes pads configured to be coupled to circuit components of a printed circuit board (PCB). The connection assembly also includes a first layer patterned to include a first trace that is coupled to one of the output port and the return port and a second trace that is coupled to the other of the output port and return port. A second layer of the connection assembly is patterned to provide a first via between the first trace and a third layer and a second via between the first trace and the third layer. The third layer is patterned to provide a portion of a first conductive path and a portion of a second conductive path.

    INTEGRATED MAGNETIC ASSEMBLY
    20.
    发明申请
    INTEGRATED MAGNETIC ASSEMBLY 有权

    公开(公告)号：US20220028593A1

    公开(公告)日：2022-01-27

    申请号：US17383878

    申请日：2021-07-23

    Applicant: Texas Instruments Incorporated

    Inventor： Yiqi Tang ,  Rajen Manicon Murugan ,  Jonathan Almeria Noquil

    IPC: H01F17/00 ,  H01L23/495 ,  H05K1/16 ,  H01L23/522 ,  H01F27/28 ,  H01L23/498 ,  H01L21/56 ,  H01F41/04

    Abstract: An electronic device includes a multilevel package substrate, conductive leads, a die, and a package structure. The multilevel package substrate has a first level, a second level, and a third level, each having patterned conductive features and molded dielectric features. The first level includes a first patterned conductive feature with multiple turns that form a first winding. The second level includes a second patterned conductive feature, and the third level includes a third patterned conductive feature with multiple turns that form a second winding. A first terminal of the die is coupled to the first end of the first winding, a second terminal of the die is coupled to the second end of the first winding, and a third terminal of the die is coupled to a first conductive lead. The package structure encloses the first die, the second die, and a portion of the multilevel package substrate.

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