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公开(公告)号:US20240375236A1
公开(公告)日:2024-11-14
申请号:US18783920
申请日:2024-07-25
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chun-Wei Chang , Ming-Fa Chen , Chao-Wen Shih , Ting-Chu Ko
Abstract: A method includes bonding a first package component on a composite carrier, and performing a first polishing process on the composite carrier to remove a base carrier of the composite carrier. The first polishing process stops on a first layer of the composite carrier. A second polishing process is performed to remove the first layer of the composite carrier. The second polishing process stops on a second layer of the composite carrier. A third polishing process is performed to remove a plurality of layers in the composite carrier. The plurality of layers include the second layer, and the third polishing process stops on a dielectric layer in the first package component.
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公开(公告)号:US11411033B2
公开(公告)日:2022-08-09
申请号:US16818848
申请日:2020-03-13
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Wei-Chao Chiu , Chun-Wei Chang , Ching-Sen Kuo , Feng-Jia Shiu
IPC: H01L27/146 , G03F7/09
Abstract: A method includes forming a first photoresist layer on a front side of a device substrate and having first trenches spaced apart from each other. A first implantation process is performed using the first photoresist layer as a mask to form first isolation regions in the device substrate. A second photoresist layer is formed on the front side and has second trenches. A second implantation process is performed using the second photoresist layer as a mask to form second isolation regions in the device substrate and crossing over the first isolation regions. A third photoresist layer is formed on the front side and has third trenches spaced apart from each other. A third implantation process is performed using the third photoresist layer as a mask to form third isolation regions in the device substrate and crossing over the first isolation regions but spaced apart from the second isolation regions.
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公开(公告)号:US10797091B2
公开(公告)日:2020-10-06
申请号:US16113101
申请日:2018-08-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Seiji Takahashi , Chen-Jong Wang , Dun-Nian Yaung , Feng-Chi Hung , Feng-Jia Shiu , Jen-Cheng Liu , Jhy-Jyi Sze , Chun-Wei Chang , Wei-Cheng Hsu , Wei Chuang Wu , Yimin Huang
IPC: H01L27/146
Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.
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公开(公告)号:US20190027519A1
公开(公告)日:2019-01-24
申请号:US15652508
申请日:2017-07-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Wei-Chao Chiu , Kai Tzeng , Chih-Chien Wang , Chun-Wei Chang , Ching-Sen Kuo , Feng-Jia Shiu , Cheng-Ta Wu
IPC: H01L27/146 , H01L21/761 , H01L21/027 , H01L21/265 , G03F7/09 , G03F7/095 , G03F7/11
Abstract: Various examples of a technique for forming a pattern for substrate fabrication are disclosed herein. In an example, a method includes receiving a substrate. A patterned resist is formed on the substrate and has a trench defined therein. A dielectric is deposited on the patterned resist and within the trench such that the dielectric narrows a width of the trench to further define the trench. A fabrication process is performed on a region of the substrate underlying the trench defined by the dielectric.
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公开(公告)号:US10186542B1
公开(公告)日:2019-01-22
申请号:US15652508
申请日:2017-07-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Wei-Chao Chiu , Kai Tzeng , Chih-Chien Wang , Chun-Wei Chang , Ching-Sen Kuo , Feng-Jia Shiu , Cheng-Ta Wu
IPC: H01L27/00 , H01L27/146 , H01L21/761 , H01L21/027 , H01L21/265 , G03F7/09 , G03F7/095 , G03F7/11 , G03F7/16 , G03F7/20 , G03F7/38 , G03F7/32
Abstract: Various examples of a technique for forming a pattern for substrate fabrication are disclosed herein. In an example, a method includes receiving a substrate. A patterned resist is formed on the substrate and has a trench defined therein. A dielectric is deposited on the patterned resist and within the trench such that the dielectric narrows a width of the trench to further define the trench. A fabrication process is performed on a region of the substrate underlying the trench defined by the dielectric.
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公开(公告)号:US11996432B2
公开(公告)日:2024-05-28
申请号:US17871985
申请日:2022-07-25
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Wei-Chao Chiu , Chun-Wei Chang , Ching-Sen Kuo , Feng-Jia Shiu
IPC: H01L27/146 , G03F7/09
CPC classification number: H01L27/1463 , H01L27/14609 , H01L27/14685 , H01L27/14687 , G03F7/094
Abstract: A method includes performing a first lithography process using a first pattern of a first photomask to form a first photoresist pattern on a front side of a device substrate; performing a first implantation process using the first pattern as a mask to form first isolation regions in the device substrate; after performing the first implantation process, performing a second lithography process using a second pattern of a second photomask to form a second photoresist pattern on the front side of the device substrate, the second pattern being shifted from the first pattern by a distance less than the first pitch and in the first direction; performing a second implantation process using the second photoresist pattern as a mask to form second isolation regions in the device substrate and spaced apart from the first isolation regions; and forming pixels between the first and second isolation regions.
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公开(公告)号:US20210005649A1
公开(公告)日:2021-01-07
申请号:US17022456
申请日:2020-09-16
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Seiji Takahashi , Chen-Jong Wang , Dun-Nian Yaung , Feng-Chi Hung , Feng-Jia Shiu , Jen-Cheng Liu , Jhy-Jyi Sze , Chun-Wei Chang , Wei-Cheng Hsu , Wei Chuang Wu , Yimin Huang
IPC: H01L27/146
Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.
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公开(公告)号:US20190371838A1
公开(公告)日:2019-12-05
申请号:US16113101
申请日:2018-08-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Seiji Takahashi , Chen-Jong Wang , Dun-Nian Yaung , Feng-Chi Hung , Feng-Jia Shiu , Jen-Cheng Liu , Jhy-Jyi Sze , Chun-Wei Chang , Wei-Cheng Hsu , Wei Chuang Wu , Yimin Huang
IPC: H01L27/146
Abstract: In some embodiments, a pixel sensor is provided. The pixel sensor includes a first photodetector arranged in a semiconductor substrate. A second photodetector is arranged in the semiconductor substrate, where a first substantially straight line axis intersects a center point of the first photodetector and a center point of the second photodetector. A floating diffusion node is arranged in the semiconductor substrate at a point that is a substantially equal distance from the first photodetector and the second photodetector. A pick-up well contact region is arranged in the semiconductor substrate, where a second substantially straight line axis that is substantially perpendicular to the first substantially straight line axis intersects a center point of the floating diffusion node and a center point of the pick-up well contact region.
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公开(公告)号:US10121811B1
公开(公告)日:2018-11-06
申请号:US15686916
申请日:2017-08-25
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Wei-Chao Chiu , Chih-Chien Wang , Feng-Jia Shiu , Ching-Sen Kuo , Chun-Wei Chang , Kai Tzeng
IPC: H01L21/00 , H01L27/146
Abstract: Implementations of the disclosure provide a method of fabricating an image sensor device. The method includes forming first trenches in a first photoresist layer using a first photomask having a first pattern to expose a first surface of a substrate, directing ions into the exposed first substrate through the first trenches to form first isolation regions in the substrate, removing the first photoresist layer, forming second trenches in a second photoresist layer using a second photomask having a second pattern to expose a second surface of the substrate, the second pattern being shifted diagonally from the first pattern by half mask pitch, directing ions into the exposed second surface through the second trenches to form second isolation regions in the substrate, the first and second isolation regions being alternatingly disposed in the substrate, and the first and second isolation regions defining pixel regions therebetween, and removing the second photoresist layer.
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20.
公开(公告)号:US20170186808A1
公开(公告)日:2017-06-29
申请号:US15062956
申请日:2016-03-07
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Wei-Chao Chiu , Chih-Chien Wang , Feng-Jia Shiu , Ching-Sen Kuo , Chun-Wei Chang , Kai Tzeng
IPC: H01L27/146 , H01L21/311 , G03F7/32 , H01L21/266 , G03F7/16 , H01L21/027 , H01L21/768
CPC classification number: H01L27/14683 , G03F7/168 , G03F7/32 , G03F7/38 , G03F7/405 , H01L21/0273 , H01L21/266 , H01L21/31144 , H01L21/76802 , H01L27/14636 , H01L27/14643
Abstract: A first photoresist pattern and a second photoresist pattern are formed over a substrate. The first photoresist pattern is separated from the second photoresist pattern by a gap. A chemical mixture is coated on the first and second photoresist patterns. The chemical mixture contains a chemical material and surfactant particles mixed into the chemical material. The chemical mixture fills the gap. A baking process is performed on the first and second photoresist patterns, the baking process causing the gap to shrink. At least some surfactant particles are disposed at sidewall boundaries of the gap. A developing process is performed on the first and second photoresist patterns. The developing process removes the chemical mixture in the gap and over the photoresist patterns. The surfactant particles disposed at sidewall boundaries of the gap reduce a capillary effect during the developing process.
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