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公开(公告)号：US11120539B2
公开(公告)日：2021-09-14
申请号：US16204387
申请日：2018-11-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Sheng-Hsiang Chuang , Jiao-Rou Liao , Cheng-Kang Hu , Shou-Wen Kuo , Jiun-Rong Pai , Hsu-Shui Liu
Abstract: A method for scanning and analyzing a surface, the method comprising: receiving a piece of equipment with a target surface for inspection; receiving an input from a user; determining at least one scan parameter based on the user input; scanning the target surface using an optical detector in accordance with the at least one scan parameter; generating an image of the target surface; correcting the image of the target surface to remove at least one undesired feature to generate a corrected image based on the at least one scan parameter; and analyzing the corrected image to determine at least one geometric parameter of the target surface.
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公开(公告)号：US10569520B2
公开(公告)日：2020-02-25
申请号：US16220163
申请日：2018-12-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chang-Chen Tsao , Kuo Liang Lu , Ru-Liang Lee , Sheng-Hsiang Chuang , Yu-Hung Cheng , Yeur-Luen Tu , Cheng-Kang Hu
IPC: B32B38/10 , H01L21/67 , H01L21/68 , H01L21/683
Abstract: The present disclosure relates to a debonding apparatus. In some embodiments, the debonding apparatus comprises a wafer chuck configured to hold a pair of bonded substrates on a chuck top surface. The debonding apparatus further comprises a pair of separating blades including a first separating blade and a second separating blade placed at edges of the pair of bonded substrates diametrically opposite to each other. The first separating blade has a first thickness that is smaller than a second thickness of the second separating blade. The debonding apparatus further comprises a flex wafer assembly placed above the pair of bonded substrates and configured to pull the pair of bonded substrates upwardly to separate a second substrate from a first substrate of the pair of bonded substrate. By providing unbalanced initial torques on opposite sides of the bonded substrate pair, edge defects and wafer breakage are reduced.
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公开(公告)号：US10018573B2
公开(公告)日：2018-07-10
申请号：US14513072
申请日：2014-10-13
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Ming-Han Tsai , Sheng-Hsiang Chuang , Guan-Cyun Li , Yen-Ju Wei , Chiung-Min Lin , Yi-Ming Chen
IPC: G01N21/95
CPC classification number: G01N21/9503
Abstract: A dual-function wafer handling apparatus for handling a wafer includes an aligner for rotating the wafer, an ID reader disposed corresponding to an edge of the wafer for reading an ID of the wafer, and an optical defect inspection unit for capturing images to analysis.
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公开(公告)号：US11842481B2
公开(公告)日：2023-12-12
申请号：US17881338
申请日：2022-08-04
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chien-Ko Liao , Ya-Hsun Hsueh , Sheng-Hsiang Chuang , Hsu-Shui Liu , Jiun-Rong Pai , Shou-Wen Kuo
CPC classification number: G06T7/001 , G06T5/006 , G06T7/33 , G06T7/74 , H01L22/20 , G06T2207/30148 , G06T2207/30204 , H01L22/12
Abstract: A method includes: receiving a defect map from a defect scanner, wherein the defect map comprises at least one defect location of a semiconductor workpiece; annotating the defect map with a reference fiducial location of the semiconductor workpiece; determining a detected fiducial location within image data of the semiconductor workpiece; determining an offset correction based on comparing the detected fiducial location with the reference fiducial location; producing a corrected defect map by applying the offset correction to the defect map, wherein the applying the offset correction translocates the at least one defect location; and transferring the corrected defect map to a defect reviewer configured to perform root cause analysis based on the corrected defect map.
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公开(公告)号：US11651981B2
公开(公告)日：2023-05-16
申请号：US16996211
申请日：2020-08-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Jiao-Rou Liao , Sheng-Hsiang Chuang , Cheng-Kang Hu , Hsu-Shui Liu , Jiun-Rong Pai , Shou-Wen Kuo
CPC classification number: H01L21/67288 , G01B11/14 , G06T7/001 , H04N5/2256 , H04N5/23299 , H04N7/183 , G06T2207/30148
Abstract: A system and method for defect detection in a hole array on a substrate is disclosed herein. In one embodiment, a method for defect detection in a hole array on a substrate, includes: scanning a substrate surface using at least one optical detector, generating at least one image of the substrate surface; and analyzing the at least one image to detect defects in the hole array on the substrate surface based on a set of predetermined criteria.
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Patent Agency Ranking
公开(公告)号：US11152238B2
公开(公告)日：2021-10-19
申请号：US16201312
申请日：2018-11-27
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Cheng-Kang Hu , Hsu-Shui Liu , Jiun-Rong Pai , Shou-Wen Kuo , Sheng-Hsiang Chuang , Cheng-Hung Chen
IPC: G05B19/18 , H01L21/67 , H01L21/687
Abstract: In an embodiment, a system includes a profiler configured to detect variations along a surface of a semiconductor stage; and a jig configured to move the profiler along an axis over the semiconductor stage.
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公开(公告)号：US10852704B2
公开(公告)日：2020-12-01
申请号：US16028422
申请日：2018-07-06
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Sing-Tsung Li , Hsu-Shui Liu , Jiun-Rong Pai , Sheng-Hsiang Chuang , Shou-Wen Kuo , Chien-Ko Liao
IPC: G05B19/042 , G06T7/00
Abstract: A semiconductor equipment management method applicable to an electronic device for managing multiple pieces of semiconductor equipment is provided. The pieces of semiconductor equipment are respectively controlled through multiple control hosts, and the control hosts and the electronic device are connected to a switch device. The method includes: receiving real-time image information of each control host through the switch device; determining whether the real-time image information of each control host includes a triggering event by performing an image recognition on the real-time image information; executing a macro corresponding to the triggering event, where the macro includes at least one self-defined operation; generating at least one input command according to the self-defined operation of the executed macro; and controlling the control hosts to execute the self-defined operation of the executed macro by transmitting the input command to the control hosts through the switch device.
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公开(公告)号：US20200043812A1
公开(公告)日：2020-02-06
申请号：US16600789
申请日：2019-10-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chia-Han Lin , Chien-Fa Lee , Hsu-Shui Liu , Jiun-Rong Pai , Sheng-Hsiang Chuang , Surendra Kumar Soni , Shou-Wen Kuo , Wu-An Weng , Gary Tsai , Chien-Ko Liao , Ya Hsun Hsueh , Becky Liao , Ethan Yu , Ming-Chi Tsai , Kuo-Yi Liu
IPC: H01L21/66 , H05K13/08 , G06K9/20 , H01L21/67 , H01L21/687 , H01L21/677
Abstract: Some embodiments of the present disclosure relate to a processing tool. The tool includes a housing enclosing a processing chamber, and an input/output port configured to pass a wafer through the housing into and out of the processing chamber. A back-side macro-inspection system is arranged within the processing chamber and is configured to image a back side of the wafer. A front-side macro-inspection system is arranged within the processing chamber and is configured to image a front side of the wafer according to a first image resolution. A front-side micro-inspection system is arranged within the processing chamber and is configured to image the front side of the wafer according to a second image resolution which is higher than the first image resolution.
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公开(公告)号：US20190164265A1
公开(公告)日：2019-05-30
申请号：US16107857
申请日：2018-08-21
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chien-Ko Liao , Ya-Hsun Hsueh , Sheng-Hsiang Chuang , Hsu-Shul Liu , Jiun-Rong Pai , Shou-Wen Kuo
Abstract: A method includes: receiving a defect map from a defect scanner, wherein the defect map comprises at least one defect location of a semiconductor workpiece; annotating the defect map with a reference fiducial location of the semiconductor workpiece; determining a detected fiducial location within image data of the semiconductor workpiece; determining an offset correction based on comparing the detected fiducial location with the reference fiducial location; producing a corrected defect map by applying the offset correction to the defect map, wherein the applying the offset correction translocates the at least one defect location; and transferring the corrected defect map to a defect reviewer configured to perform root cause analysis based on the corrected defect map.
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公开(公告)号：US20190118522A1
公开(公告)日：2019-04-25
申请号：US16220163
申请日：2018-12-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chang-Chen Tsao , Kuo Liang Lu , Ru-Liang Lee , Sheng-Hsiang Chuang , Yu-Hung Cheng , Yeur-Luen Tu , Cheng-Kang Hu
IPC: B32B38/10 , H01L21/683 , H01L21/67 , H01L21/68
CPC classification number: B32B38/10 , H01L21/67011 , H01L21/67092 , H01L21/681 , H01L21/6835 , H01L21/6838
Abstract: The present disclosure relates to a debonding apparatus. In some embodiments, the debonding apparatus comprises a wafer chuck configured to hold a pair of bonded substrates on a chuck top surface. The debonding apparatus further comprises a pair of separating blades including a first separating blade and a second separating blade placed at edges of the pair of bonded substrates diametrically opposite to each other. The first separating blade has a first thickness that is smaller than a second thickness of the second separating blade. The debonding apparatus further comprises a flex wafer assembly placed above the pair of bonded substrates and configured to pull the pair of bonded substrates upwardly to separate a second substrate from a first substrate of the pair of bonded substrate. By providing unbalanced initial torques on opposite sides of the bonded substrate pair, edge defects and wafer breakage are reduced.
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