公开(公告)号：US20120327702A1

公开(公告)日：2012-12-27

申请号：US13599286

申请日：2012-08-30

Applicant: Takeshi Takagi ,  Zhiqiang Wei ,  Takeki Ninomiya ,  Shunsaku Muraoka ,  Yoshihiko Kanzawa

Inventor： Takeshi Takagi ,  Zhiqiang Wei ,  Takeki Ninomiya ,  Shunsaku Muraoka ,  Yoshihiko Kanzawa

IPC: H01L45/00 ,  G11C11/21

CPC classification number: H01L27/101 ,  G11C13/0007 ,  G11C13/0069 ,  G11C2013/0073 ,  G11C2013/0083 ,  G11C2213/31 ,  G11C2213/32 ,  G11C2213/56 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2463 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1675

Abstract: A nonvolatile memory element includes: a first electrode layer; a second electrode layer; and a variable resistance layer which is placed between the electrode layers, and whose resistance state reversibly changes between a high resistance state and a low resistance state based on a polarity of a voltage applied between the electrode layers. The variable resistance layer is formed by stacking a first oxide layer including an oxide of a first transition metal and a second oxide layer including an oxide of a second transition metal which is different from the first transition metal. At least one of the following conditions is satisfied: (1) a dielectric constant of the second oxide layer is larger than a dielectric constant of the first oxide layer; and (2) a band gap of the second oxide layer is smaller than a band gap of the first oxide layer.

Abstract translation: 非易失性存储元件包括：第一电极层; 第二电极层; 以及可变电阻层，其设置在电极层之间，并且其电阻状态基于施加在电极层之间的电压的极性而在高电阻状态和低电阻状态之间可逆地变化。 可变电阻层通过堆叠包括第一过渡金属的氧化物的第一氧化物层和包含与第一过渡金属不同的第二过渡金属的氧化物的第二氧化物层而形成。 满足以下条件中的至少一个：（1）第二氧化物层的介电常数大于第一氧化物层的介电常数; 和（2）第二氧化物层的带隙小于第一氧化物层的带隙。

公开(公告)号：US20120320661A1

公开(公告)日：2012-12-20

申请号：US13596154

申请日：2012-08-28

Applicant: Shunsaku MURAOKA ,  Takeshi Takagi ,  Satoru Mitani ,  Koji Katayama

Inventor： Shunsaku MURAOKA ,  Takeshi Takagi ,  Satoru Mitani ,  Koji Katayama

IPC: G11C11/00

CPC classification number: G11C13/0007 ,  G11C13/0069 ,  G11C2013/0083 ,  G11C2213/72 ,  G11C2213/79 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1625

Abstract: A method includes applying a first polarity writing voltage pulse to a metal oxide layer to change its resistance state from high to low into a write state, applying a second polarity erasing voltage pulse different from the first polarity to the metal oxide layer to change its resistance state from low to high into an erase state, and applying an initial voltage pulse having the second polarity to the metal oxide layer before first application of the writing voltage pulse, to change an initial resistance value of the metal oxide layer. R0>RH>RL and |V0|>|Ve|≧|Vw| are satisfied where R0, RL, and RH are the resistance values of the initial, write, and erase states, respectively, of the metal oxide layer, and V0, Vw, and Ve are voltage values of the initial, writing, and erasing voltage pulses, respectively.

Abstract translation: 一种方法包括：将第一极性写入电压脉冲施加到金属氧化物层，以将其电阻状态从高变为低电平变为写入状态，将不同于第一极性的第二极性擦除电压脉冲施加到金属氧化物层以改变其电阻 状态从低到高进入擦除状态，以及在首次施加写入电压脉冲之前将具有第二极性的初始电压脉冲施加到金属氧化物层，以改变金属氧化物层的初始电阻值。 R0> RH> RL和| V0 |> | Ve |≥| Vw | 满足R0，RL和RH分别是金属氧化物层的初始，写入和擦除状态的电阻值，V0，Vw和Ve是初始，写入和擦除电压的电压值 脉冲。

公开(公告)号：US08264865B2

公开(公告)日：2012-09-11

申请号：US12677404

申请日：2009-07-01

Applicant: Satoru Mitani ,  Yoshihiko Kanzawa ,  Koji Katayama ,  Takeshi Takagi

Inventor： Satoru Mitani ,  Yoshihiko Kanzawa ,  Koji Katayama ,  Takeshi Takagi

IPC: G11C11/00

CPC classification number: G11C13/0069 ,  G11C13/0007 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/71 ,  G11C2213/79 ,  H01L27/101 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1625

Abstract: A nonvolatile memory element of the present invention comprises a first electrode (103), a second electrode (108); a resistance variable layer (107) which is interposed between the first electrode (103) and the second electrode (107) and is configured to switch a resistance value reversibly in response to an electric signal applied between the electrodes (103) and (108), and the resistance variable layer (107) has at least a multi-layer structure in which a first hafnium-containing layer having a composition expressed as HfOx (0.9≦x≦1.6), and a second hafnium-containing layer having a composition expressed as HfOy (1.8

Abstract translation: 本发明的非易失性存储元件包括第一电极（103），第二电极（108） 介于第一电极（103）和第二电极（107）之间的电阻变化层（107），其被配置为响应于施加在电极（103）和（108）之间的电信号可逆地切换电阻值， ，并且电阻变化层（107）具有至少多层结构，其中具有表示为HfO x（0.9＆nlE; x＆nlE; 1.6）的组成的第一含铪层和具有组成的第二含铪层 表示为HfOy（1.8

公开(公告)号：US08258493B2

公开(公告)日：2012-09-04

申请号：US12515379

申请日：2007-11-13

Applicant: Takumi Mikawa ,  Takeshi Takagi

Inventor： Takumi Mikawa ,  Takeshi Takagi

IPC: H01L29/00

CPC classification number: H01L27/101 ,  G11C13/0007 ,  G11C2213/32 ,  G11C2213/72 ,  G11C2213/73 ,  H01L27/0688 ,  H01L27/112 ,  H01L27/115 ,  H01L27/2409 ,  H01L27/2418 ,  H01L27/2463 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1683

Abstract: A nonvolatile semiconductor memory apparatus (10) of the present invention comprises a substrate (10), lower-layer electrode wires (15) provided on the substrate (11), an interlayer insulating layer (16) which is disposed on the substrate (11) including the lower-layer electrode wires (15) and is provided with contact holes at locations respectively opposite to the lower-layer electrode wires (15), resistance variable layers (18) which are respectively connected to the lower-layer electrode wires (15); and non-ohmic devices (20) which are respectively provided on the resistance variable layers (18) such that the non-ohmic devices are respectively connected to the resistance variable layers (18). The non-ohmic devices (20) each has a laminated-layer structure including plural semiconductor layers, a laminated-layer structure including a metal electrode layer and an insulator layer, or a laminated-layer structure including a metal electrode layer and a semiconductor layer. One layer of the laminated-layer structure is embedded to fill each of the contact holes and the semiconductor layer or the insulator layer which is the other layer of the laminated-layer structure has a larger area than an opening of each of the contact holes and is provided on the interlayer insulating layer (16).

Abstract translation: 本发明的非易失性半导体存储装置（10）具备基板（10），设置在基板（11）上的下层电极布线（15），设置在基板（11）上的层间绝缘层（16） ），并且在分别与下层电极线（15）相对的位置设置接触孔，电阻变化层（18）分别与下层电极线（15）连接 15）; 和非欧姆器件（20），其分别设置在电阻变化层（18）上，使得非欧姆器件分别连接到电阻变化层（18）。 非欧姆装置（20）各自具有包括多个半导体层的层叠层结构，包括金属电极层和绝缘体层的层叠层结构，或者包括金属电极层和半导体层的层叠层结构 。 嵌入层叠层结构的一层以填充每个接触孔，作为层叠层结构的另一层的半导体层或绝缘体层的面积比每个接触孔的开口大， 设置在层间绝缘层（16）上。

公开(公告)号：US08094482B2

公开(公告)日：2012-01-10

申请号：US12529466

申请日：2008-10-28

Applicant: Zhiqiang Wei ,  Takeshi Takagi ,  Ken Kawai ,  Kazuhiko Shimakawa

Inventor： Zhiqiang Wei ,  Takeshi Takagi ,  Ken Kawai ,  Kazuhiko Shimakawa

IPC: G11C11/00

CPC classification number: H01L27/101 ,  G11C11/5685 ,  G11C13/0007 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0054 ,  G11C2013/0073 ,  G11C2013/009 ,  G11C2211/5646 ,  G11C2213/31 ,  G11C2213/32 ,  G11C2213/34 ,  G11C2213/79

Abstract: A nonvolatile memory apparatus and a nonvolatile data storage medium of the present invention, including nonvolatile memory elements each of which changes its resistance in response to electric pulses applied, comprises a first write circuit for performing first write in which a first electric pulse is applied to the nonvolatile memory element to switch a resistance value of the nonvolatile memory element from a first resistance value to a second resistance value and a second electric pulse which is opposite in polarity to the first electric pulse is applied to the nonvolatile memory element to switch the resistance value of the nonvolatile memory element from the second resistance value to the first resistance value.

Abstract translation: 本发明的非易失性存储装置和非易失性数据存储介质，包括各自根据施加的电脉冲改变其电阻的非易失性存储元件，包括用于执行第一写入的第一写入电路，其中施加第一电脉冲到 将非易失性存储元件的电阻值从第一电阻值切换到与第一电脉冲极性相反的第二电阻值和第二电脉冲的非易失性存储元件施加到非易失性存储元件，以将电阻 非易失性存储元件的值从第二电阻值到第一电阻值。

公开(公告)号：US08093578B2

公开(公告)日：2012-01-10

申请号：US12513638

申请日：2007-11-16

Applicant: Takeshi Takagi ,  Takumi Mikawa

Inventor： Takeshi Takagi ,  Takumi Mikawa

IPC: H01L27/10 ,  H01L21/02

CPC classification number: H01L27/101 ,  H01L27/1021 ,  H01L27/2409 ,  H01L27/2418 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1683

Abstract: The present invention is configured such that a resistance variable element (16) and a rectifying element (20) are formed on a substrate (12). The resistance variable element (16) is configured such that a resistance variable layer (14) made of a metal oxide material is sandwiched between a lower electrode (13) and an upper electrode (15). The rectifying element (20) is connected to the resistance variable element (16), and is configured such that a blocking layer (18) is sandwiched between a first electrode layer (17) located on a lower side of the blocking layer (18) and a second electrode layer (19) located on an upper side of the blocking layer (18). The resistance variable element (16) and the rectifying element (20) are connected to each other in series in a thickness direction of the resistance variable layer (14), and the blocking layer (18) is formed as a barrier layer having a hydrogen barrier property.

Abstract translation: 本发明被构造成使得在基板（12）上形成电阻可变元件（16）和整流元件（20）。 电阻可变元件（16）被构造为使得由金属氧化物材料制成的电阻变化层（14）夹在下电极（13）和上电极（15）之间。 整流元件（20）连接到电阻可变元件（16），并且被构造为使阻挡层（18）夹在位于阻挡层（18）的下侧的第一电极层（17）之间， 以及位于阻挡层（18）的上侧的第二电极层（19）。 电阻可变元件（16）和整流元件（20）在电阻变化层（14）的厚度方向上串联连接，并且阻挡层（18）形成为具有氢的阻挡层 屏障属性。

公开(公告)号：US20110294259A1

公开(公告)日：2011-12-01

申请号：US13205408

申请日：2011-08-08

Applicant: Yoshihiko KANZAWA ,  Koji Katayama ,  Satoru Fujii ,  Shunsaku Muraoka ,  Koichi Osano ,  Satoru Mitani ,  Ryoko Miyanaga ,  Takeshi Takagi ,  Kazuhiko Shimakawa

Inventor： Yoshihiko KANZAWA ,  Koji Katayama ,  Satoru Fujii ,  Shunsaku Muraoka ,  Koichi Osano ,  Satoru Mitani ,  Ryoko Miyanaga ,  Takeshi Takagi ,  Kazuhiko Shimakawa

IPC: H01L21/36

CPC classification number: H01L27/101 ,  G11C13/0007 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0073 ,  G11C2213/32 ,  G11C2213/71 ,  G11C2213/72 ,  G11C2213/79 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2481 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1625 ,  H01L45/1675 ,  Y10S438/90

Abstract: A nonvolatile memory element comprises a first electrode layer (103), a second electrode (107), and a resistance variable layer (106) which is disposed between the first electrode layer (103) and the second electrode layer (107), a resistance value of the resistance variable layer varying reversibly according to electric signals having different polarities which are applied between the electrodes (103), (107), wherein the resistance variable layer (106) has a first region comprising a first oxygen-deficient tantalum oxide having a composition represented by TaOx (0

Abstract translation: 非易失性存储元件包括设置在第一电极层（103）和第二电极层（107）之间的第一电极层（103），第二电极（107）和电阻变化层（106），电阻 电阻变化层的值根据施加在电极（103），（107）之间的具有不同极性的电信号而可逆地变化，其中电阻变化层（106）具有第一区域，该第一区域包括第一氧缺陷型氧化钽， 由TaOx（0

公开(公告)号：US20110233510A1

公开(公告)日：2011-09-29

申请号：US13132058

申请日：2009-12-01

Applicant: Yoshihiko Kanzawa ,  Satoru Mitani ,  Zhiqiang Wei ,  Takeshi Takagi ,  Koji Katayama

Inventor： Yoshihiko Kanzawa ,  Satoru Mitani ,  Zhiqiang Wei ,  Takeshi Takagi ,  Koji Katayama

IPC: H01L47/00

CPC classification number: H01L27/101 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/1625

Abstract: A nonvolatile memory element of the present invention comprises a first electrode (103); a second electrode (109); and a resistance variable layer (106) disposed between the first electrode and the second electrode, resistance values of the resistance variable layer reversibly changing in response to electric signals applied between the first electrode and the second electrode; at least one of the first electrode and the second electrode including a platinum-containing layer (107) comprising platinum; the resistance variable layer including at least a first oxygen-deficient transition metal oxide layer (104) which is not physically in contact with the platinum-containing layer and a second oxygen-deficient transition metal oxide layer (105) which is disposed between the first oxygen-deficient transition metal oxide layer and the platinum-containing layer and is physically in contact with the platinum-containing layer; x

Abstract translation: 本发明的非易失性存储元件包括第一电极（103） 第二电极（109）; 以及设置在所述第一电极和所述第二电极之间的电阻变化层（106），所述电阻变化层的电阻值响应于施加在所述第一电极和所述第二电极之间的电信号而可逆地变化; 所述第一电极和所述第二电极中的至少一个包括含铂的含铂层（107） 所述电阻变化层至少包括不与所述含铂层物理接触的第一缺氧过渡金属氧化物层（104）和第二缺氧过渡金属氧化物层（105），所述第二缺氧过渡金属氧化物层（105）设置在所述第一 氧缺陷型过渡金属氧化物层和含铂层，并且与含铂层物理接触; 当第一缺氧过渡金属氧化物层中包含的缺氧过渡金属氧化物被表示为MOx时，x

公开(公告)号：US20110174708A1

公开(公告)日：2011-07-21

申请号：US13121872

申请日：2009-10-02

Applicant: Shin-ichi Oota ,  Hidenari Yamagata ,  Takeshi Takagi ,  Koji Egawa

Inventor： Shin-ichi Oota ,  Hidenari Yamagata ,  Takeshi Takagi ,  Koji Egawa

IPC: B01F9/00 ,  B01D15/08 ,  B01L9/00

CPC classification number: G01N35/1097 ,  B01F11/0002 ,  B01F11/0037 ,  B01L9/06 ,  B01L2300/0851 ,  G01N30/06 ,  G01N2035/00524

Abstract: A sample stirring device of the present invention includes a driving roller and two follower rollers for coming into contact with a sample container including a cylindrical portion for containing a sample to be stirred. The driving roller is driven for rotation to stir the sample contained in the sample container. The two follower rollers have rotation axes inclined with respect to an axial direction of the cylindrical portion. This arrangement allows the sample container such as a blood collection tube to be rotated stably.

Abstract translation: 本发明的样品搅拌装置包括驱动辊和两个从动辊，用于与包括用于容纳待搅拌样品的圆筒部分的样品容器接触。 驱动辊被驱动旋转以搅拌包含在样品容器中的样品。 两个从动辊具有相对于圆筒部的轴向倾斜的旋转轴。 这种布置允许诸如采血管的样品容器能够稳定地旋转。

公开(公告)号：US07801186B2

公开(公告)日：2010-09-21

申请号：US11952647

申请日：2007-12-07

Applicant: Sugio Wako ,  Atsushi Koyama ,  Xiongfei Zhang ,  Hiroshi Matsuura ,  Satoru Abe ,  Takeshi Takagi

Inventor： Sugio Wako ,  Atsushi Koyama ,  Xiongfei Zhang ,  Hiroshi Matsuura ,  Satoru Abe ,  Takeshi Takagi

IPC: H01S3/30

CPC classification number: H01S3/09415 ,  G01N2201/06113 ,  G02B6/29317 ,  G02B6/29358 ,  H01S3/06708 ,  H01S3/0675 ,  H01S3/08036 ,  H01S3/1062 ,  H01S3/1618

Abstract: A spatial coupling provided between an amplified-light waveguide and an output-light waveguide includes a wavelength selecting element that selectively transmits a light having a desired wavelength band out of a spontaneous emission light generated in the amplified-light waveguide and a lens unit that couples the spontaneous emission light to the wavelength selecting unit. An input-side light reflecting unit provided between a semiconductor pumping laser and the amplified-light waveguide and an output-side light reflecting unit formed on an output side of the spatial coupling unit form a laser resonator.

Abstract translation: 提供在放大光波导和输出光波导之间的空间耦合包括波长选择元件，其选择性地透射在放大光波导中产生的自发发射光中具有期望波长带的光;以及透镜单元，其耦合 对波长选择单元的自发发射光。 设置在半导体泵浦激光器和放大光波导之间的输入侧光反射单元和形成在空间耦合单元的输出侧的输出侧光反射单元形成激光谐振器。