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    Dual work function metal gate integration in semiconductor devices
    11.
    发明申请
    Dual work function metal gate integration in semiconductor devices 有权
    双功能金属门集成在半导体器件中

    公开(公告)号：US20050258468A1

    公开(公告)日：2005-11-24

    申请号：US10890365

    申请日：2004-07-13

    Applicant: Luigi Colombo ,  James Chambers ,  Mark Visokay

    Inventor： Luigi Colombo ,  James Chambers ,  Mark Visokay

    IPC: H01L21/3205 ,  H01L21/8234 ,  H01L21/8238 ,  H01L29/49 ,  H01L29/76 ,  H01L29/78

    CPC classification number: H01L21/823842 ,  H01L29/4958

    Abstract: The present invention provides, in one embodiment, a process for forming a dual work function metal gate semiconductor device (100). The process includes providing a semiconductor substrate (105) having a gate dielectric layer (110) thereon and a metal layer (205) on the gate dielectric layer. A work function of the metal layer is matched to a conduction band or a valence band of the semiconductor substrate. The process also includes forming a conductive barrier layer (210) on a portion (215) of the metal layer and a material layer (305) on the metal layer. The metal layer and the material layer are annealed to form a metal alloy layer (405) to thereby match a work function of the metal alloy layer to another of the conduction band or the valence band of the substrate. Other embodiments of the invention include a dual work function metal gate semiconductor device (900) and an integrated circuit (1000).

    Abstract translation: 本发明在一个实施例中提供了一种用于形成双功函数金属栅极半导体器件（100）的工艺。 该方法包括提供其上具有栅极电介质层（110）的半导体衬底（105）和栅极电介质层上的金属层（205）。 金属层的功函数与半导体衬底的导带或价带相匹配。 该方法还包括在金属层的一部分（215）和金属层上的材料层（305）上形成导电阻挡层（210）。 对金属层和材料层进行退火以形成金属合金层（405），从而将金属合金层的功函数与衬底的导带或价带中的另一个相匹配。 本发明的其它实施例包括双功函数金属栅极半导体器件（900）和集成电路（1000）。

    Metal gate MOS transistors and methods for making the same
    12.
    发明申请
    Metal gate MOS transistors and methods for making the same 有权
    金属栅极MOS晶体管及其制造方法

    公开(公告)号：US20050059198A1

    公开(公告)日：2005-03-17

    申请号：US10661130

    申请日：2003-09-12

    Applicant: Mark Visokay ,  Luigi Colombo ,  James Chambers

    Inventor： Mark Visokay ,  Luigi Colombo ,  James Chambers

    IPC: H01L21/28 ,  H01L21/336 ,  H01L21/8238 ,  H01L29/49 ,  H01L29/51 ,  H01L21/44 ,  H01L29/76

    CPC classification number: H01L29/4966 ,  H01L21/28088 ,  H01L21/823842 ,  H01L29/513 ,  H01L29/517 ,  H01L29/665

    Abstract: Semiconductor devices and fabrication methods are provided, in which metal transistor gates are provided for MOS transistors. Metal boride is formed above a gate dielectric to create PMOS gate structures and metal nitride is formed over a gate dielectric to provide NMOS gate structures. The metal portions of the gate structures are formed from an initial starting material that is either a metal boride or a metal nitride, after which the starting material is provided with boron or nitrogen in one of the PMOS and NMOS regions through implantation, diffusion, or other techniques, either before or after formation of the conductive upper material, and before or after gate patterning. The change in the boron or nitrogen content of the starting material provides adjustment of the material work function, thereby tuning the threshold voltage of the resulting PMOS or NMOS transistors.

    Abstract translation: 提供了半导体器件和制造方法，其中为MOS晶体管提供金属晶体管栅极。 金属硼化物形成在栅极电介质上方以产生PMOS栅极结构，并且在栅极电介质上形成金属氮化物以提供NMOS栅极结构。 栅极结构的金属部分由起始原料是金属硼化物或金属氮化物形成，之后起始材料通过注入，扩散或扩散形成在PMOS和NMOS区域之一中的硼或氮中。 在形成导电上部材料之前或之后以及栅极图案化之前或之后的其它技术。 起始材料的硼或氮含量的变化提供材料功函数的调整，从而调谐所得PMOS或NMOS晶体管的阈值电压。

    Methods and systems to mitigate etch stop clipping for shallow trench isolation fabrication
    14.
    发明申请
    Methods and systems to mitigate etch stop clipping for shallow trench isolation fabrication 有权
    用于减轻浅沟槽隔离制造的蚀刻停止限幅的方法和系统

    公开(公告)号：US20070134886A1

    公开(公告)日：2007-06-14

    申请号：US11678107

    申请日：2007-02-23

    Applicant: Manuel Quevedo-Lopez ,  James Chambers ,  Leif Olsen

    Inventor： Manuel Quevedo-Lopez ,  James Chambers ,  Leif Olsen

    IPC: H01L21/76

    CPC classification number: H01L29/7842 ,  H01L21/76224 ,  H01L21/823807 ,  H01L21/823878

    Abstract: The present invention facilitates semiconductor fabrication by maintaining shape and density of an etch stop layer (206) during trench fill operations. The shape and density of the etch stop layer (206) is maintained by forming a protective alloy liner layer (310) on the etch stop layer (206) prior to trench fill operations. The protective alloy liner (310) is comprised of an alloy that is resistant to materials employed in the trench fill operations. As a result, clipping and/or damage to the etch stop layer (206) is mitigated thereby facilitating a subsequent planarization process that employs the etch stop layer (206). Additionally, selection of thickness and composition (1706) of the formed protective alloy (310) yields a stress amount and type (1704) that is applied to channel regions of unformed transistor devices, ultimately providing for an improvement in channel mobility.

    Abstract translation: 本发明通过在沟槽填充操作期间保持蚀刻停止层（206）的形状和密度来促进半导体制造。 通过在沟槽填充操作之前在蚀刻停止层（206）上形成保护合金衬垫层（310）来保持蚀刻停止层（206）的形状和密度。 保护合金衬套（310）由对沟槽填充操作中使用的材料具有耐受性的合金构成。 结果，减轻了对蚀刻停止层（206）的削波和/或损伤，从而有利于采用蚀刻停止层（206）的随后的平坦化工艺。 此外，形成的保护合金（310）的厚度和组成（1706）的选择产生施加到未成形晶体管器件的沟道区域的应力量和类型（1704），最终提供了沟道迁移率的改善。

    Work function separation for fully silicided gates
    16.
    发明申请
    Work function separation for fully silicided gates 审中-公开
    完全硅化栅的工作功能分离

    公开(公告)号：US20070037333A1

    公开(公告)日：2007-02-15

    申请号：US11203716

    申请日：2005-08-15

    Applicant: Luigi Colombo ,  James Chambers ,  Mark Visokay

    Inventor： Luigi Colombo ,  James Chambers ,  Mark Visokay

    IPC: H01L21/8234

    CPC classification number: H01L21/823835 ,  H01L21/823842

    Abstract: Forming metal gate transistors that have different work functions is disclosed. In one example, a first metal is added to a first region of polysilicon overlying a dielectric that is on a substrate, and a second metal is added to a second region of the polysilicon. A third metal is formed over the first and second regions and a silicidation process if performed to form a first alloy in the first region and a second alloy in the second region. First and second segregated regions are also established adjacent to the dielectric in the first and second regions, respectively. The first and second metals serve to shift or adjust respective values of first and second work functions in the first and second regions.

    Abstract translation: 公开了具有不同功函数的金属栅极晶体管。 在一个示例中，将第一金属添加到覆盖在衬底上的电介质上的多晶硅的第一区域中，并且将第二金属添加到多晶硅的第二区域。 在第一和第二区域上形成第三金属，如果在第一区域中形成第一合金并且在第二区域中形成第二合金，则形成硅化工艺。 第一和第二分离区域也分别在第一和第二区域中的电介质附近建立。 第一和第二金属用于移动或调整第一和第二区域中的第一和第二功函数的相应值。

    Semiconductor CMOS devices and methods with NMOS high-k dielectric formed prior to core PMOS silicon oxynitride dielectric formation using direct nitridation of silicon
    17.
    发明申请
    Semiconductor CMOS devices and methods with NMOS high-k dielectric formed prior to core PMOS silicon oxynitride dielectric formation using direct nitridation of silicon 有权
    半导体CMOS器件和方法与NMOS高k电介质之间形成核心PMOS氮氧化硅介质形成之前，采用直接氮化硅

    公开(公告)号：US20060246647A1

    公开(公告)日：2006-11-02

    申请号：US11118842

    申请日：2005-04-29

    Applicant: Mark Visokay ,  Luigi Colombo ,  James Chambers

    Inventor： Mark Visokay ,  Luigi Colombo ,  James Chambers

    IPC: H01L21/8238 ,  H01L21/8242

    CPC classification number: H01L27/105 ,  H01L21/823842 ,  H01L21/823857 ,  H01L27/11 ,  H01L27/1116

    Abstract: The present invention facilitates semiconductor fabrication by providing methods of fabrication that selectively form high-k dielectric layers within NMOS regions. An oxide layer is formed in core and I/O regions of a semiconductor device (506). The oxide layer is removed (508) from the core region of the device. A high-k dielectric layer is formed (510) over the core and I/O regions. Then, the high-k dielectric layer is removed (512) from PMOS regions of the core and I/O regions. A silicon nitride layer is grown (516) within PMOS regions of the core and I/O regions by a low temperature thermal process. Subsequently, an oxidation process is performed (518) that oxidizes the silicon nitride into silicon oxynitride.

    Abstract translation: 本发明通过提供在NMOS区内选择性地形成高k电介质层的制造方法来促进半导体制造。 在半导体器件（506）的芯和I / O区域中形成氧化物层。 氧化物层从器件的核心区域移除（508）。 在芯和I / O区域上形成高k电介质层（510）。 然后，从芯和I / O区域的PMOS区域去除高k电介质层（512）。 通过低温热处理在核心和I / O区域的PMOS区域内生长氮化硅层（516）。 随后，进行氧化处理（518），其将氮化硅氧化成氮氧化硅。

    Apparatus and method for data transmission from a rotating control device
    20.
    发明授权
    Apparatus and method for data transmission from a rotating control device 有权
    用于从旋转控制装置进行数据传输的装置和方法

    公开(公告)号：US09074443B2

    公开(公告)日：2015-07-07

    申请号：US12500566

    申请日：2009-07-09

    Applicant: Kevin L. Gray ,  Thomas F. Bailey ,  James Chambers

    Inventor： Kevin L. Gray ,  Thomas F. Bailey ,  James Chambers

    IPC: E21B47/12 ,  E21B21/08 ,  E21B33/08 ,  E21B17/01

    CPC classification number: E21B33/085 ,  E21B3/02 ,  E21B7/12 ,  E21B17/01 ,  E21B21/08 ,  E21B33/064 ,  E21B47/00 ,  E21B47/06 ,  E21B47/065 ,  E21B47/12 ,  E21B47/122 ,  G01V11/002

    Abstract: The present invention generally relates to an apparatus and a method of transmitting data from a rotating control device. In one aspect, a method of transmitting data from a rotating control device coupled to an offshore drilling unit is provided. The method includes the step of generating data relating to a parameter associated with the rotating control device. The method further includes the step of transmitting the data from a transmitting assembly coupled to the rotating control device to a receiving assembly positioned proximate the transmitting assembly. Additionally, the method includes the step of transmitting the data from the receiving assembly to the offshore drilling unit. In another aspect, a data gathering and transmitting system for use with a rotating control device coupled to an offshore drilling unit is provided. In a further aspect, a method for transmitting data generated in a rotating control device coupled to a riser is provided.

    Abstract translation: 本发明一般涉及从旋转控制装置发送数据的装置和方法。 一方面，提供一种从耦合到海上钻井单元的旋转控制装置传送数据的方法。 该方法包括生成与旋转控制装置相关的参数有关的数据的步骤。 该方法还包括将数据从耦合到旋转控制装置的发送组件传送到靠近发射组件定位的接收组件的步骤。 此外，该方法包括将数据从接收组件传送到海上钻井单元的步骤。 在另一方面，提供了一种与耦合到海上钻井单元的旋转控制装置一起使用的数据收集和传送系统。 在另一方面，提供一种用于传送在连接到提升管的旋转控制装置中产生的数据的方法。

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