公开(公告)号：US20110199108A1

公开(公告)日：2011-08-18

申请号：US13095969

申请日：2011-04-28

Applicant: S. Jay Chey ,  Timothy C. Krywanczyk ,  Mohammed S. Shaikh ,  Matthew T. Tiersch ,  Cornelia Tsang

Inventor： S. Jay Chey ,  Timothy C. Krywanczyk ,  Mohammed S. Shaikh ,  Matthew T. Tiersch ,  Cornelia Tsang

IPC: G01R31/20

CPC classification number: G01R3/00 ,  G01R1/07378

Abstract: A silicon chicklet pedestal for use in a wafer-level test probe of a wafer is provided and includes a main body, first and second opposing faces, and an array of vias formed through the main body to extend between the first and second faces, through which pairs of leads, respectively associated with each via at the first and second faces, are electrically connectable to one another.

公开(公告)号：US07001827B2

公开(公告)日：2006-02-21

申请号：US10413698

申请日：2003-04-15

Applicant: Allan D. Abrams ,  Donald W. Brouillette ,  Joseph D. Danaher ,  Timothy C. Krywanczyk ,  Rene A. Lamothe ,  Ivan J. Stone ,  Matthew R. Whalen

Inventor： Allan D. Abrams ,  Donald W. Brouillette ,  Joseph D. Danaher ,  Timothy C. Krywanczyk ,  Rene A. Lamothe ,  Ivan J. Stone ,  Matthew R. Whalen

IPC: H01L21/30 ,  H01L21/46

CPC classification number: H01L21/304 ,  H01L2221/6834

Abstract: There is provided a method for making a wafer including the steps of providing a substrate having a first surface, an opposite second surface, and at least one side edge defining a thickness of the substrate, the at least one side edge having a first peripheral region and a second peripheral region adjacent to the first peripheral region. The method includes applying a fluid to the first surface and the first peripheral region of the at least one side edge and removing the opposite second surface and the second peripheral region of the at least one side edge to form a third surface. A semiconductor chip made from the method for making the wafer is also provided.

Abstract translation: 提供了一种用于制造晶片的方法，包括以下步骤：提供具有第一表面，相对的第二表面的基底和限定基底的厚度的至少一个侧边缘，所述至少一个侧边缘具有第一周边区域 以及与第一周边区域相邻的第二周边区域。 该方法包括将流体施加到至少一个侧边缘的第一表面和第一周边区域，并且移除至少一个侧边缘的相对的第二表面和第二周边区域以形成第三表面。 还提供了由制造晶片的方法制成的半导体芯片。

公开(公告)号：US06455434B1

公开(公告)日：2002-09-24

申请号：US10001562

申请日：2001-10-23

Applicant: Chad R. Binkerd ,  Jose L. Cruz ,  Timothy C. Krywanczyk ,  Brian D. Pfeifer ,  Rosemary A. Previti-Kelly ,  Patricia Schink ,  Amye L. Wells

Inventor： Chad R. Binkerd ,  Jose L. Cruz ,  Timothy C. Krywanczyk ,  Brian D. Pfeifer ,  Rosemary A. Previti-Kelly ,  Patricia Schink ,  Amye L. Wells

IPC: H01L21302

CPC classification number: H01L23/544 ,  H01L21/3212 ,  H01L2223/54473 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present invention provides a method of preventing the build-up of polishing material within low areas of a substrate during polishing. Following the blanket deposition of a first layer, a selectively removable material is deposited over the first layer, wherein the selectively removable material fills the low areas. A surface of the substrate is polished removing the excess first layer and selectively removable material from the surface, leaving the first layer and selectively removable material within the low area. Following polishing, the selectively removable material is removed from the low areas prior to the deposition of a second layer.

Abstract translation: 本发明提供了一种在抛光期间防止抛光材料在衬底的低区域内积聚的方法。 在第一层的覆盖沉积之后，在第一层上沉积可选择性地移除的材料，其中可选择性地移除的材料填充低的区域。 研磨基材的表面，从表面除去多余的第一层和选择性地除去的材料，留下第一层和选择性地可移除的材料在低区域内。 在抛光之后，在沉积第二层之前，从低区域去除可选择性去除的材料。

公开(公告)号：US08163602B2

公开(公告)日：2012-04-24

申请号：US13011509

申请日：2011-01-21

Applicant: Timothy C. Krywanczyk ,  Donald W. Brouillette ,  Steven A. Martel ,  Matthew R. Whalen

Inventor： Timothy C. Krywanczyk ,  Donald W. Brouillette ,  Steven A. Martel ,  Matthew R. Whalen

IPC: H01L21/44

CPC classification number: H01L21/67132

Abstract: There is provided a UV energy curable tape comprising an adhesive material including a UV energy curable oligomer, a UV energy initiator, and a material which emits optical light when the tape composition is substantially fully cured. A semiconductor chip made using the tape is also provided.

Abstract translation: 提供了一种UV能量可固化带，其包括粘合剂材料，其包括UV能量可固化低聚物，UV能量引发剂和当带组合物基本上完全固化时发射光的材料。 还提供了使用带制成的半导体芯片。

公开(公告)号：US07987591B2

公开(公告)日：2011-08-02

申请号：US12540487

申请日：2009-08-13

Applicant: S. Jay Chey ,  Timothy C. Krywanczyk ,  Mohammed S. Shaikh ,  Matthew T. Tiersch ,  Cornelia Kang-I Tsang

Inventor： S. Jay Chey ,  Timothy C. Krywanczyk ,  Mohammed S. Shaikh ,  Matthew T. Tiersch ,  Cornelia Kang-I Tsang

IPC: H01K3/10

CPC classification number: G01R3/00 ,  G01R1/07378

Abstract: A silicon chicklet pedestal for use in a wafer-level test probe of a wafer is provided and includes a main body, first and second opposing faces, and an array of vias formed through the main body to extend between the first and second faces, through which pairs of leads, respectively associated with each via at the first and second faces, are electrically connectable to one another.

Abstract translation: 提供了一种用于晶片的晶片级测试探针中的硅芯座，包括主体，第一和第二相对面以及通过主体形成的通孔阵列，以在第一和第二面之间延伸通过 分别与第一和第二表面上的每个通孔相关联的引线对可彼此电连接。

公开(公告)号：US20110115072A1

公开(公告)日：2011-05-19

申请号：US13011509

申请日：2011-01-21

Applicant: Timothy C. Krywanczyk ,  Donald W. Brouillette ,  Steven A. Martel ,  Matthew R. Whalen

Inventor： Timothy C. Krywanczyk ,  Donald W. Brouillette ,  Steven A. Martel ,  Matthew R. Whalen

IPC: H01L29/00 ,  H01L21/78

CPC classification number: H01L21/67132

Abstract: There is provided a UV energy curable tape comprising an adhesive material including a UV energy curable oligomer, a UV energy initiator, and a material which emits optical light when the tape composition is substantially fully cured. A semiconductor chip made using the tape is also provided.

Abstract translation: 提供了一种UV能量可固化带，其包括粘合剂材料，其包括UV能量可固化低聚物，UV能量引发剂和当带组合物基本上完全固化时发射光的材料。 还提供了使用带制成的半导体芯片。

公开(公告)号：US07844099B2

公开(公告)日：2010-11-30

申请号：US11559990

申请日：2006-11-15

Applicant: Timothy C. Krywanczyk ,  Timothy E. Neary ,  Erik M. Probstfield

Inventor： Timothy C. Krywanczyk ,  Timothy E. Neary ,  Erik M. Probstfield

IPC: G06K9/00

CPC classification number: H01L22/20

Abstract: A method for inspecting a semiconductor wafer fabricated for image sensing operation that has had a transparent protective tape layer applied to a front or active wafer surface. The method includes quantifying chip defects in the image sensor wafer that lie under the protective layer using automatic disposition equipment.

Abstract translation: 一种用于检查制造用于图像感测操作的半导体晶片的方法，其具有施加到前面或活动晶片表面的透明保护带层。 该方法包括使用自动配置设备量化位于保护层下方的图像传感器晶片中的芯片缺陷。

公开(公告)号：US20110037489A1

公开(公告)日：2011-02-17

申请号：US12540487

申请日：2009-08-13

Applicant: S. Jay Chey ,  Timothy C. Krywanczyk ,  Mohammed S. Shaikh ,  Matthew T. Tiersch ,  Cornelia Tsang

Inventor： S. Jay Chey ,  Timothy C. Krywanczyk ,  Mohammed S. Shaikh ,  Matthew T. Tiersch ,  Cornelia Tsang

IPC: G01R31/02 ,  C23F1/00 ,  G03F7/20

CPC classification number: G01R3/00 ,  G01R1/07378

Abstract: A silicon chicklet pedestal for use in a wafer-level test probe of a wafer is provided and includes a main body, first and second opposing faces, and an array of vias formed through the main body to extend between the first and second faces, through which pairs of leads, respectively associated with each via at the first and second faces, are electrically connectable to one another.

公开(公告)号：US20090084499A1

公开(公告)日：2009-04-02

申请号：US11863356

申请日：2007-09-28

Applicant: James R. Johnson ,  Timothy C. Krywanczyk ,  Matthew R. Whalen

Inventor： James R. Johnson ,  Timothy C. Krywanczyk ,  Matthew R. Whalen

IPC: B32B38/10

CPC classification number: H01L21/67092 ,  H01L21/67132 ,  Y10S438/976 ,  Y10T156/1132 ,  Y10T156/1179 ,  Y10T156/1944 ,  Y10T156/1983

Abstract: A method for preventing edge chipping and cracking damage encountered by semiconductor chips in a die picking operation during separation from an adhesive sheet. Also provided is a device for preventing potential edge chipping and cracking damage encountered by a semiconductor chip during die picking processes.

Abstract translation: 一种用于防止在从粘合片分离期间的模具拾取操作中半导体芯片遇到的边缘碎裂和破裂损伤的方法。 还提供了一种用于在拣选过程中防止半导体芯片遇到的潜在边缘碎裂和破裂损坏的装置。

公开(公告)号：US20080138989A1

公开(公告)日：2008-06-12

申请号：US12031726

申请日：2008-02-15

Applicant: Steven R. Codding ,  David Domina ,  James L. Hardy ,  Timothy C. Krywanczyk

Inventor： Steven R. Codding ,  David Domina ,  James L. Hardy ,  Timothy C. Krywanczyk

IPC: H01L21/302

CPC classification number: H01L21/02032

Abstract: Disclosed are embodiments of a method of removing patterned circuit structures from the surface of a semiconductor wafer. The method embodiments comprise blasting the surface of the semiconductor wafer with particles so as to remove substantially all of the patterned circuit structures. The blasting process is followed by one or more grinding, polishing and/or cleaning processes to remove any remaining circuit structures, to remove any lattice damage and/or to achieve a desired smoothness across the surface of the semiconductor wafer.

Abstract translation: 公开了从半导体晶片的表面去除图案化电路结构的方法的实施例。 方法实施例包括用颗粒喷射半导体晶片的表面，以便基本上去除所有图案化的电路结构。 喷砂过程之后是一次或多次研磨，抛光和/或清洁工艺，以除去任何剩余的电路结构，去除任何晶格损伤和/或在半导体晶片的表面上实现期望的平滑度。