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公开(公告)号：US07803506B2
公开(公告)日：2010-09-28
申请号：US11811979
申请日：2007-06-13
Applicant: Kyoung-Yoon Bang , Hae-Young Jeong , Yong-Hoon Kim , Yo-Han Choi , Hyung-Joo Lee
Inventor： Kyoung-Yoon Bang , Hae-Young Jeong , Yong-Hoon Kim , Yo-Han Choi , Hyung-Joo Lee
CPC classification number: G01B11/24 , G03F7/70625 , G06T7/001 , G06T2207/30148
Abstract: A method of measuring a critical dimension may include forming an object pattern on a substrate and forming a plurality of reference patterns on the substrate, wherein each of the plurality of reference patterns has a different critical dimension. An optical property of each of the plurality of reference patterns may be measured to provide a respective measured optical property for each of the reference patterns, and an optical property of the object pattern may be measured to provide a measured optical property of the object pattern. The measured optical property of the object pattern may be compared with the measured optical properties of the reference patterns, and a critical dimension of the object pattern may be determined as being the same as the critical dimension of the reference pattern having the measured optical property that is closest to the measured optical property of the object pattern. Related devices are also discussed.
Abstract translation: 测量临界尺寸的方法可以包括在衬底上形成对象图案并在衬底上形成多个参考图案，其中多个参考图案中的每一个具有不同的临界尺寸。 可以测量多个参考图案中的每一个的光学特性以为每个参考图案提供相应的测量光学特性，并且可以测量对象图案的光学特性以提供对象图案的测量光学特性。 可以将对象图案的测量光学性质与参考图案的测量光学性质进行比较，并且可以将对象图案的临界尺寸确定为与具有测量的光学性质的参考图案的临界尺寸相同， 最接近被测物体图案的光学特性。 还讨论了相关设备。
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12.发明申请System comprising electronic device and external device storing boot code for booting system 有权包括电子设备和外部设备的系统存储引导系统的引导代码公开(公告)号：US20070277027A1
公开(公告)日：2007-11-29
申请号：US11797985
申请日：2007-05-09
Applicant: Yong-Hoon Kim , Yun-Tae Lee , Sung-Up Choi
Inventor： Yong-Hoon Kim , Yun-Tae Lee , Sung-Up Choi
IPC: G06F15/177
CPC classification number: G06F9/4401
Abstract: An electronic information system comprises an external storage device and an application processor. The external storage device stores boot code and the application processor is adapted to receive the boot code from the external storage device and to perform a system booting operation during a power-up operation by executing the boot code.
Abstract translation: 电子信息系统包括外部存储装置和应用处理器。 外部存储装置存储引导代码，并且应用处理器适于从外部存储设备接收引导代码，并且在上电操作期间通过执行引导代码执行系统引导操作。
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公开(公告)号：US5099513A
公开(公告)日：1992-03-24
申请号：US484423
申请日：1990-02-23
Applicant: Yong-Hoon Kim , Kye-Eon Chang
Inventor： Yong-Hoon Kim , Kye-Eon Chang
CPC classification number: H04M19/04
Abstract: An integrated circuit for generating a melody and ring comprises a starting voltage detector a frequency discriminator a controller a ring/melody data ROM an oscillator/frequency doubler a frequency divider a tempo/rhythm generator a chord generator an original-melody generator and an envelope output part. A ring circuit and melody circuit are formed together in one chip, thereby can reduce the prime cost of the telephone by generating selectively a ring signal in a ring mode or a melody signal in a melody mode.
Abstract translation: 用于产生旋律和振铃的集成电路包括起动电压检测器，频率鉴别器a控制器环/旋律数据ROM振荡器/倍频器分频器速度/节奏发生器和弦发生器原始旋律发生器和包络输出 部分。 环形电路和旋律电路一起形成在一个芯片中，从而可以通过以旋律模式选择性地产生振铃信号或旋律信号来降低电话的主要成本。
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公开(公告)号：US09165893B2
公开(公告)日：2015-10-20
申请号：US13229193
申请日：2011-09-09
Applicant: Yong-Hoon Kim , Jong-Joo Lee , Sang-Youb Lee , Young-Don Choi , Hee-Seok Lee
Inventor： Yong-Hoon Kim , Jong-Joo Lee , Sang-Youb Lee , Young-Don Choi , Hee-Seok Lee
CPC classification number: H01L23/645 , H01L24/48 , H01L24/73 , H01L25/105 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48225 , H01L2224/48227 , H01L2224/73253 , H01L2224/73265 , H01L2225/06558 , H01L2225/1023 , H01L2924/00014 , H01L2924/01019 , H01L2924/15311 , H01L2924/181 , H01L2924/30107 , H01L2924/3025 , H01L2924/3511 , H04B5/0012 , H04B5/0031 , H04B5/0037 , H04B5/0075 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
Abstract: A semiconductor device is disclosed including a through electrode. The semiconductor device may include a first semiconductor chip including a transceiver circuit formed on a first surface, a first coupling conductive pattern which is formed on a second surface opposite the first surface, and a through electrode which connects the transceiver circuit and the first coupling conductive pattern. There may be a transceiver located on a second semiconductor chip and including a second coupling conductive pattern facing the first coupling conductive pattern which communicates wirelessly with the first coupling conductive pattern.
Abstract translation: 公开了一种包括通孔的半导体器件。 半导体器件可以包括第一半导体芯片，其包括形成在第一表面上的收发器电路，形成在与第一表面相对的第二表面上的第一耦合导体图案，以及连接收发器电路和第一耦合导电 模式。 可以存在位于第二半导体芯片上的收发器，并且包括面向与第一耦合导电图案无线通信的第一耦合导电图案的第二耦合导电图案。
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公开(公告)号：US08633579B2
公开(公告)日：2014-01-21
申请号：US13208455
申请日：2011-08-12
Applicant: Un-Byoung Kang , Jong-Joo Lee , Yong-Hoon Kim , Tae-Hong Min
Inventor： Un-Byoung Kang , Jong-Joo Lee , Yong-Hoon Kim , Tae-Hong Min
IPC: H01L23/02
CPC classification number: H01L23/49827 , H01L23/3128 , H01L23/367 , H01L23/3677 , H01L25/0657 , H01L25/50 , H01L2224/0401 , H01L2224/05009 , H01L2224/06181 , H01L2224/13025 , H01L2224/16146 , H01L2224/16235 , H01L2224/16245 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06589 , H01L2924/15311
Abstract: A multi-chip package may include a package substrate, an interposer chip, a first semiconductor chip, a thermal dissipation structure and a second semiconductor chip. The interposer chip may be mounted on the package substrate. The first semiconductor chip may be mounted on the interposer chip. The first semiconductor chip may have a size smaller than that of the interposer chip. The thermal dissipation structure may be arranged on the interposer chip to surround the first semiconductor chip. The thermal dissipation structure may transfer heat in the first semiconductor chip to the interposer chip. The second semiconductor chip may be mounted on the first semiconductor chip. Thus, the heat in the first semiconductor chip may be effectively transferred to the interposer chip through the thermal dissipation line.
Abstract translation: 多芯片封装可以包括封装衬底，插入器芯片，第一半导体芯片，散热结构和第二半导体芯片。 插入器芯片可以安装在封装衬底上。 第一半导体芯片可以安装在插入器芯片上。 第一半导体芯片的尺寸可以小于插入器芯片的尺寸。 散热结构可以布置在插入器芯片上以围绕第一半导体芯片。 散热结构可以将第一半导体芯片中的热量传递到插入器芯片。 第二半导体芯片可以安装在第一半导体芯片上。 因此，可以通过散热线将第一半导体芯片中的热量有效地传递到插入器芯片。
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Patent Agency Ranking
公开(公告)号：US08502580B2
公开(公告)日：2013-08-06
申请号：US12648795
申请日：2009-12-29
Applicant: Yong-Hoon Kim , Hyun-Woo Lee
Inventor： Yong-Hoon Kim , Hyun-Woo Lee
IPC: H03L7/06
CPC classification number: H03L7/0814 , H03L7/0816
Abstract: A semiconductor device includes: an internal clock signal generation unit configured to receive an external clock signal and to generate an internal clock signal in response to a control signal; and a monitoring unit configured to monitor environmental elements reflected in a circuit response to the control signal.
Abstract translation: 半导体器件包括：内部时钟信号生成单元，被配置为接收外部时钟信号并响应于控制信号产生内部时钟信号; 以及监视单元，被配置为监视反映在对所述控制信号的电路响应中的环境因素。
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公开(公告)号：US20110304763A1
公开(公告)日：2011-12-15
申请号：US13095155
申请日：2011-04-27
Applicant: Mi-Na Choi , Kyoung-Sei Choi , Hee-Seok Lee , Yong-Hoon Kim , Hee-Jung Hwang , Se-Ran Bae
Inventor： Mi-Na Choi , Kyoung-Sei Choi , Hee-Seok Lee , Yong-Hoon Kim , Hee-Jung Hwang , Se-Ran Bae
IPC: H04N5/225 , H01L31/0216
CPC classification number: H04N5/2253
Abstract: An image sensor chip, a camera module, and devices incorporating the image sensor chip and camera module include a light receiving unit on which light is incident, a logic unit provided to surround the light receiving unit, and an electromagnetic wave shielding layer formed on the logic unit and not formed on the light receiving unit.
Abstract translation: 图像传感器芯片，相机模块以及包含图像传感器芯片和相机模块的装置包括光入射的光接收单元，围绕光接收单元的逻辑单元和形成在该光接收单元上的电磁波屏蔽层 逻辑单元，并且不形成在光接收单元上。
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公开(公告)号：US20110156771A1
公开(公告)日：2011-06-30
申请号：US12648795
申请日：2009-12-29
Applicant: Yong-Hoon Kim , Hyun-Woo Lee
Inventor： Yong-Hoon Kim , Hyun-Woo Lee
IPC: H03L7/06
CPC classification number: H03L7/0814 , H03L7/0816
Abstract: A semiconductor device includes: an internal clock signal generation unit configured to receive an external clock signal and to generate an internal clock signal in response to a control signal; and a monitoring unit configured to monitor environmental elements reflected in a circuit response to the control signal.
Abstract translation: 半导体器件包括：内部时钟信号生成单元，被配置为接收外部时钟信号并响应于控制信号产生内部时钟信号; 以及监视单元，被配置为监视反映在对所述控制信号的电路响应中的环境因素。
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19.发明授权System comprising electronic device and external device storing boot code for booting system 有权包括电子设备和外部设备的系统存储引导系统的引导代码公开(公告)号：US07873822B2
公开(公告)日：2011-01-18
申请号：US11797985
申请日：2007-05-09
Applicant: Yong-Hoon Kim , Yun-Tae Lee , Sung-Up Choi
Inventor： Yong-Hoon Kim , Yun-Tae Lee , Sung-Up Choi
IPC: G06F15/177
CPC classification number: G06F9/4401
Abstract: An electronic information system comprises an external storage device and an application processor. The external storage device stores boot code and the application processor is adapted to receive the boot code from the external storage device and to perform a system booting operation during a power-up operation by executing the boot code.
Abstract translation: 电子信息系统包括外部存储装置和应用处理器。 外部存储装置存储引导代码，并且应用处理器适于从外部存储设备接收引导代码，并且在上电操作期间通过执行引导代码执行系统引导操作。
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公开(公告)号：US07843223B1
公开(公告)日：2010-11-30
申请号：US12494748
申请日：2009-06-30
Applicant: Yong-Hoon Kim
Inventor： Yong-Hoon Kim
IPC: H03K19/0175 , H03K19/0185
CPC classification number: H03K19/018521
Abstract: A semiconductor device includes a buffer unit configured to include first and second buffers, connected to each other in a cross-coupled manner, to receive a reference voltage and to buffer an input signal applied to the first and second buffers based on the reference voltage to drive an output terminal with a current-driving capacity; and a drive power adjustor configured to adjust the current-driving capacity depending on a level of a power supply voltage applied to the buffering unit.
Abstract translation: 半导体器件包括缓冲单元，其被配置为包括以交叉耦合方式彼此连接的第一和第二缓冲器，以接收基准电压，并且基于参考电压缓冲施加到第一和第二缓冲器的输入信号 驱动具有电流驱动能力的输出端子; 以及驱动电力调整器，被配置为根据施加到缓冲单元的电源电压的电平来调整电流驱动能力。
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