公开(公告)号：US08291210B2

公开(公告)日：2012-10-16

申请号：US12986264

申请日：2011-01-07

申请人： Yong-Hoon Kim ,  Yun-Tae Lee ,  Sung-Up Choi

发明人： Yong-Hoon Kim ,  Yun-Tae Lee ,  Sung-Up Choi

IPC分类号： G06F9/24

CPC分类号： G06F9/4401

摘要： An electronic information system comprises an external storage device and an application processor. The external storage device stores boot code and the application processor is adapted to receive the boot code from the external storage device and to perform a system booting operation during a power-up operation by executing the boot code.

摘要翻译： 电子信息系统包括外部存储装置和应用处理器。 外部存储装置存储引导代码，并且应用处理器适于从外部存储设备接收引导代码，并且在上电操作期间通过执行引导代码执行系统引导操作。

公开(公告)号：US20070277027A1

公开(公告)日：2007-11-29

申请号：US11797985

申请日：2007-05-09

申请人： Yong-Hoon Kim ,  Yun-Tae Lee ,  Sung-Up Choi

发明人： Yong-Hoon Kim ,  Yun-Tae Lee ,  Sung-Up Choi

IPC分类号： G06F15/177

CPC分类号： G06F9/4401

摘要： An electronic information system comprises an external storage device and an application processor. The external storage device stores boot code and the application processor is adapted to receive the boot code from the external storage device and to perform a system booting operation during a power-up operation by executing the boot code.

摘要翻译： 电子信息系统包括外部存储装置和应用处理器。 外部存储装置存储引导代码，并且应用处理器适于从外部存储设备接收引导代码，并且在上电操作期间通过执行引导代码执行系统引导操作。

公开(公告)号：US07873822B2

公开(公告)日：2011-01-18

申请号：US11797985

申请日：2007-05-09

申请人： Yong-Hoon Kim ,  Yun-Tae Lee ,  Sung-Up Choi

发明人： Yong-Hoon Kim ,  Yun-Tae Lee ,  Sung-Up Choi

IPC分类号： G06F15/177

CPC分类号： G06F9/4401

摘要： An electronic information system comprises an external storage device and an application processor. The external storage device stores boot code and the application processor is adapted to receive the boot code from the external storage device and to perform a system booting operation during a power-up operation by executing the boot code.

摘要翻译： 电子信息系统包括外部存储装置和应用处理器。 外部存储装置存储引导代码，并且应用处理器适于从外部存储设备接收引导代码，并且在上电操作期间通过执行引导代码执行系统引导操作。

公开(公告)号：US08680667B2

公开(公告)日：2014-03-25

申请号：US13400035

申请日：2012-02-17

申请人： Heung-Kyu Kwon ,  Seong-Ho Shin ,  Yun-Seok Choi ,  Yong-Hoon Kim

发明人： Heung-Kyu Kwon ,  Seong-Ho Shin ,  Yun-Seok Choi ,  Yong-Hoon Kim

IPC分类号： H01L23/02

CPC分类号： H01L24/06 ,  H01L21/563 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49866 ,  H01L24/73 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/13025 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45139 ,  H01L2224/48227 ,  H01L2224/48229 ,  H01L2224/49175 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/18161 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/00014

摘要： A package stack structure may an upper package include an upper package substrate having a first edge and a second edge opposite to the first edge. The upper package substrate has a first region arranged near the first edge and a second region arranged near the second edge. A first upper semiconductor device is mounted on the upper package substrate. The package stack structure may also include a lower package having a lower package substrate and a lower semiconductor device. The lower package is connected to the upper package through a plurality of inter-package connectors. The plurality of the inter-package connectors may include first inter-package connectors configured to transmit data signals; second inter-package connectors configured to transmit address/control signals; third inter-package connectors configured to provide a supply voltage for an address/control circuit; and fourth inter-package connectors configured to provide a supply voltage for a data circuit.

摘要翻译： 封装堆叠结构可以是上封装包括具有第一边缘和与第一边缘相对的第二边缘的上封装基板。 上封装衬底具有布置在第一边缘附近的第一区域和布置在第二边缘附近的第二区域。 第一上半导体器件安装在上封装衬底上。 封装堆叠结构还可以包括具有下封装衬底和下半导体器件的下封装。 下封装通过多个封装间连接器连接到上封装。 多个包装间连接器可以包括被配置为传送数据信号的第一包装间连接器; 配置成发送地址/控制信号的第二串联连接器连接器; 第三组件间连接器，被配置为提供地址/控制电路的电源电压; 以及被配置为提供数据电路的电源电压的第四组件间连接器。

公开(公告)号：US08471613B2

公开(公告)日：2013-06-25

申请号：US12648674

申请日：2009-12-29

申请人： Yong-Hoon Kim ,  Hyun-Woo Lee

发明人： Yong-Hoon Kim ,  Hyun-Woo Lee

IPC分类号： H03L7/06

CPC分类号： H03L7/07 ,  H03L7/0805 ,  H03L7/0814 ,  H03L7/0816 ,  H03L7/0995

摘要： An internal clock signal generation circuit is capable of controlling a unit delay time depending on a frequency of an external clock signal. The internal clock signal generation circuit includes an internal clock signal generation unit configured to generate an internal clock signal corresponding to a plurality of unit delay cells enabled in response to a control signal, and a unit delay time control unit configured to detect a frequency of an external clock signal and control a unit delay time of each of the plurality of unit delay cells.

摘要翻译： 内部时钟信号发生电路能够根据外部时钟信号的频率来控制单位延迟时间。 内部时钟信号发生电路包括：内部时钟信号生成单元，被配置为产生与响应于控制信号而使能的多个单位延迟单元相对应的内部时钟信号;以及单位延迟时间控制单元， 外部时钟信号并且控制多个单元延迟单元中的每一个的单位延迟时间。

公开(公告)号：US20120049352A1

公开(公告)日：2012-03-01

申请号：US13208455

申请日：2011-08-12

申请人： Un-Byoung KANG ,  Jong-Joo Lee ,  Yong-Hoon Kim ,  Tae-Hong Min

发明人： Un-Byoung KANG ,  Jong-Joo Lee ,  Yong-Hoon Kim ,  Tae-Hong Min

IPC分类号： H01L23/498 ,  H01L23/48 ,  H01L21/60

CPC分类号： H01L23/49827 ,  H01L23/3128 ,  H01L23/367 ,  H01L23/3677 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/06181 ,  H01L2224/13025 ,  H01L2224/16146 ,  H01L2224/16235 ,  H01L2224/16245 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06589 ,  H01L2924/15311

摘要： A multi-chip package may include a package substrate, an interposer chip, a first semiconductor chip, a thermal dissipation structure and a second semiconductor chip. The interposer chip may be mounted on the package substrate. The first semiconductor chip may be mounted on the interposer chip. The first semiconductor chip may have a size smaller than that of the interposer chip. The thermal dissipation structure may be arranged on the interposer chip to surround the first semiconductor chip. The thermal dissipation structure may transfer heat in the first semiconductor chip to the interposer chip. The second semiconductor chip may be mounted on the first semiconductor chip. Thus, the heat in the first semiconductor chip may be effectively transferred to the interposer chip through the thermal dissipation line.

摘要翻译： 多芯片封装可以包括封装衬底，插入器芯片，第一半导体芯片，散热结构和第二半导体芯片。 插入器芯片可以安装在封装衬底上。 第一半导体芯片可以安装在插入器芯片上。 第一半导体芯片的尺寸可以小于插入器芯片的尺寸。 散热结构可以布置在插入器芯片上以围绕第一半导体芯片。 散热结构可以将第一半导体芯片中的热量传递到插入器芯片。 第二半导体芯片可以安装在第一半导体芯片上。 因此，可以通过散热线将第一半导体芯片中的热量有效地传递到插入器芯片。

公开(公告)号：US20100308865A1

公开(公告)日：2010-12-09

申请号：US12494748

申请日：2009-06-30

申请人： Yong-Hoon Kim

发明人： Yong-Hoon Kim

IPC分类号： H03K19/0175

CPC分类号： H03K19/018521

摘要： A semiconductor device includes a buffer unit configured to include first and second buffers, connected to each other in a cross-coupled manner, to receive a reference voltage and to buffer an input signal applied to the first and second buffers based on the reference voltage to drive an output terminal with a current-driving capacity; and a drive power adjustor configured to adjust the current-driving capacity depending on a level of a power supply voltage applied to the buffering unit.

摘要翻译： 半导体器件包括缓冲单元，其被配置为包括以交叉耦合方式彼此连接的第一和第二缓冲器，以接收基准电压，并且基于参考电压缓冲施加到第一和第二缓冲器的输入信号 驱动具有电流驱动能力的输出端子; 以及驱动电力调整器，被配置为根据施加到缓冲单元的电源电压的电平来调整电流驱动能力。

公开(公告)号：US07224907B2

公开(公告)日：2007-05-29

申请号：US10459788

申请日：2003-06-12

申请人： Han-Lim Lee ,  Ji-Chai Jeong ,  Yong-Hoon Kim ,  Yun-Je Oh ,  Seong-Taek Hwang

发明人： Han-Lim Lee ,  Ji-Chai Jeong ,  Yong-Hoon Kim ,  Yun-Je Oh ,  Seong-Taek Hwang

IPC分类号： H04B10/04 ,  H04B10/12

CPC分类号： H04B10/505 ,  H04B10/5055 ,  H04B10/508

摘要： A duobinary optical transmission apparatus is provided to generate duobinary optical signals, without using an electric low-pass-filter (LPF), by restricting a bandwidth of a Mach-Zehnder-interferometer-type optical intensity modulator (MZ MOD). Alternatively, a LPF having a single pole with a single capacitor is implemented instead of an expensive LPF, thereby providing a simple transmitter with a lower production cost in comparison with a transmitter using a conventional electric LPF.

摘要翻译： 提供双二进制光传输装置，通过限制马赫 - 曾德干涉仪型光强度调制器（MZ MOD）的带宽，而不使用电气低通滤波器（LPF）来产生双二进制光信号。 或者，实现具有单个电容器的单极点的LPF而不是昂贵的LPF，从而与使用常规电气LPF的发射器相比，提供具有较低生产成本的简单发射器。

公开(公告)号：US06674913B1

公开(公告)日：2004-01-06

申请号：US09693217

申请日：2000-10-20

申请人： Yong-Hoon Kim ,  Kang Gum-Sil

发明人： Yong-Hoon Kim ,  Kang Gum-Sil

IPC分类号： G06K940

CPC分类号： G06T15/20

摘要： A method and apparatus for obtaining high-resolution images of rotating targets by using an image reconstruction algorithm without interpolation, are provided. The method comprises the steps of: a) acquiring initial information; b) calculating parameters; c) computing a start frequency ƒsk and a step frequency &dgr;ƒk; d) measuring data for the target to store them; e) determining whether or not the step d) is completed; f) if the determination result is negative, repeating the steps a) to e); and, if otherwise, obtaining the image; and g) displaying the image. The apparatus comprises means for rotating the controllable target by a predetermined angle; means for generating a first signal; means for transferring the first signal to the controllable target; means for receiving a second signal reflected from the controllable target; means for converting the first and the second signal into a third and forth signal, respectively; and means for processing the third and forth signal to reconstruct an image representing the controllable target, and for controlling the rotating means.

摘要翻译： 提供了一种通过使用无内插的图像重建算法来获得旋转目标的高分辨率图像的方法和装置。 该方法包括以下步骤：a）获取初始信息; b）计算参数; c）计算起始频率fsk和步进频率deltafk; d）测量目标的数据进行存储; e）确定步骤d）是否完成; f）如果确定结果为否定，则重复步骤a）至e）; 如果否则，获取图像; 和g）显示图像。 该装置包括用于使可控对象旋转预定角度的装置; 用于产生第一信号的装置; 用于将第一信号传送到可控目标的装置; 用于接收从可控目标反射的第二信号的装置; 用于分别将第一和第二信号转换成第三和第四信号的装置; 以及用于处理第三和第四信号以重建表示可控目标的图像并且用于控制旋转装置的装置。

公开(公告)号：US09142478B2

公开(公告)日：2015-09-22

申请号：US14102430

申请日：2013-12-10

申请人： Yong-Hoon Kim ,  Ji-Chul Kim ,  Seong-Ho Shin ,  In-Ho Choi

发明人： Yong-Hoon Kim ,  Ji-Chul Kim ,  Seong-Ho Shin ,  In-Ho Choi

IPC分类号： H01L23/367 ,  H01L23/36 ,  H01L23/373 ,  H01L23/498 ,  H01L25/10

CPC分类号： H01L23/36 ,  H01L23/3677 ,  H01L23/373 ,  H01L23/3736 ,  H01L23/49816 ,  H01L24/73 ,  H01L25/105 ,  H01L2224/13025 ,  H01L2224/14181 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16245 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06568 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1094 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor package stack may include a lower semiconductor package and an upper semiconductor package stacked on a lower package board. The upper semiconductor package may include an upper semiconductor chip mounted on an upper package board with an opening configured to expose a lower surface of the upper semiconductor chip and a first heat slug disposed within the opening, contacting the lower surface of the upper semiconductor chip, and contacting an upper surface of a lower semiconductor chip.

摘要翻译： 半导体封装堆叠可以包括下半导体封装和堆叠在下封装板上的上半导体封装。 上半导体封装可以包括安装在上封装板上的上半导体芯片，其具有用于暴露上半导体芯片的下表面的开口和设置在开口内的第一热芯，接触上半导体芯片的下表面， 并接触下半导体芯片的上表面。