公开(公告)号：US08665636B2

公开(公告)日：2014-03-04

申请号：US13237269

申请日：2011-09-20

申请人： Toshikazu Fukuda

发明人： Toshikazu Fukuda

IPC分类号： G11C11/00

CPC分类号： G11C7/222 ,  G11C11/412

摘要： According to one embodiment, when a row address of a port A matches a row address of a port B, a memory cell is accessed only from the port A by controlling a word line potential of the port A based on a third clock, and data is exchanged between a bit line of the port A and the port A based on a first clock and data is exchanged between the bit line of the port A and the port B based on a second clock.

摘要翻译： 根据一个实施例，当端口A的行地址与端口B的行地址匹配时，仅通过基于第三时钟控制端口A的字线电位而仅从端口A访问存储器单元，并且数据 基于第一时钟在端口A的位线和端口A之间交换数据，并且基于第二时钟在端口A的位线和端口B之间交换数据。

公开(公告)号：US20090289310A1

公开(公告)日：2009-11-26

申请号：US12401698

申请日：2009-03-11

申请人： Takayuki Hiraoka ,  Toshikazu Fukuda

发明人： Takayuki Hiraoka ,  Toshikazu Fukuda

IPC分类号： H01L27/088 ,  H01L29/417 ,  H01L21/336

CPC分类号： H01L21/823418 ,  H01L21/823412 ,  H01L27/0251 ,  H01L27/088 ,  H01L27/105 ,  H01L27/10894 ,  H01L27/11 ,  H01L27/1116 ,  H01L29/7848

摘要： A silicon-germanium non-formation region not formed with a silicon germanium layer and a silicon-germanium formation region formed with a silicon germanium layer are provided in a silicon chip, an internal circuit and an input/output buffer are arranged in the silicon-germanium formation region, and a pad electrode and an electrostatic protection element are arranged in the silicon-germanium non-formation region.

摘要翻译： 未形成硅锗层的硅锗非形成区域和形成有硅锗层的硅 - 锗形成区域设置在硅芯片中，内部电路和输入/输出缓冲器布置在硅 - 锗形成区域，以及焊盘电极和静电保护元件布置在硅 - 锗非形成区域中。

公开(公告)号：US5122045A

公开(公告)日：1992-06-16

申请号：US698159

申请日：1991-05-09

申请人： Yutaka Tomisawa ,  Toshikazu Fukuda ,  Kazuhiko Inoue

发明人： Yutaka Tomisawa ,  Toshikazu Fukuda ,  Kazuhiko Inoue

IPC分类号： H01L31/02 ,  H01L23/50 ,  H01L31/0203 ,  H01L43/00 ,  H01S5/022 ,  H05K3/34

CPC分类号： H01L33/62 ,  G01J1/0403 ,  H01L31/0203 ,  H01L33/54 ,  H01S5/02216 ,  H05K3/3426 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/12041 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/181 ,  H01S5/02228 ,  Y02P70/613 ,  Y10S425/228

摘要： A mold for molding a semiconductor package including a semiconductor chip mounted on a lead frame, wherein a major surface of the semiconductor chip is inclined relative to a surface of the semiconductor package, the mold includes a first mold half including a first mold cavity having a first mold surface and at least four first side surfaces, a second mold half including a second mold cavity having a second main surface extending substantially parallel to the first main surface and at least four second side surfaces extending substantially perpendicular to the second main surface, and a portion for supporting the lead frame and the semiconductor chip in the first and second mold cavities and position the major surface of the semiconductor chip in an inclined position relative to the second main surface, wherein the portion for supporting and positioning includes a first mating surface on the first mold half inclined relative to the first main surface and a second mating surface on the second mold half inclined relative to the second main surface.

公开(公告)号：US20110312142A1

公开(公告)日：2011-12-22

申请号：US13222719

申请日：2011-08-31

申请人： Takayuki Hiraoka ,  Toshikazu Fukuda

发明人： Takayuki Hiraoka ,  Toshikazu Fukuda

IPC分类号： H01L21/336

CPC分类号： H01L21/823418 ,  H01L21/823412 ,  H01L27/0251 ,  H01L27/088 ,  H01L27/105 ,  H01L27/10894 ,  H01L27/11 ,  H01L27/1116 ,  H01L29/7848

摘要： A silicon-germanium non-formation region not formed with a silicon germanium layer and a silicon-germanium formation region formed with a silicon germanium layer are provided in a silicon chip, an internal circuit and an input/output buffer are arranged in the silicon-germanium formation region, and a pad electrode and an electrostatic protection element are arranged in the silicon-germanium non-formation region.

摘要翻译： 未形成硅锗层的硅锗非形成区域和形成有硅锗层的硅 - 锗形成区域设置在硅芯片中，内部电路和输入/输出缓冲器布置在硅 - 锗形成区域，以及焊盘电极和静电保护元件布置在硅 - 锗非形成区域中。

公开(公告)号：US5868025A

公开(公告)日：1999-02-09

申请号：US880428

申请日：1997-06-23

申请人： Toshikazu Fukuda ,  Toshihiro Nakashima

发明人： Toshikazu Fukuda ,  Toshihiro Nakashima

IPC分类号： B21D53/78 ,  B21D53/84 ,  B23P15/00 ,  F16H41/28 ,  B21D28/30

CPC分类号： F16H41/28 ,  B21D53/78 ,  B21D53/84 ,  B23P15/00 ,  Y10T29/4933

摘要： According to the present invention, a turbine shell is manufactured by a method which includes the steps of preparing a planar blank, simultaneously forming a plurality of blade fixture slits 32A, 32B and 32C in the blank 40, and deforming the blank 40 into a curved concave shape by effecting drawing work.

公开(公告)号：US4905318A

公开(公告)日：1990-02-27

申请号：US328792

申请日：1989-03-27

申请人： Toshikazu Fukuda ,  Toshihiro Kato

发明人： Toshikazu Fukuda ,  Toshihiro Kato

IPC分类号： H01L43/04 ,  H01L43/06 ,  H01L43/14

CPC分类号： H01L43/14 ,  H01L43/06

摘要： A highly magnetic Hall element comprising a substrate, a Hall element chip mounted on the substrate, and a magnetic member interposed between the substrate and the chip. The magnetic member increases the coercive force of the element, and is formed by laminating resin layers mixed with powder having a high magnetic permeability, one upon another, by stencil printing on that side of a semiconductor wafer in which a Hall element is mounted. The wafer and the magnetic member are diced together, to provide a Hall element chip. The magnetic member formed on the Hall element chip is adhered to substrate, with half-cured surface put in contact with the substrate.

摘要翻译： 一种高磁性霍尔元件，包括基板，安装在基板上的霍尔元件芯片和插入在基板和芯片之间的磁性元件。 磁性部件提高元件的矫顽力，并且通过在其中安装霍尔元件的半导体晶片的那一侧上通过模板印刷层叠与具有高磁导率的粉末混合的树脂层来形成。 将晶片和磁性部件切割在一起，以提供霍尔元件芯片。 形成在霍尔元件芯片上的磁性部件粘附到基板上，半固化表面与基板接触。