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16 条记录 (耗时 0.015 秒)

    Semiconductor storage device
    1.
    发明授权
    Semiconductor storage device 失效
    半导体存储设备

    公开(公告)号：US08665636B2

    公开(公告)日：2014-03-04

    申请号：US13237269

    申请日：2011-09-20

    申请人： Toshikazu Fukuda

    发明人： Toshikazu Fukuda

    IPC分类号： G11C11/00

    CPC分类号： G11C7/222 ,  G11C11/412

    摘要： According to one embodiment, when a row address of a port A matches a row address of a port B, a memory cell is accessed only from the port A by controlling a word line potential of the port A based on a third clock, and data is exchanged between a bit line of the port A and the port A based on a first clock and data is exchanged between the bit line of the port A and the port B based on a second clock.

    摘要翻译： 根据一个实施例，当端口A的行地址与端口B的行地址匹配时，仅通过基于第三时钟控制端口A的字线电位而仅从端口A访问存储器单元，并且数据 基于第一时钟在端口A的位线和端口A之间交换数据，并且基于第二时钟在端口A的位线和端口B之间交换数据。

    Method of manufacturing a compound semiconductor device having gate electrode self-aligned to source and drain electrodes
    3.
    发明授权
    Method of manufacturing a compound semiconductor device having gate electrode self-aligned to source and drain electrodes 失效
    具有栅电极与源电极和漏电极自对准的化合物半导体器件的制造方法

    公开(公告)号：US5409849A

    公开(公告)日：1995-04-25

    申请号：US58684

    申请日：1993-05-07

    申请人： Yoshihiro Kishita ,  Masanori Ochi ,  Souichi Imamura ,  Toshikazu Fukuda

    发明人： Yoshihiro Kishita ,  Masanori Ochi ,  Souichi Imamura ,  Toshikazu Fukuda

    IPC分类号： H01L29/812 ,  H01L21/285 ,  H01L21/335 ,  H01L21/338 ,  H01L29/417 ,  H01L29/423 ,  H01L29/778 ,  H01L21/265

    CPC分类号： H01L29/66863 ,  H01L21/28587 ,  H01L29/42316 ,  H01L29/66462

    摘要： According to this invention, there is provided a method of manufacturing a compound semiconductor which can be formed at a high yield and in which variations in characteristics of elements caused by variations in distances between a source and a gate and between a drain and the gate can be minimized. In addition, there is provided a compound semiconductor device having a structure capable of increasing a power gain and obtaining a high-speed operation. According to this invention, an active layer is formed on a compound semi-conductor substrate, and source/drain electrodes are formed on the active layer to be separated from each other. The wall insulating films are respectively formed on side walls of the electrodes, and a gate electrode is formed between the side wall insulating films to be respectively in contact therewith.

    摘要翻译： 根据本发明，提供一种制造化合物半导体的方法，该化合物半导体可以以高产率形成，并且由源极和栅极之间以及漏极和栅极之间的距离变化引起的元件的特性的变化可以 最小化 此外，提供了具有能够增加功率增益并获得高速操作的结构的化合物半导体器件。 根据本发明，在复合半导体基板上形成有源层，在有源层上形成源极/漏极，以分离。 壁绝缘膜分别形成在电极的侧壁上，并且在侧壁绝缘膜之间形成分别与其接触的栅电极。

    SEMICONDUCTOR STORAGE DEVICE
    5.
    发明申请
    SEMICONDUCTOR STORAGE DEVICE 失效
    半导体存储设备

    公开(公告)号：US20120236661A1

    公开(公告)日：2012-09-20

    申请号：US13237269

    申请日：2011-09-20

    申请人： Toshikazu Fukuda

    发明人： Toshikazu Fukuda

    IPC分类号： G11C8/16 ,  G11C7/06

    CPC分类号： G11C7/222 ,  G11C11/412

    摘要： According to one embodiment, when a row address of a port A matches a row address of a port B, a memory cell is accessed only from the port A by controlling a word line potential of the port A based on a third clock, and data is exchanged between a bit line of the port A and the port A based on a first clock and data is exchanged between the bit line of the port A and the port B based on a second clock.

    摘要翻译： 根据一个实施例，当端口A的行地址与端口B的行地址匹配时，仅通过基于第三时钟控制端口A的字线电位而仅从端口A访问存储器单元，并且数据 基于第一时钟在端口A的位线和端口A之间交换数据，并且基于第二时钟在端口A的位线和端口B之间交换数据。

    Semiconductor device
    8.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08030713B2

    公开(公告)日：2011-10-04

    申请号：US12401698

    申请日：2009-03-11

    申请人： Takayuki Hiraoka ,  Toshikazu Fukuda

    发明人： Takayuki Hiraoka ,  Toshikazu Fukuda

    IPC分类号： H01L27/088

    CPC分类号： H01L21/823418 ,  H01L21/823412 ,  H01L27/0251 ,  H01L27/088 ,  H01L27/105 ,  H01L27/10894 ,  H01L27/11 ,  H01L27/1116 ,  H01L29/7848

    摘要： A silicon-germanium non-formation region not formed with a silicon germanium layer and a silicon-germanium formation region formed with a silicon germanium layer are provided in a silicon chip, an internal circuit and an input/output buffer are arranged in the silicon-germanium formation region, and a pad electrode and an electrostatic protection element are arranged in the silicon-germanium non-formation region.

    摘要翻译： 未形成硅锗层的硅锗非形成区域和形成有硅锗层的硅锗形成区域设置在硅芯片中，内部电路和输入/输出缓冲器布置在硅 - 锗形成区域，以及焊盘电极和静电保护元件布置在硅 - 锗非形成区域中。