公开(公告)号：US4822751A

公开(公告)日：1989-04-18

申请号：US30904

申请日：1987-03-31

申请人： Akira Ishizu ,  Tadashi Nishimura ,  Yasuo Inoue

发明人： Akira Ishizu ,  Tadashi Nishimura ,  Yasuo Inoue

IPC分类号： H01L27/12 ,  H01L21/20 ,  H01L21/205 ,  H01L21/263 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L29/78 ,  H01L29/786 ,  H01L21/268

CPC分类号： H01L21/0262 ,  H01L21/0242 ,  H01L21/02491 ,  H01L21/02532 ,  H01L21/02639 ,  H01L27/1214 ,  H01L29/66757 ,  H01L29/78633 ,  Y10S148/091 ,  Y10S148/093

摘要： A thin film semiconductor device is formed by preparing a substrate, forming a pattern of metal thin film on the substrate, forming an insulating layer on the metal thin film, and forming a pattern of a semiconductor thin film active layer, which is self-aligned to the pattern of the metal thin film, by laser CVD.

摘要翻译： 通过准备基板来形成薄膜半导体器件，在基板上形成金属薄膜图案，在金属薄膜上形成绝缘层，并形成自对准的半导体薄膜有源层的图案 通过激光CVD到金属薄膜的图案。

公开(公告)号：US4787740A

公开(公告)日：1988-11-29

申请号：US11329

申请日：1987-02-05

申请人： Yasuo Inoue ,  Tadashi Nishimura ,  Kazuyuki Sugahara ,  Shigeru Kusunoki

发明人： Yasuo Inoue ,  Tadashi Nishimura ,  Kazuyuki Sugahara ,  Shigeru Kusunoki

IPC分类号： H01L21/66 ,  G01N21/00 ,  G01N21/21 ,  G01N21/65 ,  G01N21/84

CPC分类号： G01N21/65 ,  G01N2021/656 ,  G01N2021/8477 ,  G01N21/21 ,  G01N21/658

摘要： An apparatus for determining crystal orientation comprises: a polarizer for polarizing an incident light beam; a polarization analyzer for selecting light having a selected polarization direction in Raman scattered light; and a synchronizer for enabling synchronous rotations of the polarizer and the polarization analyzer.

摘要翻译： 一种用于确定晶体取向的装置包括：用于偏振入射光束的偏振器; 偏振分析器，用于选择拉曼散射光中具有所选偏振方向的光; 以及用于实现偏振器和偏振分析器的同步旋转的同步器。

公开(公告)号：US4694143A

公开(公告)日：1987-09-15

申请号：US815069

申请日：1985-12-31

申请人： Tadashi Nishimura ,  Kazuyuki Sugahara ,  Shigeru Kusunoki ,  Yasuo Inoue

发明人： Tadashi Nishimura ,  Kazuyuki Sugahara ,  Shigeru Kusunoki ,  Yasuo Inoue

IPC分类号： H01L21/20 ,  C30B13/28 ,  H01L21/26 ,  H05B3/00 ,  H05B3/64 ,  F27B5/14 ,  F27D11/00

CPC分类号： C30B13/28 ,  H05B3/0047

摘要： A zone melting apparatus, in accordance with the present invention for monocrystallizing a semiconductor layer in a layered substance, includes: an upper elongated heater for zone melting of the semiconductor layer, the upper heater being disposed above and parallel to the semiconductor layer; a plurality of lower elongated heaters for heating the whole layered substance, the lower heaters being disposed in a plane below and parallel to the layered substance and the axis of each of the lower heaters being substantially perpendicular to the axis of the upper heater; a plurality of power suppliers for supplying electric power to the lower heaters; one or more temperature sensors for estimating the temperature of the layered substance; and a controller for controlling the power suppliers in response to the output of the temperature sensor(s), the controller making control so that the temperature of the central portion of the layered substance is slightly lower than that of the outer portions thereof.

摘要翻译： 根据本发明的用于使层状物质中的半导体层单晶化的区域熔化装置包括：用于半导体层的区域熔化的上部细长加热器，上部加热器设置在半导体层的上方并平行; 多个下部细长加热器，用于加热整个层状物质，下部加热器设置在层叠物质下方并平行的平面中，并且每个下部加热器的轴线基本上垂直于上部加热器的轴线; 用于向下部加热器供电的多个供电装置; 用于估计分层物质的温度的一个或多个温度传感器; 以及控制器，用于响应于温度传感器的输出来控制供电器，控制器进行控制，使得层状物质的中心部分的温度略低于其外部部分的温度。

公开(公告)号：US4523962A

公开(公告)日：1985-06-18

申请号：US561104

申请日：1983-12-13

申请人： Tadashi Nishimura

发明人： Tadashi Nishimura

IPC分类号： C30B13/00 ,  C30B13/24 ,  C30B13/34 ,  H01L21/20 ,  H01L21/263 ,  B05D3/06

CPC分类号： C30B13/34 ,  C30B13/00 ,  C30B13/24 ,  C30B29/60 ,  H01L21/02381 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02683 ,  H01L21/02691 ,  Y10S117/904 ,  Y10S148/091

摘要： A method for fabricating a monocrystalline semiconductor layer on an insulating layer in the production of a semiconductor device wherein the location of grain boundaries is accurately controlled, thereby making the crystal orientation of the monocrystalline semiconductor layer uniform over a large area. An antireflection layer is formed above a polycrystalline of amorphous semiconductor layer formed on a main face of a monocrystalline semiconductor substrate which contacts the monocrystalline semiconductor substrate through windows formed in a thick insulating layer. The antireflection layer includes a first portion which covers all of the area of the polycrystalline or amorphous semiconductor layer above the windows, and a second portion, which has the form of a grid composed of parallel lines extending from the first portion in the direction of the crystallographic axis of the monocrystalline semiconductor substrate and partially covering a second area between the first areas. A laser beam is scanned from the first portions of the antireflection layer above the windows in directions parallel to the lines of the grid of the antireflection layer.

摘要翻译： 在半导体器件的制造中在绝缘层上制造单晶半导体层的方法，其中晶界的位置被精确地控制，从而使单晶半导体层的晶体取向在大面积上均匀。 在通过形成在厚绝缘层中的窗口与单晶半导体衬底接触的单晶半导体衬底的主面上形成的非晶半导体层的多晶上方形成抗反射层。 抗反射层包括覆盖窗户上方的多晶或非晶半导体层的全部区域的第一部分和第二部分，该第二部分具有网格的形式，该网格由平行线组成，该平行线从第一部分沿着 单晶半导体衬底的晶轴并且部分覆盖第一区域之间的第二区域。 从窗口上方的防反射层的第一部分扫描激光束，方向平行于抗反射层的栅格线。

公开(公告)号：US4367263A

公开(公告)日：1983-01-04

申请号：US274538

申请日：1981-06-17

申请人： Hiroshi Kawahara ,  Tadashi Nishimura ,  Masatsugu Funakoshi ,  Masaharu Nishimatsu

发明人： Hiroshi Kawahara ,  Tadashi Nishimura ,  Masatsugu Funakoshi ,  Masaharu Nishimatsu

IPC分类号： C09D5/23 ,  C09D7/12 ,  G11B5/706 ,  G11B5/716 ,  H01F10/02

CPC分类号： G11B5/70642 ,  G11B5/716 ,  Y10S428/90 ,  Y10T428/265

摘要： A magnetic recording medium comprises a first magnetic layer containing magnetite or a cobalt doped magnetite which is coated on a non-magnetic substrate; and a second magnetic layer coating a cobalt doped .gamma.-Fe.sub.2 O.sub.3 which is coated on said first magnetic layer.The magnetic recording medium has a high recording sensitivity, a high dynamic range, a less output fluctuation and especially superior sensitivity in low frequency band and superior maximum output level without a deterioration of transfer characteristics.

摘要翻译： 磁记录介质包括涂覆在非磁性基底上的包含磁铁矿或钴掺杂磁铁矿的第一磁性层; 以及涂覆在所述第一磁性层上的钴掺杂的γ-Fe2O3的第二磁性层。 磁记录介质具有高记录灵敏度，高动态范围，较小的输出波动，并且在低频带下特别优异的灵敏度和优异的最大输出电平，而不会导致传输特性的恶化。

公开(公告)号：US5986037A

公开(公告)日：1999-11-16

申请号：US987608

申请日：1997-12-09

申请人： Masaaki Miyamoto ,  Kenji Tsuruhara ,  Tadashi Nishimura

发明人： Masaaki Miyamoto ,  Kenji Tsuruhara ,  Tadashi Nishimura

IPC分类号： C08G64/24 ,  C08G64/00

CPC分类号： C08G64/24

摘要： There is provided a polycarbonate resin with a reduced volatile chlorine content in which the amount of a chlorinous matter as volatilized from the resin when the resin is heated at 280.degree. C. for 30 minutes and then allowed to stand at room temperature for 3 days is 30 ppb or lower as calculated in terms of the amount of Cl atom. There is also provided a process for producing a polycarbonate resin using phosgene as a raw material, the improvement comprising using phosgene having a chlorine concentration of up to 1,000 ppb as the raw material thereby to provide the resin with a reduced volatile chlorine content.

摘要翻译： 提供了一种具有降低的挥发性氯含量的聚碳酸酯树脂，其中当树脂在280℃下加热30分钟然后在室温下放置3天时，从树脂中挥发的氯化物的量为 30ppb以下，以Cl原子的量计算。 还提供了使用光气作为原料制造聚碳酸酯树脂的方法，改进之处在于使用氯浓度高达1,000ppb的光气作为原料，从而为树脂提供降低的挥发性氯含量。

公开(公告)号：US5659194A

公开(公告)日：1997-08-19

申请号：US614256

申请日：1996-03-12

申请人： Toshiaki Iwamatsu ,  Yasuo Inoue ,  Yasuo Yamaguchi ,  Tadashi Nishimura

发明人： Toshiaki Iwamatsu ,  Yasuo Inoue ,  Yasuo Yamaguchi ,  Tadashi Nishimura

IPC分类号： H01L21/28 ,  H01L21/265 ,  H01L21/336 ,  H01L21/76 ,  H01L21/84 ,  H01L27/12 ,  H01L29/45 ,  H01L29/78 ,  H01L29/786 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062

CPC分类号： H01L21/26506 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/41783 ,  H01L29/458 ,  H01L29/66507 ,  H01L29/66659 ,  H01L29/66772 ,  H01L21/26586 ,  H01L29/78621

摘要： A semiconductor device in which parasitic resistance of source/drain regions can be reduced than the parasitic resistance of the drain region, and manufacturing method thereof, can be obtained. In the semiconductor device, inactivating ions are implanted only to the source region of the semiconductor layer, so as to damage the crystal near the surface of the semiconductor layer, whereby siliciding reaction is promoted. Therefore, in the source region, a titanium silicide film which is thicker can be formed.

摘要翻译： 可以获得其中源极/漏极区域的寄生电阻可以比漏极区域的寄生电阻降低的半导体器件及其制造方法。 在半导体装置中，仅将钝化离子注入到半导体层的源极区域，以损坏半导体层的表面附近的晶体，从而促进了硅化反应。 因此，在源极区域中，可以形成更厚的硅化钛膜。

公开(公告)号：US5440161A

公开(公告)日：1995-08-08

申请号：US273175

申请日：1994-07-26

申请人： Toshiaki Iwamatsu ,  Yasuo Yamaguchi ,  Yasuo Inoue ,  Tadashi Nishimura

发明人： Toshiaki Iwamatsu ,  Yasuo Yamaguchi ,  Yasuo Inoue ,  Tadashi Nishimura

IPC分类号： H01L21/76 ,  H01L21/8238 ,  H01L21/8242 ,  H01L21/84 ,  H01L27/08 ,  H01L27/092 ,  H01L27/108 ,  H01L27/12 ,  H01L29/06 ,  H01L29/40 ,  H01L29/78 ,  H01L29/786 ,  H01L27/01 ,  H01L21/265

CPC分类号： H01L29/402 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/78609 ,  H01L29/78612

摘要： A buried oxide film 4 is formed on a main surface of a silicon substrate 1. An SOI layer 5 is formed on buried oxide film 4. Channel stop regions 22a and 22b respectively connected to channel regions of an nMOS 2 and a pMOS 3 are formed in an element isolation region of SOI layer 5. nMOS 2 and pMOS 3 are formed in an element formation region of SOI layer. A concentration of a p type impurity or an n type impurity included in channel stop regions 22a and 22b is higher than a concentration of the p type impurity or the n type impurity included in the channel region of nMOS 2 or the channel region of pMOS 3. An FS gate 16 is formed on channel stop regions 22a and 22b with an FS gate oxide film 15 interposed therebetween. Therefore, a semiconductor device having an SOI structure which is capable of suppressing a parasitic bipolar operation by drawing out efficiently excessive carriers stored in the channel region of transistor can be obtained.

摘要翻译： 在硅衬底1的主表面上形成掩埋氧化膜4.在掩埋氧化物膜4上形成SOI层5.形成分别连接到nMOS 2和pMOS 3的沟道区的沟道停止区22a和22b 在SOI层5的元件隔离区域中，在SOI层的元件形成区域中形成nMOS 2和pMOS 3。 包含在通道停止区域22a和22b中的ap型杂质或n型杂质的浓度高于包含在nMOS 2的沟道区域或pMOS 3的沟道区域中的p型杂质或n型杂质的浓度。 FS沟道栅极16形成在通道阻挡区域22a和22b上，其中FS栅氧化膜15插入其间。 因此，可以获得具有SOI结构的半导体器件，该半导体器件能够通过有效地抽出存储在晶体管的沟道区域中的过多的载流子来抑制寄生双极性操作。

公开(公告)号：US5424225A

公开(公告)日：1995-06-13

申请号：US269287

申请日：1994-06-30

申请人： Yasuo Yamaguchi ,  Tadashi Nishimura

发明人： Yasuo Yamaguchi ,  Tadashi Nishimura

IPC分类号： H01L21/84 ,  H01L21/336 ,  H01L29/78 ,  H01L29/786 ,  H01L21/265 ,  H01L21/266

CPC分类号： H01L29/66772 ,  H01L29/786 ,  H01L29/78612 ,  H01L29/78615 ,  H01L2924/0002

摘要： An MOS field effect transistor comprises a channel region (6) of a first conductivity type formed in a semiconductor layer (3) on an insulator substrate (2), a source region (8) and a drain region (9) of a second conductivity type formed in contact with one and the other sides of the channel region (6) in the semiconductor layer (3), respectively, a body region (7) formed in contact with at least a part of the channel region (6) and a part of a periphery of the source region (8) in the semiconductor layer (3) and having a higher impurity concentration than that of the channel region (6), a gate dielectric thin film (4) and a gate electrode (5) formed on the channel region (6), and a conductor (14a) connected in common to the source region (8) and the body region (7).

摘要翻译： MOS场效应晶体管包括形成在绝缘体基板（2）上的半导体层（3）中的第一导电类型的沟道区（6），具有第二导电性的源区（8）和漏区（9） 分别与半导体层（3）中的沟道区（6）的一侧和另一侧接触形成与沟道区（6）的至少一部分形成的主体区（7）和 半导体层（3）中的源极区域（8）的周边的一部分并且具有比沟道区域（6）的杂质浓度更高的杂质浓度，形成栅极电介质薄膜（4）和栅电极（5） 在沟道区域（6）上，以及与源区（8）和体区（7）共同连接的导体（14a）。

公开(公告)号：US5413968A

公开(公告)日：1995-05-09

申请号：US22876

申请日：1993-02-25

申请人： Yasuo Inoue ,  Kazuyuki Sugahara ,  Takashi Ipposhi ,  Yasuo Yamaguchi ,  Tadashi Nishimura

发明人： Yasuo Inoue ,  Kazuyuki Sugahara ,  Takashi Ipposhi ,  Yasuo Yamaguchi ,  Tadashi Nishimura

IPC分类号： H01L21/3205 ,  H01L21/285 ,  H01L21/768 ,  H01L23/485 ,  H01L23/52 ,  H01L23/522 ,  H01L27/11 ,  H01L21/44

CPC分类号： H01L21/28518 ,  H01L23/485 ,  H01L27/11 ,  H01L27/1112 ,  H01L2924/0002

摘要： A semiconductor device includes a conductor layer (3, 7) having a silicon crystal, an insulator layer (5, 15) formed on the surface of the conductor layer (3, 7) having a contact hole therethrough to said surface of the conductor layer (3, 7), an interconnecting portion formed at a predetermined location in the insulator layer (5, 15) and having a contact hole (6, 9) the bottom surface of which becomes the surface of the conductor layer (3, 7), a barrier layer (14) formed at the bottom of said contact hole at least on the surface of the conductor layer (3, 7) in the interconnecting portion, and a metal silicide layer (12) formed on the barrier layer (14). This semiconductor device is manufactured by depositing the insulator layer (5, 15) having the contact hole (6, 9) on the conductor layer (3, 7) having the silicon crystal, forming the barrier layer (14) and the polysilicon layer (7, 10) overlapping each other in the contact hole (6, 9) and on the insulator layer (5, 15) and then patterning these overlapping barrier layer (14) and polysilicon layer (7, 10), forming a metal layer (8, 11) thereon to be silicidized, and removing unreacted metal. The semiconductor device thus manufactured prevents a suction of silicon from the conductor layer (3, 7) to the metal silicide layer (12) and hence prevents an increase in resistance value due to a deficiency of silicon produced in the conductor layer (3, 7), thereby minimizing a series resistance of the metal silicide layer (12), a contact portion and the conductor layer (3, 7).

摘要翻译： 半导体器件包括具有硅晶体的导体层（3,7），形成在导体层（3,7）的表面上的绝缘体层（5,15），其具有穿过其的导体层的所述表面的接触孔 （3,7），形成在所述绝缘体层（5,15）中的预定位置处并具有其底表面成为所述导体层（3,7）的表面的接触孔（6,9）的互连部分， 至少在所述互连部分中的所述导体层（3,7）的表面上形成在所述接触孔的底部处的阻挡层（14）和形成在所述阻挡层（14）上的金属硅化物层（12） 。 该半导体器件通过在具有硅晶体的导体层（3,7）上沉积具有接触孔（6,9）的绝缘体层（5,15），形成阻挡层（14）和多晶硅层（ 7,10）在接触孔（6,9）和绝缘体层（5,15）上彼此重叠，然后对这些重叠的阻挡层（14）和多晶硅层（7,10）进行构图，形成金属层 8,11）在其上被硅化，并除去未反应的金属。 这样制造的半导体器件防止硅从导体层（3,7）吸收到金属硅化物层（12），从而防止由于导体层（3,7）中产生的硅的缺陷导致的电阻值增加 ），从而使金属硅化物层（12），接触部分和导体层（3,7）的串联电阻最小化。