IC package substrate with over voltage protection function
    13.
    发明申请
    IC package substrate with over voltage protection function 失效
    IC封装基板具有过压保护功能

    公开(公告)号:US20030038345A1

    公开(公告)日:2003-02-27

    申请号:US10219514

    申请日:2002-08-15

    发明人: Chun-Yuan Lee

    CPC分类号: H01L23/62 H01L2224/16225

    摘要: The present invention relates to an IC package substrate provided with over voltage protection function and thus, a plurality of over voltage protection devices are provided on a single substrate to protect an IC chip directly. According to the present invention, there is no need to install multiple protection devices on a printed circuit board. Therefore, the costs to design circuits are reduced, the limited space is effectively utilized, and unit costs to install respective protection devices are lowered down.

    摘要翻译: 本发明涉及具有过电压保护功能的IC封装基板,因此,在单个基板上设置多个过电压保护器件,以直接保护IC芯片。 根据本发明,不需要在印刷电路板上安装多个保护装置。 因此,减少了设计电路的成本,有效地利用了有限的空间,并且降低了安装各个保护装置的单位成本。

    Semiconductor integrated circuit device
    15.
    发明申请
    Semiconductor integrated circuit device 有权
    半导体集成电路器件

    公开(公告)号:US20030020098A1

    公开(公告)日:2003-01-30

    申请号:US10201284

    申请日:2002-07-24

    申请人: NEC CORPORATION

    发明人: Hirofumi Sasaki

    IPC分类号: H01L027/10 H01L023/552

    摘要: A shield portion 5 has such a multi-layer wiring construction comprised of three wiring layers as to correspond to a macro cell and also via contacts formed with a predetermined spacing therebetween and is supplied with a predetermined potential (for example, a ground potential) but not connected to a power wiring or a ground wiring in the macro cell. This configuration makes it possible to hold the wiring layers of the shield portion at roughly the same potential. Accordingly, noise originated from the wiring layer as a signal line is blocked in propagation by the shield portion and so does not affect a signal flowing through a wiring layer.

    摘要翻译: 屏蔽部分5具有这样的多层布线结构,其由三个布线层构成,对应于宏单元,并且还通过以预定间隔形成的触点,并且被提供有预定电位(例如,地电位),但是 未连接到宏单元中的电源接线或接地线。 这种构造使得可以将屏蔽部分的布线层保持在大致相同的电位。 因此,作为信号线的布线层产生的噪声在屏蔽部分的传播中被阻挡,因此不影响流过布线层的信号。

    Electrode arrangement for circuit energy conditioning
    16.
    发明申请
    Electrode arrangement for circuit energy conditioning 失效
    电路布置用于电路能量调节

    公开(公告)号:US20020027263A1

    公开(公告)日:2002-03-07

    申请号:US09929528

    申请日:2001-08-14

    IPC分类号: H01L023/552

    摘要: A predetermined electrode arrangement (1-1, 1-2, 1-3A, 1-6) comprising a plurality of shielded electrodes (213, 215) and a plurality of shielding electrodes (204, 214, 269A, 269B,) that together with other conductive (799, 206, 208, 207, 203, 218, 216, 217, 218) semi-conductive (not shown) and/or non-conductive material elements (212) are formed into a multi-functional energy conditioning assembly (1-1, 1-2, 1-3A, 1-6) or variant to be selectively coupled into circuitry (4-1, 5-1, 1-2).

    摘要翻译: 包括多个屏蔽电极(213,215)和多个屏蔽电极(204,214,269A,269B)的预定电极布置(1-1,1-2,3-3A,1-6),其一起 与其它导电(799,206,208,207,203,218,216,217,218)半导体(未示出)和/或非导电材料元件(212)形成为多功能能量调节组件 (1-1,1-2,1-3A,1-6)或变体选择性地耦合到电路(4-1,5-1,1-2)中。

    Semiconductor integrated circuit device and method for fabricating the same
    18.
    发明申请
    Semiconductor integrated circuit device and method for fabricating the same 有权
    半导体集成电路器件及其制造方法

    公开(公告)号:US20040108577A1

    公开(公告)日:2004-06-10

    申请号:US10664874

    申请日:2003-09-22

    发明人: Minoru Okamoto

    IPC分类号: H01L023/552 H01L023/48

    摘要: A semiconductor integrated circuit including a digital circuit and an analog circuit which are integrated on a single semiconductor chip comprises a first electrostatic destruction protection circuit, connected to a digital circuit, for protecting the digital circuit from destruction caused by ESD therein by an influence of an input digital signal and a second electrostatic destruction protection circuit, connected to an analog circuit, for protecting the analog circuit from destruction caused by ESD therein by an influence of an input analog signal. A first grounding conductor connected to the first electrostatic destruction protection circuit and a second grounding conductor connected to the second electrostatic destruction protection circuit are connected to each other outside the semiconductor integrated circuit.

    摘要翻译: 包括集成在单个半导体芯片上的数字电路和模拟电路的半导体集成电路包括连接到数字电路的第一静电破坏保护电路,用于保护数字电路免受其中的ESD的影响, 输入数字信号和第二静电破坏保护电路,连接到模拟电路,用于通过输入模拟信号的影响来保护模拟电路免受其中的ESD的破坏。 连接到第一静电破坏保护电路的第一接地导体和连接到第二静电破坏保护电路的第二接地导体在半导体集成电路外部彼此连接。

    Semiconductor device and liquid jetting device using the same
    19.
    发明申请
    Semiconductor device and liquid jetting device using the same 有权
    半导体装置及使用其的液体喷射装置

    公开(公告)号:US20040007767A1

    公开(公告)日:2004-01-15

    申请号:US10615288

    申请日:2003-07-09

    IPC分类号: H01L023/552

    摘要: A semiconductor device having a plurality of electrothermal conversion elements and a plurality of switching elements for flowing current through the electrothermal conversion elements, respectively formed on a semiconductor substrate of a first conductivity type, wherein each of the switching elements is an insulated gate field effect transistor including: a first semiconductor region of a second conductivity type opposite to the first conductivity type, the first semiconductor region being formed on a principal surface of the semiconductor substrate, a second semiconductor region of the first conductivity type for providing a channel region, the second semiconductor region being formed adjacent to the first semiconductor region, a source region of the second conductivity type formed in a surface layer of the second semiconductor region, a drain region of the second conductivity type formed in a surface layer of the first semiconductor region, and a gate electrode formed on a gate insulating film on the channel region, and a resistivity of the semiconductor substrate is 5 to 18 nullcm, and the first semiconductor region has a depth of 2.0 to 2.2 nullm along a depth direction of the semiconductor substrate and an impurity concentration of 1null1014 to 1null1018/cm3.

    摘要翻译: 一种半导体器件,具有多个电热转换元件和多个开关元件,用于使电流流过电热转换元件,分别形成在第一导电类型的半导体衬底上,其中每个开关元件是绝缘栅场效应晶体管 包括:与所述第一导电类型相反的第二导电类型的第一半导体区域,所述第一半导体区域形成在所述半导体衬底的主表面上,所述第一导电类型的第二半导体区域用于提供沟道区域,所述第二半导体区域 半导体区域形成在第一半导体区域附近,形成在第二半导体区域的表面层中的第二导电类型的源极区域,形成在第一半导体区域的表面层中的第二导电类型的漏极区域,以及 形成在栅极上的栅电极 并且半导体衬底的电阻率为5〜18Ω·cm,第一半导体区域沿着半导体衬底的深度方向的深度为2.0〜2.2μm,杂质浓度为1×10 14Ω·cm, 至1×10 18 / cm 3。