公开(公告)号：US20140199809A1

公开(公告)日：2014-07-17

申请号：US14204620

申请日：2014-03-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiromichi GODO ,  Kengo AKIMOTO ,  Shunpei YAMAZAKI

IPC: H01L29/66

CPC classification number: H01L29/78693 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02573 ,  H01L21/02631 ,  H01L29/24 ,  H01L29/66742 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: An object is to reduce to reduce variation in threshold voltage to stabilize electric characteristics of thin film transistors each using an oxide semiconductor layer. An object is to reduce an off current. The thin film transistor using an oxide semiconductor layer is formed by stacking an oxide semiconductor layer containing insulating oxide over the oxide semiconductor layer so that the oxide semiconductor layer and source and drain electrode layers are in contact with each other with the oxide semiconductor layer containing insulating oxide interposed therebetween; whereby, variation in threshold voltage of the thin film transistors can be reduced and thus the electric characteristics can be stabilized. Further, an off current can be reduced.

Abstract translation: 目的是为了减小阈值电压的变化，以稳定每个使用氧化物半导体层的薄膜晶体管的电特性。 目的是减少关断电流。 使用氧化物半导体层的薄膜晶体管通过在氧化物半导体层上层叠含有绝缘氧化物的氧化物半导体层而形成，使得氧化物半导体层和源极和漏极电极层彼此接触，氧化物半导体层包含绝缘体 介于其间的氧化物; 从而可以减小薄膜晶体管的阈值电压的变化，从而能够稳定电特性。 此外，可以减少截止电流。

公开(公告)号：US20140186997A1

公开(公告)日：2014-07-03

申请号：US14196236

申请日：2014-03-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Junichiro SAKATA ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Miyuki HOSOBA ,  Masayuki SAKAKURA ,  Yoshiaki OIKAWA

IPC: H01L29/66

CPC classification number: H01L21/477 ,  G02F1/133345 ,  G02F1/1368 ,  H01L21/02565 ,  H01L21/02664 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1251 ,  H01L27/1259 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696

Abstract: An object is to provide a display device with excellent display characteristics, where a pixel circuit and a driver circuit provided over one substrate are formed using transistors which have different structures corresponding to characteristics of the respective circuits. The driver circuit portion includes a driver circuit transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using a metal film, and a channel layer is formed using an oxide semiconductor. The pixel portion includes a pixel transistor in which a gate electrode layer, a source electrode layer, and a drain electrode layer are formed using an oxide conductor, and a semiconductor layer is formed using an oxide semiconductor. The pixel transistor is formed using a light-transmitting material, and thus, a display device with higher aperture ratio can be manufactured.

Abstract translation: 本发明的目的是提供具有优异显示特性的显示装置，其中使用具有对应于各个电路的特性的不同结构的晶体管形成设置在一个基板上的像素电路和驱动电路。 驱动器电路部分包括驱动电路晶体管，其中使用金属膜形成栅电极层，源电极层和漏电极层，并且使用氧化物半导体形成沟道层。 像素部分包括其中使用氧化物导体形成栅电极层，源电极层和漏电极层的像素晶体管，并且使用氧化物半导体形成半导体层。 像素晶体管使用透光材料形成，因此可以制造具有较高开口率的显示装置。

公开(公告)号：US20140183532A1

公开(公告)日：2014-07-03

申请号：US14199257

申请日：2014-03-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Hiroki OHARA ,  Tatsuya HONDA ,  Takatsugu OMATA ,  Yusuke NONAKA ,  Masahiro TAKAHASHI ,  Akiharu MIYANAGA

IPC: H01L29/786

CPC classification number: H01L29/78696 ,  H01L29/045 ,  H01L29/1033 ,  H01L29/247 ,  H01L29/7869 ,  H01L29/78693

Abstract: An oxide semiconductor film which has more stable electric conductivity is provided. Further, a semiconductor device which has stable electric characteristics and high reliability is provided by using the oxide semiconductor film. An oxide semiconductor film includes a crystalline region, and the crystalline region includes a crystal in which an a-b plane is substantially parallel with a surface of the film and a c-axis is substantially perpendicular to the surface of the film; the oxide semiconductor film has stable electric conductivity and is more electrically stable with respect to irradiation with visible light, ultraviolet light, and the like. By using such an oxide semiconductor film for a transistor, a highly reliable semiconductor device having stable electric characteristics can be provided.

Abstract translation: 提供了具有更稳定的导电性的氧化物半导体膜。 此外，通过使用氧化物半导体膜提供具有稳定的电特性和高可靠性的半导体器件。 氧化物半导体膜包括结晶区域，并且结晶区域包括其中a-b平面基本上平行于膜的表面并且c轴基本上垂直于膜的表面的晶体; 氧化物半导体膜具有稳定的导电性，并且相对于可见光，紫外线等的照射而言更加电稳定。 通过使用这种用于晶体管的氧化物半导体膜，可以提供具有稳定电特性的高可靠性半导体器件。

公开(公告)号：US20140110709A1

公开(公告)日：2014-04-24

申请号：US14140044

申请日：2013-12-24

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kengo AKIMOTO ,  Junichiro SAKATA ,  Takuya HIROHASHI ,  Masahiro TAKAHASHI ,  Hideyuki KISHIDA ,  Akiharu MIYANAGA

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L21/02565 ,  H01L21/28079 ,  H01L21/28158 ,  H01L29/04 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78693

Abstract: It is an object to provide an oxide semiconductor which is suitable for use in a semiconductor device. Alternatively, it is another object to provide a semiconductor device using the oxide semiconductor. Provided is a semiconductor device including an In—Ga—Zn—O based oxide semiconductor layer in a channel formation region of a transistor. In the semiconductor device, the In—Ga—Zn—O based oxide semiconductor layer has a structure in which crystal grains represented by InGaO3(ZnO)m (m=1) are included in an amorphous structure represented by InGaO3(ZnO)m (m>0).

Abstract translation: 本发明的目的是提供一种适用于半导体器件的氧化物半导体。 或者，另一目的是提供一种使用氧化物半导体的半导体器件。 提供了在晶体管的沟道形成区域中包括In-Ga-Zn-O系氧化物半导体层的半导体器件。 在半导体器件中，In-Ga-Zn-O系氧化物半导体层具有以InGaO 3（ZnO）m（m = 1）表示的晶粒包含在由InGaO 3（ZnO）m（ m> 0）。

公开(公告)号：US20130299824A1

公开(公告)日：2013-11-14

申请号：US13944992

申请日：2013-07-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kengo AKIMOTO ,  Shunpei YAMAZAKI

IPC: H01L29/786

CPC classification number: H01L29/66742 ,  H01L27/1225 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/7869

Abstract: An object is to prevent an impurity such as moisture and oxygen from being mixed into an oxide semiconductor and suppress variation in semiconductor characteristics of a semiconductor device in which an oxide semiconductor is used. Another object is to provide a semiconductor device with high reliability. A gate insulating film provided over a substrate having an insulating surface, a source and a drain electrode which are provided over the gate insulating film, a first oxide semiconductor layer provided over the source electrode and the drain electrode, and a source and a drain region which are provided between the source electrode and the drain electrode and the first oxide semiconductor layer are provided. A barrier film is provided in contact with the first oxide semiconductor layer.

Abstract translation: 本发明的目的是防止诸如水分和氧气的杂质混入氧化物半导体中并抑制其中使用氧化物半导体的半导体器件的半导体特性的变化。 另一个目的是提供一种具有高可靠性的半导体器件。 提供在具有绝缘表面的衬底上的栅极绝缘膜，设置在栅极绝缘膜上的源极和漏极，设置在源电极和漏极上的第一氧化物半导体层，以及源极和漏极区 设置在源电极和漏电极之间以及第一氧化物半导体层。 提供与第一氧化物半导体层接触的阻挡膜。

公开(公告)号：US20130214270A1

公开(公告)日：2013-08-22

申请号：US13763874

申请日：2013-02-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Daisuke KAWAE

IPC: H01L29/786

CPC classification number: H01L29/41733 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/1225 ,  H01L27/1288 ,  H01L29/4908 ,  H01L29/786 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696 ,  H01L51/0508 ,  H01L51/0512 ,  H01L51/0545 ,  H01L51/105

Abstract: A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle θ1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle θ2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased.

Abstract translation: 下栅极薄膜晶体管中的源电极和漏电极之间可能发生的电场浓度被放宽并且抑制了开关特性的劣化的结构及其制造方法。 制造在栅极和漏极之上设置氧化物半导体层的底栅极薄膜晶体管，并且与氧化物半导体层接触的源电极的侧表面的角度θ1和侧面的角度θ2 与氧化物半导体层接触的漏电极的表面各自被设定为大于或等于20°且小于90°，​​使得从每个的侧表面的顶边到底边的距离 电极增加。

公开(公告)号：US20130153889A1

公开(公告)日：2013-06-20

申请号：US13710867

申请日：2012-12-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Yusuke NONAKA ,  Hiroshi KANEMURA

IPC: H01L29/24 ,  H01L21/02

CPC classification number: H01L29/247 ,  H01L21/02422 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/1225 ,  H01L29/04 ,  H01L29/045 ,  H01L29/24 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: To manufacture a highly reliable semiconductor device by giving stable electric characteristics to a transistor. An oxide semiconductor film is deposited by a sputtering method with the use of a polycrystalline sputtering target. In that case, partial pressure of water in a deposition chamber before or in the deposition is set to be lower than or equal to 10−3 Pa, preferably lower than or equal to 10−4 Pa, more preferably lower than or equal to 10−5 Pa. Thus, a dense oxide semiconductor film is obtained. The density of the oxide semiconductor film is higher than 6.0 g/cm3 and lower than 6.375 g/cm3.

Abstract translation: 通过给晶体管提供稳定的电特性来制造高度可靠的半导体器件。 通过使用多晶溅射靶的溅射法沉积氧化物半导体膜。 在这种情况下，淀积室内或沉积中的水的分压设定为低于或等于10 -3 Pa，优选低于或等于10 -4 Pa，更优选低于或等于10 -5Pa。因此，获得了致密的氧化物半导体膜。 氧化物半导体膜的密度高于6.0g / cm 3，低于6.375g / cm 3。

公开(公告)号：US20130126878A1

公开(公告)日：2013-05-23

申请号：US13727085

申请日：2012-12-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Atsushi UMEZAKI

IPC: H01L29/12

CPC classification number: H01L27/124 ,  G09G3/3233 ,  G09G2310/0286 ,  G09G2310/0297 ,  H01L21/02565 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1259 ,  H01L29/12 ,  H01L29/4908 ,  H01L29/513 ,  H01L29/518

Abstract: With an increase in the definition of a display device, the number of pixels is increased, and thus the numbers of gate lines and signal lines are increased. The increase in the numbers of gate lines and signal lines makes it difficult to mount an IC chip having a driver circuit for driving the gate line and the signal line by bonding or the like, which causes an increase in manufacturing costs. A pixel portion and a driver circuit driving the pixel portion are provided over the same substrate. The pixel portion and at least a part of the driver circuit are formed using thin film transistors in each of which an oxide semiconductor is used. Both the pixel portion and the driver circuit are provided over the same substrate, whereby manufacturing costs are reduced.

公开(公告)号：US20130092934A1

公开(公告)日：2013-04-18

申请号：US13706589

申请日：2012-12-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kengo AKIMOTO ,  Shigeki KOMORI ,  Hideki UOCHI ,  Tomoya FUTAMURA ,  Takahiro KASAHARA

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L27/0266 ,  H01L27/1225 ,  H01L27/124

Abstract: The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate electrode; a first wiring layer and a second wiring layer which are over the gate insulating film and whose end portions overlap with the gate electrode; and an oxide semiconductor layer which is over the gate electrode and in contact with the gate insulating film and the end portions of the first wiring layer and the second wiring layer. The gate electrode of the non-linear element and a scan line or a signal line is included in a wiring, the first or second wiring layer of the non-linear element is directly connected to the wiring so as to apply the potential of the gate electrode.

Abstract translation: 保护电路使用非线性元件形成，该非线性元件包括覆盖栅电极的栅极绝缘膜; 第一布线层和第二布线层，其在栅极绝缘膜上方并且其端部与栅电极重叠; 以及氧化物半导体层，其在所述栅电极的上方并与所述栅极绝缘膜和所述第一布线层和所述第二布线层的端部接触。 非线性元件的栅电极和扫描线或信号线包括在布线中，非线性元件的第一或第二布线层直接连接到布线，以施加栅极的电位 电极。

公开(公告)号：US20130069060A1

公开(公告)日：2013-03-21

申请号：US13677504

申请日：2012-11-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kengo AKIMOTO ,  Junichiro SAKATA ,  Takuya HIROHASHI ,  Masahiro TAKAHASHI ,  Hideyuki KISHIDA ,  Akiharu MIYANAGA

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L21/02565 ,  H01L21/28079 ,  H01L21/28158 ,  H01L29/04 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78693

Abstract: It is an object to provide an oxide semiconductor which is suitable for use in a semiconductor device. Alternatively, it is another object to provide a semiconductor device using the oxide semiconductor. Provided is a semiconductor device including an In—Ga—Zn—O based oxide semiconductor layer in a channel formation region of a transistor. In the semiconductor device, the In—Ga—Zn—O based oxide semiconductor layer has a structure in which crystal grains represented by InGaO3(ZnO)m (m=1) are included in an amorphous structure represented by InGaO3(ZnO)m (m>0).

Abstract translation: 本发明的目的是提供一种适用于半导体器件的氧化物半导体。 或者，另一目的是提供一种使用氧化物半导体的半导体器件。 提供了在晶体管的沟道形成区域中包括In-Ga-Zn-O系氧化物半导体层的半导体器件。 在半导体器件中，In-Ga-Zn-O系氧化物半导体层具有以InGaO 3（ZnO）m（m = 1）表示的晶粒包含在由InGaO 3（ZnO）m（ m> 0）。