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公开(公告)号:US09780121B2
公开(公告)日:2017-10-03
申请号:US14639336
申请日:2015-03-05
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Kazunori Watanabe , Hiroyuki Miyake , Shunpei Yamazaki
IPC: H01L27/12
CPC classification number: H01L27/124 , G06F3/0412 , G06F3/044 , G06F2203/04102 , G06F2203/04103 , H01L27/1225 , H01L27/1255
Abstract: To provide a touch sensor including a transistor and a capacitor in which the transistor and the capacitor are electrically connected to each other, the capacitor includes a pair of electrodes and a dielectric layer, the dielectric layer is located between the pair of electrodes, and one of the pair of electrodes includes an oxide conductor layer. To provide a touch panel including the touch sensor, a light-blocking layer, and a display element in which the touch sensor is located more on the display surface side of the touch panel than on the display element side, the light-blocking layer is located more on the display surface side than on the touch sensor side, the display element includes a portion overlapping with the capacitor, and the light-blocking layer includes a portion overlapping with the transistor.
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公开(公告)号:US09716182B2
公开(公告)日:2017-07-25
申请号:US14823044
申请日:2015-08-11
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Shunpei Yamazaki , Daisuke Matsubayashi , Hiroyuki Miyake
IPC: H01L29/00 , H01L29/786 , H01L29/24 , H01L29/04 , H01L29/423 , H01L29/51 , H01L29/417
CPC classification number: H01L29/7869 , H01L29/045 , H01L29/24 , H01L29/41733 , H01L29/42356 , H01L29/42384 , H01L29/513 , H01L29/518 , H01L29/78627 , H01L29/78696
Abstract: A highly reliable semiconductor device is provided. The semiconductor device includes a gate electrode, a gate insulating film over the gate electrode, a semiconductor film overlapping with the gate electrode with the gate insulating film positioned therebetween, a source electrode and a drain electrode that are in contact with the semiconductor film, and an oxide film over the semiconductor film, the source electrode, and the drain electrode. An end portion of the semiconductor film is spaced from an end portion of the source electrode or the drain electrode in a region overlapping with the semiconductor film in a channel width direction. The semiconductor film and the oxide film each include a metal oxide including In, Ga, and Zn. The oxide film has an atomic ratio where the atomic percent of In is lower than the atomic percent of In in the atomic ratio of the semiconductor film.
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公开(公告)号:US09704894B2
公开(公告)日:2017-07-11
申请号:US14269827
申请日:2014-05-05
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake , Shunpei Yamazaki
IPC: H01L27/12 , G02F1/1362
CPC classification number: H01L27/1225 , G02F1/133345 , G02F1/13439 , G02F1/136213 , G02F1/1368 , G02F2201/123 , G02F2202/10 , H01L27/1248 , H01L27/1255 , H01L27/3248 , H01L27/3262 , H01L27/3265 , H01L29/7869 , H01L51/5206
Abstract: To provide a display device including a transistor that includes an oxide semiconductor and has favorable characteristics, a pixel electrode electrically connected to the transistor, and a capacitor electrically connected to the pixel electrode. To provide a display device that can be manufactured at low cost. The display device includes a display element including a pixel electrode, a transistor that performs switching of the display element and includes a first oxide semiconductor layer serving as a channel formation region, a capacitor that is electrically connected to the display element and includes a dielectric layer between a pair of electrodes. The pixel electrode is a second oxide semiconductor layer formed on the same surface as that on which the first oxide semiconductor layer is formed, and also serves as one electrode of the capacitor.
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公开(公告)号:US09614022B2
公开(公告)日:2017-04-04
申请号:US14616995
申请日:2015-02-09
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake , Hisao Ikeda
CPC classification number: H01L27/3293 , H01L27/3204 , H01L27/3297 , H01L51/0097 , H01L51/5212 , H01L51/5228 , H01L2251/5338 , Y02E10/549
Abstract: To provide a display device that is suitable for increasing in size, a display device in which display unevenness is suppressed, or a display device that can display an image along a curved surface. The display device includes a first display panel and a second display panel each including a pair of substrates. The first display panel and the second display panel each include a first region which can transmit visible light, a second region which can block visible light, and a third region which can perform display. The third region of the first display panel and the first region of the second display panel overlap each other. The third region of the first display panel and the second region of the second display panel do not overlap each other.
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公开(公告)号:US09606408B2
公开(公告)日:2017-03-28
申请号:US15001325
申请日:2016-01-20
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Atsushi Umezaki , Hiroyuki Miyake
IPC: G02F1/1368 , H01L27/12 , G02F1/1362 , G09G3/20 , G09G3/3233 , G09G3/3275 , G09G3/34 , G09G3/36 , H01L29/423 , H01L27/15
CPC classification number: G02F1/1368 , G02F1/136286 , G09G3/20 , G09G3/2022 , G09G3/3233 , G09G3/3266 , G09G3/3275 , G09G3/342 , G09G3/3426 , G09G3/3677 , G09G3/3685 , G09G2300/043 , G09G2300/0852 , G09G2310/0248 , G09G2310/0262 , G09G2310/027 , G09G2310/0275 , G09G2310/0286 , G09G2310/0297 , G09G2320/0233 , G09G2320/043 , G09G2330/021 , G09G2340/02 , G09G2352/00 , H01L27/12 , H01L27/1214 , H01L27/1222 , H01L27/124 , H01L27/1251 , H01L27/1255 , H01L27/156 , H01L27/3232 , H01L27/3276 , H01L29/42384 , H01L2924/0002 , H01L2924/00
Abstract: An object of the invention is to provide a circuit technique which enables reduction in power consumption and high definition of a display device. A switch controlled by a start signal is provided to a gate electrode of a transistor, which is connected to a gate electrode of a bootstrap transistor. When the start signal is input, a potential is supplied to the gate electrode of the transistor through the switch, and the transistor is turned off. The transistor is turned off, so that leakage of a charge from the gate electrode of the bootstrap transistor can be prevented. Accordingly, time for storing a charge in the gate electrode of the bootstrap transistor can be shortened, and high-speed operation can be performed.
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公开(公告)号:US09594281B2
公开(公告)日:2017-03-14
申请号:US14080034
申请日:2013-11-14
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake
IPC: G02F1/1343 , G02F1/1362 , G09G3/36
CPC classification number: G02F1/136213 , G02F2001/134372 , G09G3/3614 , G09G3/3655 , G09G2300/0876
Abstract: A liquid crystal display device preventing flicker. The liquid crystal display device includes a plurality of pixels each having a transistor, a liquid crystal element to which a first signal and a second signal having opposite polarities are alternately applied through the transistor, and a capacitor including a first electrode and a second electrode. The liquid crystal element includes a pixel electrode and a common electrode partly overlapping with each other with an insulating film interposed therebetween, and a liquid crystal layer over the pixel electrode and the common electrode. The first electrode of the capacitor is electrically connected to the pixel electrode. The potential of the second electrode changes between a first potential and a second potential having different levels after the first signal is applied until the second signal is applied, whereby a change in the voltage applied to the liquid crystal layer is reduced.
Abstract translation: 一种防止闪烁的液晶显示装置。 液晶显示装置包括:具有晶体管的多个像素,具有相反极性的第一信号和第二信号通过晶体管交替施加的液晶元件,以及包括第一电极和第二电极的电容器。 液晶元件包括像素电极和共同电极,其中间隔绝缘膜彼此部分重叠,并且在像素电极和公共电极上方形成液晶层。 电容器的第一电极电连接到像素电极。 在施加第一信号之后,第二电极的电位在施加了第一信号之后在具有不同电平的第一电位和第二电位之间变化,直到施加到液晶层的电压发生变化。
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公开(公告)号:US09583063B2
公开(公告)日:2017-02-28
申请号:US14474330
申请日:2014-09-02
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Hiroyuki Miyake
CPC classification number: G09G3/3677 , G02F1/134336 , G02F1/136286 , G02F1/1368 , G09G2300/0814 , G09G2310/0286 , G09G2310/06 , G09G2310/08 , G09G2320/0223 , G09G2330/021 , G11C19/28 , G11C19/287
Abstract: A scan line to which a selection signal or a non-selection signal is input from its end, and a transistor in which a clock signal is input to a gate, the non-selection signal is input to a source, and a drain is connected to the scan line are provided. A signal input to the end of the scan line is switched from the selection signal to the non-selection signal at the same or substantially the same time as the transistor is turned on. The non-selection signal is input not only from one end but also from both ends of the scan line. This makes it possible to inhibit the potentials of portions in the scan line from being changed at different times.
Abstract translation: 从其端部输入选择信号或非选择信号的扫描线和将时钟信号输入到栅极的晶体管,非选择信号被输入到源极,并且漏极连接 提供到扫描线。 与晶体管导通相同或基本上相同的时间,将输入到扫描线的末端的信号从选择信号切换到非选择信号。 非选择信号不仅从一端输入,而且从扫描线的两端输入。 这使得可以抑制扫描线中的部分的电位在不同时间被改变。
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公开(公告)号:US09543039B2
公开(公告)日:2017-01-10
申请号:US14831939
申请日:2015-08-21
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Seiko Amano , Hiroyuki Miyake
CPC classification number: G09G3/3677 , G06F1/3265 , G06F3/038 , G09G3/3266 , G09G5/008 , G09G2300/0809 , G09G2300/0871 , G09G2310/0205 , G09G2310/0248 , G09G2310/0286 , G09G2310/08 , G09G2320/0247 , G09G2330/021 , G11C19/28 , H01L27/124
Abstract: In a pulse output circuit in a shift register, a power source line which is connected to a transistor in an output portion connected to a pulse output circuit at the next stage is set to a low-potential drive voltage, and a power source line which is connected to a transistor in an output portion connected to a scan signal line is set to a variable potential drive voltage. The variable potential drive voltage is the low-potential drive voltage in a normal mode, and can be either a high-potential drive voltage or the low-potential drive voltage in a batch mode. In the batch mode, display scan signals can be output to a plurality of scan signal lines at the same timing in a batch.
Abstract translation: 在移位寄存器的脉冲输出电路中,连接到与下一级的脉冲输出电路连接的输出部中的晶体管的电源线被设定为低电位驱动电压,电源线 连接到连接到扫描信号线的输出部分中的晶体管被设置为可变电位驱动电压。 可变电位驱动电压是正常模式下的低电位驱动电压,可以是高电位驱动电压或分批模式的低电位驱动电压。 在批量模式中,可以在批次中以相同的定时将显示扫描信号输出到多条扫描信号线。
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公开(公告)号:US09536904B2
公开(公告)日:2017-01-03
申请号:US14982042
申请日:2015-12-29
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hiroyuki Miyake , Junichi Koezuka , Masami Jintyou , Yukinori Shima , Shunpei Yamazaki
IPC: H01L27/15 , H01L27/12 , H01L29/24 , H01L29/786 , H01L27/32
CPC classification number: H01L27/1225 , H01L27/1237 , H01L27/124 , H01L27/1251 , H01L27/1255 , H01L27/3262 , H01L29/24 , H01L29/7869
Abstract: A light-emitting device capable of suppressing variation in luminance among pixels is provided. A light-emitting device includes a pixel and first and second circuits. The first circuit has a function of generating a signal including a value of current extracted from the pixel. The second circuit has a function of correcting an image signal by the signal. The pixel includes at least a light-emitting element and first and second transistors. The first transistor has a function of controlling supply of the current to the light-emitting element by the image signal. The second transistor has a function of controlling extraction of the current from the pixel. A semiconductor film of each of the first and second transistors includes a first semiconductor region overlapping with a gate, a second semiconductor region in contact with a source or a drain, and a third semiconductor region between the first and second semiconductor regions.
Abstract translation: 提供能够抑制像素之间的亮度变化的发光装置。 发光装置包括像素和第一和第二电路。 第一电路具有产生包括从像素提取的电流值的信号的功能。 第二电路具有通过该信号校正图像信号的功能。 像素至少包括发光元件和第一和第二晶体管。 第一晶体管具有通过图像信号控制向发光元件的电流的供给的功能。 第二晶体管具有控制从像素提取电流的功能。 第一和第二晶体管中的每一个的半导体膜包括与栅极重叠的第一半导体区域,与源极或漏极接触的第二半导体区域以及第一和第二半导体区域之间的第三半导体区域。
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公开(公告)号:US09508861B2
公开(公告)日:2016-11-29
申请号:US14272742
申请日:2014-05-08
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Hiroyuki Miyake , Kenichi Okazaki , Masahiko Hayakawa , Shinpei Matsuda
IPC: H01L29/786 , G02F1/1368
CPC classification number: H01L27/1225 , G02F1/134309 , G02F1/1368 , H01L27/1237 , H01L27/124 , H01L29/78648 , H01L29/7869 , H01L29/78696
Abstract: A semiconductor device which includes an oxide semiconductor and in which formation of a parasitic channel due to a gate BT stress is suppressed is provided. Further, a semiconductor device including a transistor having excellent electrical characteristics is provided. The semiconductor device includes a transistor having a dual-gate structure in which an oxide semiconductor film is provided between a first gate electrode and a second gate electrode; gate insulating films are provided between the oxide semiconductor film and the first gate electrode and between the oxide semiconductor film and the second gate electrode; and in the channel width direction of the transistor, the first or second gate electrode faces a side surface of the oxide semiconductor film with the gate insulating film between the oxide semiconductor film and the first or second gate electrode.
Abstract translation: 提供了一种半导体器件,其包括氧化物半导体,并且其中抑制了由于栅极BT应力而形成的寄生沟道。 此外,提供了包括具有优异电特性的晶体管的半导体器件。 半导体器件包括具有双栅极结构的晶体管,其中氧化物半导体膜设置在第一栅电极和第二栅电极之间; 在所述氧化物半导体膜和所述第一栅电极之间以及所述氧化物半导体膜和所述第二栅电极之间设置栅绝缘膜; 并且在晶体管的沟道宽度方向上,第一或第二栅电极与氧化物半导体膜与第一或第二栅电极之间的栅极绝缘膜面对氧化物半导体膜的侧面。
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