Method of multi-processing object using polygon mirror
    242.
    发明授权
    Method of multi-processing object using polygon mirror 有权
    使用多面镜的多处理对象的方法

    公开(公告)号:US07713780B2

    公开(公告)日:2010-05-11

    申请号:US11902602

    申请日:2007-09-24

    CPC classification number: B23K26/082 B23K26/0821 B23K26/40 B23K2103/172

    Abstract: A method of multi-processing an object using a polygon mirror according to an embodiment of the invention includes setting processing parameters for individual layers of an object having a multilayer structure, performing laser processing on exposed layers in a region to be processed of the object according to the processing parameters using a polygon mirror, determining whether or not all of the layers of the object having a multilayer structure are processed, and if it is determined in the determining that not all of the layers are processed, progressing the performing of laser processing. Therefore, efficiency in processing the object can be increased, and cracks that occur in the object during laser processing using a polygon mirror can be minimized.

    Abstract translation: 根据本发明的实施例的使用多面镜对物体进行多处理的方法包括设置具有多层结构的物体的各层的处理参数,对待处理的物体的区域中的暴露层进行激光处理, 涉及使用多面镜的处理参数,确定是否处理具有多层结构的对象的所有层,并且如果确定不是所有的层都被处理,则进行激光加工的执行 。 因此,能够提高加工对象物的效率,能够使使用多面镜的激光加工时的物体发生的裂缝最小化。

    Protrudable connector structure for electronic device
    244.
    发明授权
    Protrudable connector structure for electronic device 失效
    电子设备的突出连接器结构

    公开(公告)号:US07713075B2

    公开(公告)日:2010-05-11

    申请号:US11829347

    申请日:2007-07-27

    CPC classification number: H01R13/639

    Abstract: A protrudable connector structure that includes a first frame having a first guiding hole; a second frame having a push button and a second guiding hole that overlaps with the first guiding hole when the push button is pressed; a pin inserted into the first guiding hole and the second guiding hole so that the pin moves along the first and second guiding holes; a connector member coupled to the pin; and a link that presses the pin, wherein when the pin is located in a first locking groove portion of the second guiding hole, the connector member is locked so as not to protrude outside of the housing, and when the pin is located in a second locking groove portion of the second guiding hole, the connector member is locked so as not to be inserted into the housing.

    Abstract translation: 一种可突出的连接器结构,包括具有第一引导孔的第一框架; 第二框架,当按下按钮时,具有按钮和与第一导向孔重叠的第二导向孔; 插入第一引导孔和第二引导孔中的销,使得销沿着第一和第二引导孔移动; 耦合到所述销的连接器构件; 以及按压销的连杆,其中当所述销位于所述第二引导孔的第一锁定槽部分中时,所述连接器构件被锁定以便不突出到所述壳体的外部,并且当所述销位于所述第二引导孔的第二 第二引导孔的锁定槽部分,连接器构件被锁定以便不被插入到壳体中。

    Method and apparatus for controlling congestion of nodes in ad-hoc network
    245.
    发明授权
    Method and apparatus for controlling congestion of nodes in ad-hoc network 有权
    用于控制自组织网络节点拥塞的方法和装置

    公开(公告)号:US07710870B2

    公开(公告)日:2010-05-04

    申请号:US11743646

    申请日:2007-05-02

    CPC classification number: H04W28/02 H04W74/08 H04W76/20 H04W84/18

    Abstract: Provided is a method and apparatus for controlling congestion of a node in an ad-hoc network comprising: classifying a channel state into a busy channel state and an idle channel state and then monitoring the channel state; performing contention for acquiring a channel with neighboring nodes when data to be transmitted is present during the monitoring of the channel state; calculating an available bandwidth on the basis of the channel state when wins the contention; and determining the amount of data to be transmitted on the basis of the available bandwidth. The nodes in the ah-hoc network monitor their own wireless channel state so as to obtain channel contention information, calculate an available bandwidth from the channel contention information, and control a transmission amount on the basis of the available bandwidth. Accordingly, the nodes can avoid excessive traffic which exceeds channel capacity. Channel contention, which is the most immediate and important cause of a decrease in network performance, can be loosened.

    Abstract translation: 提供了一种用于控制自组织网络中的节点的拥塞的方法和装置,包括:将信道状态分类为忙信道状态和空闲信道状态,然后监视信道状态; 当在监视信道状态期间存在要发送的数据时,执行与相邻节点获取信道的竞争; 在赢得竞争时基于渠道状态计算可用带宽; 以及基于可用带宽确定要发送的数据量。 ah-hoc网络中的节点监控其自身的无线信道状态,以获得信道争用信息,从信道争用信息中计算可用带宽,并根据可用带宽控制传输量。 因此,节点可以避免超过信道容量的超量业务。 频道争用是网络性能下降最直接和最重要的原因,可以放宽。

    METHOD FOR PROVIDING MOBILE SIGN POST SERVICE AND SYSTEM THEREOF
    246.
    发明申请
    METHOD FOR PROVIDING MOBILE SIGN POST SERVICE AND SYSTEM THEREOF 审中-公开
    提供移动电话签名服务的方法及其系统

    公开(公告)号:US20100102989A1

    公开(公告)日:2010-04-29

    申请号:US12530864

    申请日:2007-12-10

    Applicant: Sang Yong Lee

    Inventor: Sang Yong Lee

    Abstract: The present invention relates to a method and system for providing geographic information which provides guidance about a route to a destination desired by a user. The method of providing geographic information, the method including: providing guidance about a route to a destination set by a user; reading a plurality of zoomed-in scenes of a target access road to enter when approaching an intersection including a plurality of access roads on the route; and continuously providing the read zoomed-in scenes and providing guidance about a route to the target access road.

    Abstract translation: 本发明涉及一种用于提供地理信息的方法和系统,其提供关于用户所期望的到目的地的路线的指导。 提供地理信息的方法,所述方法包括:提供关于由用户设置的目的地的路由的指导; 当接近包括所述路线上的多条通道的路口时,读取目标通路的多个放大场景进入; 并持续提供读取的放大场景并提供关于到达目标通道的路线的指导。

    Apparatus for calculating decision parameters in an IMT-2000 system
    247.
    发明授权
    Apparatus for calculating decision parameters in an IMT-2000 system 有权
    用于在IMT-2000系统中计算决策参数的装置

    公开(公告)号:US07697597B2

    公开(公告)日:2010-04-13

    申请号:US11148843

    申请日:2005-06-09

    Applicant: Jae-Yong Lee

    Inventor: Jae-Yong Lee

    CPC classification number: H04B14/026 H04B1/69 H04B1/707 H04B2001/6908

    Abstract: An apparatus for calculating decision parameters in an IMT-2000 system includes a correlation value calculation unit having a number of correlation value calculators, each of which calculates a correlation value between selected information that is selected at the mini-slot selection unit and one of capable input signals. To selectively operate the correlation value calculators, a ranking determination unit is included to receive and rank the correlation values and to selectively operating the correlation value calculators according to the rank of the correlation values. Accordingly, the power consumption of the correlation value calculators is reduced. And, the decision parameter is selected from the decision parameters previously selected during the divided monitoring section, thereby enabling high-speed cell search.

    Abstract translation: 一种用于在IMT-2000系统中计算决策参数的装置包括具有多个相关值计算器的相关值计算单元,每个相关值计算单元计算在微时隙选择单元处选择的所选择的信息与能力 输入信号。 为了选择性地操作相关值计算器,包括排序确定单元以接收和对相关值进行排序,并且根据相关值的秩选择性地操作相关值计算器。 因此,相关值计算器的功耗降低。 并且,从划分的监视部分中先前选择的判定参数中选择判定参数,从而实现高速小区搜索。

    LATERAL DMOS TRANSISTOR AND METHOD FOR FABRICATING THE SAME
    248.
    发明申请
    LATERAL DMOS TRANSISTOR AND METHOD FOR FABRICATING THE SAME 审中-公开
    横向DMOS晶体管及其制造方法

    公开(公告)号:US20100078715A1

    公开(公告)日:2010-04-01

    申请号:US12568871

    申请日:2009-09-29

    Applicant: Sang-Yong Lee

    Inventor: Sang-Yong Lee

    Abstract: A LDMOS transistor and a method for fabricating the same. A LDMOS transistor may include a P-type body region formed over a N-well. A LDMOS transistor may include a source region and a source contact region formed over a P-type body region. A LDMOS transistor may include a drain region spaced a distance from a P-type body region. A LOCOS may be formed over a surface of a N-well between a P-type body region and a drain region. A LDMOS transistor may include a main gate electrode formed over at least a portion of a LOCOS and a N-well. A LDMOS transistor may include a sub-gate electrode formed between a source region and a source contact region. A method for fabricating a LDMOS transistor is described herein.

    Abstract translation: LDMOS晶体管及其制造方法。 LDMOS晶体管可以包括在N阱上形成的P型体区。 LDMOS晶体管可以包括在P型体区域上形成的源极区域和源极接触区域。 LDMOS晶体管可以包括与P型体区域间隔一定距离的漏极区域。 可以在P型体区域和漏区域之间的N阱的表面上形成LOCOS。 LDMOS晶体管可以包括在LOCOS和N阱的至少一部分上形成的主栅电极。 LDMOS晶体管可以包括形成在源极区域和源极接触区域之间的子栅极电极。 本文描述了一种用于制造LDMOS晶体管的方法。

    Recess gate type transistor
    249.
    发明授权
    Recess gate type transistor 失效
    嵌入式门型晶体管

    公开(公告)号:US07687852B2

    公开(公告)日:2010-03-30

    申请号:US12371788

    申请日:2009-02-16

    CPC classification number: H01L29/1037 H01L29/42376 H01L29/66621 H01L29/78

    Abstract: A semiconductor device having recess gates and a method for fabricating the same. The semiconductor device includes a semiconductor substrate having inverse triangular recesses formed therein; a gate insulating film having a designated thickness formed on the semiconductor substrate; gate electrodes formed on the gate insulating film so that the gate electrodes fill the inverse triangular recesses and protrude from the surface of the semiconductor substrate; and first and second junction regions formed in the semiconductor substrate and opposed to each other so that the corresponding one of the gate electrodes is interposed therebetween.

    Abstract translation: 具有凹槽的半导体器件及其制造方法。 半导体器件包括在其中形成有反三角形凹槽的半导体衬底; 在半导体衬底上形成具有指定厚度的栅极绝缘膜; 栅电极形成在栅极绝缘膜上,使得栅电极填充反三角形凹部并从半导体衬底的表面突出; 以及形成在半导体衬底中并且彼此相对的第一和第二接合区域,使得相应的一个栅电极插入其间。

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