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    Method of Forming Isolation Layer in Flash Memory Device
    21.
    发明申请
    Method of Forming Isolation Layer in Flash Memory Device 审中-公开
    闪存器件中形成隔离层的方法

    公开(公告)号：US20090004820A1

    公开(公告)日：2009-01-01

    申请号：US12019959

    申请日：2008-01-25

    Applicant: Dong Hwan Lee ,  Byung Soo Park

    Inventor： Dong Hwan Lee ,  Byung Soo Park

    IPC: H01L21/76

    CPC classification number: H01L21/76224 ,  H01L27/115 ,  H01L27/11521

    Abstract: The invention relates to a method of forming an isolation layer in a flash memory device and comprises providing a semiconductor substrate in which a tunnel insulating layer and a conductive layer are formed on an active region and a trench is formed on an isolation region; forming a first insulating layer in a lower portion of the trench; forming a second insulating layer on the semiconductor substrate and the first insulating layer including the trench to protect a side wall of the conductive layer; forming a third insulating layer in the trench to form an isolation layer; and adjusting an effective field height (EFH) of the isolation layer through a first etching process.

    Abstract translation: 本发明涉及一种在闪速存储器件中形成隔离层的方法，包括提供半导体衬底，其中在有源区上形成隧道绝缘层和导电层，在隔离区上形成沟槽; 在沟槽的下部形成第一绝缘层; 在所述半导体衬底上形成第二绝缘层，所述第一绝缘层包括所述沟槽以保护所述导电层的侧壁; 在所述沟槽中形成第三绝缘层以形成隔离层; 以及通过第一蚀刻工艺调节隔离层的有效场高（EFH）。

    Multilayered chip capacitor and printed circuit board having embedded multilayered chip capacitor
    22.
    发明授权
    Multilayered chip capacitor and printed circuit board having embedded multilayered chip capacitor 有权
    多层片式电容器和具有嵌入式多层片式电容器的印刷电路板

    公开(公告)号：US07230815B2

    公开(公告)日：2007-06-12

    申请号：US11288802

    申请日：2005-11-29

    Applicant: Hee Soo Yoon ,  Chang Hoon Shim ,  Don Cheol Choi ,  Dong Hwan Lee

    Inventor： Hee Soo Yoon ,  Chang Hoon Shim ,  Don Cheol Choi ,  Dong Hwan Lee

    IPC: H01G4/005 ,  H01G4/06

    CPC classification number: H01G4/232 ,  H01G4/30 ,  H05K1/185

    Abstract: A multilayered chip capacitor (MLCC) includes internal electrodes and external electrodes formed to be perpendicular to the internal electrodes, whereby parasitic capacitance is reduced, resulting in no parallel resonance frequency effects. In addition, the MLCC has a capacitor structure, which provides a first surface and a second surface formed in a stacking direction of the dielectric layers in the capacitor body as a top surface and a bottom surface. Hence, in the thin capacitors having the same size, the number of internal electrode layers is increased, thereby reducing the equivalent series resistant (ESR) and equivalent series inductance (ESL). Further, the printed circuit board (PCB) having an embedded MLCC is easily manufactured.

    Abstract translation: 多层片状电容器（MLCC）包括形成为垂直于内部电极的内部电极和外部电极，由此寄生电容减小，导致没有并联谐振频率效应。 此外，MLCC具有电容器结构，其提供在电容器主体中的电介质层的堆叠方向上形成的第一表面和第二表面作为顶表面和底表面。 因此，在具有相同尺寸的薄电容器中，内部电极层的数量增加，从而降低等效串联电阻（ESR）和等效串联电感（ESL）。 此外，具有嵌入式MLCC的印刷电路板（PCB）容易制造。

    Display apparatus
    23.
    发明申请
    Display apparatus 有权
    显示装置

    公开(公告)号：US20060176254A1

    公开(公告)日：2006-08-10

    申请号：US11102175

    申请日：2005-04-08

    Applicant: Dong-Hwan Lee ,  Dong-Ho Lee ,  Soo-Jin Kim

    Inventor： Dong-Hwan Lee ,  Dong-Ho Lee ,  Soo-Jin Kim

    IPC: G09G3/36

    CPC classification number: G02F1/13452 ,  G02F2001/13456

    Abstract: In a display apparatus, a printed circuit board has a base substrate, a flip chip, and an adhesive member. The flip chip is mounted onto a first face of the base substrate by the adhesive member between the flip chip and the first face of the base substrate. The first display panel is disposed on a second face opposite to the first face of the base substrate, and a second display panel is mounted on the first face of the base substrate with the flip chip. Thus, a chip mounted on the printed circuit board is made smaller and the freed up space can be used to mount the second display panel.

    Abstract translation: 在显示装置中，印刷电路板具有基底基板，倒装芯片和粘合部件。 倒装芯片通过位于倒装芯片和基底基板的第一面之间的粘合部件安装在基底基板的第一面上。 第一显示面板设置在与基底基板的第一面相反的第二面上，第二显示面板通过倒装芯片安装在基底基板的第一面上。 因此，安装在印刷电路板上的芯片更小，并且可以使用释放的空间来安装第二显示面板。

    Organic light emitting display device and driving method thereof
    26.
    发明授权
    Organic light emitting display device and driving method thereof 有权
    有机发光显示装置及其驱动方法

    公开(公告)号：US09424779B2

    公开(公告)日：2016-08-23

    申请号：US13908333

    申请日：2013-06-03

    Applicant: Dong-Hwan Lee ,  Seung-Kyun Hong ,  So-Young Park ,  In-Soo Lee

    Inventor： Dong-Hwan Lee ,  Seung-Kyun Hong ,  So-Young Park ,  In-Soo Lee

    IPC: G09G3/32

    CPC classification number: G09G3/3291 ,  G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/0297

    Abstract: An organic light emitting display device includes a scan driving unit supplying a first scan signal and a second scan signal to each of a plurality of scan lines; a data driving unit supplying data signals to each of a plurality of data lines to be synchronized with the second scan signal; pixels positioned at intersections of the scan lines with the data lines, receiving bias power when the first scan signal is supplied, and receiving the data signals when the second scan signal is supplied.

    Abstract translation: 有机发光显示装置包括向多条扫描线中的每条扫描线提供第一扫描信号和第二扫描信号的扫描驱动单元; 数据驱动单元，向多个数据线中的每一个提供与第二扫描信号同步的数据信号; 位于扫描线与数据线的交点处的像素，当提供第一扫描信号时接收偏置功率，并且在提供第二扫描信号时接收数据信号。

    Apparatus and method of estimating inductance of permanent magnet synchronous motor
    27.
    发明授权
    Apparatus and method of estimating inductance of permanent magnet synchronous motor 有权
    估计永磁同步电机电感的装置及方法

    公开(公告)号：US08786230B2

    公开(公告)日：2014-07-22

    申请号：US13137309

    申请日：2011-08-04

    Applicant: Dong Hwan Lee ,  Young Jae Park ,  Yong Soon Park ,  Seung Ki Sul

    Inventor： Dong Hwan Lee ,  Young Jae Park ,  Yong Soon Park ,  Seung Ki Sul

    IPC: H02P6/18

    CPC classification number: H02P6/18

    Abstract: A method of estimating inductance of a permanent magnet synchronous motor (PMSM) includes injecting a signal having a frequency differing from an operating frequency of the PMSM into the PMSM during sensorless operation, sensing magnitudes of current responses to the injected signal, and estimating an inductance value at which the magnitude of the sensed current response is minimal to be an actual inductance value of the PMSM, thereby estimating inductance used in the PMSM regardless of position estimation error of the PMSM and thus more accurately and reliably estimating inductance of the PMSM.

    Abstract translation: 估计永磁同步电动机（PMSM）的电感的方法包括在无传感器运行期间将具有与PMSM的工作频率不同的频率的信号注入到PMSM中，感测对所注入的信号的电流响应的大小，以及估计电感 检测到的电流响应的大小最小的值是PMSM的实际电感值，从而估计在PMSM中使用的电感，而不管PMSM的位置估计误差如何，并且因此更准确和可靠地估计PMSM的电感。

    TOUCH PANEL
    28.
    发明申请
    TOUCH PANEL 审中-公开
    触控面板

    公开(公告)号：US20130093699A1

    公开(公告)日：2013-04-18

    申请号：US13572743

    申请日：2012-08-13

    Applicant: Jinuk Lee ,  Sang Su Hong ,  Woo Jin Lee ,  Dong Hwan Lee

    Inventor： Jinuk Lee ,  Sang Su Hong ,  Woo Jin Lee ,  Dong Hwan Lee

    IPC: G06F3/041

    CPC classification number: G06F3/041 ,  G06F3/044 ,  G06F2203/04103

    Abstract: Disclosed herein is a touch panel. The touch panel 100 according to the present invention includes electrode patterns 110 disposed in parallel with each other in a first direction (A), wherein the electrode patterns are provided with opening portions 120 dividing the electrode patterns 110 into two portions, the opening portions 120 having a configuration 125 in which the opening portion moves N times in the first direction (A) while going to a second direction (B) that is vertical to the first direction (A), the configuration 125 being repeated M times. The touch panel allows the electrode patterns to have a single-layer structure by adopting the opening portions 120 in the electrode patterns 110, thereby making it possible to reduce the manufacturing costs of the touch panel and simplify the manufacturing process thereof.

    Abstract translation: 这里公开了触摸面板。 根据本发明的触摸面板100包括在第一方向（A）上彼此平行设置的电极图案110，其中电极图案设置有将电极图案110分成两部分的开口部分120，开口部分120 具有其中开口部分沿着与第一方向（A）垂直的第二方向（B）在第一方向（A）移动N次的配置125，配置125重复M次。 触摸面板通过采用电极图案110中的开口部分120来允许电极图案具有单层结构，从而可以降低触摸面板的制造成本并简化其制造工艺。

    INTERFACE OF MULTI CHIP MODULE
    29.
    发明申请
    INTERFACE OF MULTI CHIP MODULE 审中-公开
    多芯片模块接口

    公开(公告)号：US20120289173A1

    公开(公告)日：2012-11-15

    申请号：US13444538

    申请日：2012-04-11

    Applicant: Kyoung Ho Lee ,  Su Bong Jang ,  Dong Hwan Lee ,  Hee Soo Yoon

    Inventor： Kyoung Ho Lee ,  Su Bong Jang ,  Dong Hwan Lee ,  Hee Soo Yoon

    IPC: H04B1/44 ,  H04B1/40 ,  H04B1/04

    CPC classification number: H01L23/48 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Disclosed herein is an interface of a multi chip module transmitting and receiving data among a plurality of chips. An interface of a multi chip module includes a communication unit that is provided in the chips and transmits and receives the data; and a radio communication unit that is provided outside the chips, converts the data transmitted from the communication unit into radio signals and wirelessly transmits the radio signals, and demodulates radio signals received from other chips into data and transmits the data to the communication unit, whereby wired communication chips can implement radio communication.

    Abstract translation: 这里公开了多芯片模块在多个芯片之间发送和接收数据的接口。 多芯片模块的接口包括设置在芯片中并发送和接收数据的通信单元; 以及设置在芯片外部的无线电通信单元，将从通信单元发送的数据转换为无线电信号并无线发送无线电信号，并将从其他芯片接收的无线电信号解调为数据，并将数据发送到通信单元，由此 有线通信芯片可以实现无线电通信。

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