公开(公告)号：US06573197B2

公开(公告)日：2003-06-03

申请号：US09833550

申请日：2001-04-12

申请人： Alessandro C. Callegari ,  Evgeni Gousev ,  Michael A. Gribelyuk ,  Paul C. Jamison ,  Dianne L. Lacey

发明人： Alessandro C. Callegari ,  Evgeni Gousev ,  Michael A. Gribelyuk ,  Paul C. Jamison ,  Dianne L. Lacey

IPC分类号： H01L2131

CPC分类号： H01L21/02304 ,  C23C16/24 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02181 ,  H01L21/02183 ,  H01L21/02186 ,  H01L21/02189 ,  H01L21/02197 ,  H01L21/0223 ,  H01L21/02247 ,  H01L21/02249 ,  H01L21/02252 ,  H01L21/28035 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28525 ,  H01L21/28556 ,  H01L21/31604 ,  H01L28/60 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

摘要： The present invention provides a method of fabricating a thermally stable polysilicon/high-k dielectric film stack utilizing a deposition method wherein Si-containing precursor gas which includes silicon and hydrogen is diluted with an inert gas such as He so as to significantly reduce the hydrogen content in the resultant polysilicon film. Semiconductor structures such as field effect transistors (FETs) and capacitors which include at least the thermally stable polysilicon/high-k dielectric film stack are also provided herein.

公开(公告)号：US08288237B2

公开(公告)日：2012-10-16

申请号：US12541575

申请日：2009-08-14

申请人： Alessandro C. Callegari ,  Michael A. Gribelyuk ,  Dianne L. Lacey ,  Fenton R. Feeney ,  Katherine L. Saenger ,  Sufi Zafar

发明人： Alessandro C. Callegari ,  Michael A. Gribelyuk ,  Dianne L. Lacey ,  Fenton R. Feeney ,  Katherine L. Saenger ,  Sufi Zafar

IPC分类号： H01L21/336

CPC分类号： H01L29/4966 ,  C23C14/0036 ,  C23C14/0635 ,  H01L21/28088 ,  H01L29/513 ,  H01L29/517 ,  H01L29/665

摘要： A compound metal comprising TiC which is a p-type metal having a workfunction of about 4.75 to about 5.3, preferably about 5, eV that is thermally stable on a gate stack comprising a high k dielectric and an interfacial layer is provided as well as a method of fabricating the TiC compound metal. Furthermore, the TiC metal compound of the present invention is a very efficient oxygen diffusion barrier at 1000° C. allowing very aggressive equivalent oxide thickness (EOT) and inversion layer thickness scaling below 14 Å in a p-metal oxide semiconductor (pMOS) device.

摘要翻译： 提供了包含TiC的复合金属，其是在包括高k电介质和界面层的栅极堆叠上具有约4.75至约5.3，优选约5e的功函数的功函数的热电稳定的p型金属，以及 制造TiC复合金属的方法。 此外，本发明的TiC金属化合物在1000℃下是非常有效的氧扩散阻挡层，允许在p金属氧化物半导体（pMOS）器件中非常有侵蚀性的等效氧化物厚度（EOT）和反型层厚度缩小至低于Å 。

公开(公告)号：US20100187643A1

公开(公告)日：2010-07-29

申请号：US12359434

申请日：2009-01-26

申请人： MICHAEL P. CHUDZIK ,  MICHAEL A. GRIBELYUK ,  RASHMI JHA ,  RENEE T. MO ,  NAIM MOUMEN ,  KEITH KWONG HON WONG

发明人： MICHAEL P. CHUDZIK ,  MICHAEL A. GRIBELYUK ,  RASHMI JHA ,  RENEE T. MO ,  NAIM MOUMEN ,  KEITH KWONG HON WONG

IPC分类号： H01L29/78 ,  H01L21/441

CPC分类号： H01L29/517 ,  H01L21/28079 ,  H01L21/28088 ,  H01L29/4958 ,  H01L29/4966

摘要： A metal gate and high-k dielectric device includes a substrate, an interfacial layer on top of the substrate, a high-k dielectric layer on top of the interfacial layer, a metal film on top of the high-k dielectric layer, a cap layer on top of the metal film and a metal gate layer on top of the cap layer. The thickness of the metal film and the thickness of the cap layer are tuned such that a target concentration of a cap layer material is present at an interface of the metal film and the high-k dielectric layer.

摘要翻译： 金属栅极和高k电介质器件包括衬底，衬底顶部的界面层，界面层顶部的高k电介质层，高k电介质层顶部的金属膜，帽 层在金属膜的顶部上，金属栅极层位于盖层的顶部。 调整金属膜的厚度和盖层的厚度，使得帽层材料的靶浓度存在于金属膜和高k电介质层的界面处。

公开(公告)号：US20090101993A1

公开(公告)日：2009-04-23

申请号：US12277539

申请日：2008-11-25

申请人： Dae-Gyu Park ,  Oleg G. Gluschenkov ,  Michael A. Gribelyuk ,  Kwong Hon Wong

发明人： Dae-Gyu Park ,  Oleg G. Gluschenkov ,  Michael A. Gribelyuk ,  Kwong Hon Wong

IPC分类号： H01L29/49

CPC分类号： H01L29/4966 ,  H01L21/28088 ,  H01L21/28176 ,  H01L21/28185 ,  H01L21/28229 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545

摘要： The present invention provides a method for depositing a dielectric stack comprising forming a dielectric layer atop a substrate, the dielectric layer comprising at least oxygen and silicon atoms; forming a layer of metal atoms atop the dielectric layer within a non-oxidizing atmosphere, wherein the layer of metal atoms has a thickness of less than about 15 Å; forming an oxygen diffusion barrier atop the layer of metal atoms, wherein the non-oxidizing atmosphere is maintained; forming a gate conductor atop the oxygen diffusion barrier; and annealing the layer of metal atoms and the dielectric layer, wherein the layer of metal atoms reacts with the dielectric layer to provide a continuous metal oxide layer having a dielectric constant ranging from about 25 to about 30 and a thickness less than about 15 Å.

摘要翻译： 本发明提供一种用于沉积电介质堆叠的方法，包括在衬底顶部形成电介质层，所述电介质层至少包含氧和硅原子; 在非氧化性气氛中在所述电介质层的顶部形成金属原子层，其中所述金属原子层具有小于约的厚度; 在金属原子层的上方形成氧扩散阻挡层，其中保持非氧化性气氛; 在氧扩散阻挡层上形成栅极导体; 以及退火所述金属原子层和所述介电层，其中所述金属原子层与所述电介质层反应以提供介电常数范围为约25至约30且厚度小于约的连续金属氧化物层。

公开(公告)号：US07521345B2

公开(公告)日：2009-04-21

申请号：US11782351

申请日：2007-07-24

申请人： Dae-Gyu Park ,  Oleg G. Gluschenkov ,  Michael A. Gribelyuk ,  Kwong H. Wong

发明人： Dae-Gyu Park ,  Oleg G. Gluschenkov ,  Michael A. Gribelyuk ,  Kwong H. Wong

IPC分类号： H01L21/3205

CPC分类号： H01L29/4966 ,  H01L21/28088 ,  H01L21/28176 ,  H01L21/28185 ,  H01L21/28229 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545

摘要： The present invention provides a method for depositing a dielectric stack comprising forming a dielectric layer atop a substrate, the dielectric layer comprising at least oxygen and silicon atoms; forming a layer of metal atoms atop the dielectric layer within a non-oxidizing atmosphere, wherein the layer of metal atoms has a thickness of less than about 15 Å; forming an oxygen diffusion barrier atop the layer of metal atoms, wherein the non-oxidizing atmosphere is maintained; forming a gate conductor atop the oxygen diffusion barrier; and annealing the layer of metal atoms and the dielectric layer, wherein the layer of metal atoms reacts with the dielectric layer to provide a continuous metal oxide layer having a dielectric constant ranging from about 25 to about 30 and a thickness less than about 15 Å.

摘要翻译： 本发明提供一种用于沉积电介质堆叠的方法，包括在衬底顶部形成电介质层，所述电介质层至少包含氧和硅原子; 在非氧化性气氛中在所述电介质层的顶部形成金属原子层，其中所述金属原子层具有小于约的厚度; 在金属原子层的上方形成氧扩散阻挡层，其中保持非氧化性气氛; 在氧扩散阻挡层上形成栅极导体; 以及退火所述金属原子层和所述介电层，其中所述金属原子层与所述电介质层反应以提供介电常数范围为约25至约30且厚度小于约的连续金属氧化物层。

公开(公告)号：US20080299730A1

公开(公告)日：2008-12-04

申请号：US12190129

申请日：2008-08-12

申请人： Alessandro C. Callegari ,  Michael A. Gribelyuk ,  Vijay Narayanan ,  Vamsi K. Paruchuri ,  Sufi Zafar

发明人： Alessandro C. Callegari ,  Michael A. Gribelyuk ,  Vijay Narayanan ,  Vamsi K. Paruchuri ,  Sufi Zafar

IPC分类号： H01L21/336 ,  C23C14/34

CPC分类号： H01L21/28088 ,  H01L21/823828 ,  H01L29/4908 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

摘要： A compound metal comprising MOxNy which is a p-type metal having a workfunction of about 4.75 to about 5.3, preferably about 5, eV that is thermally stable on a gate stack comprising a high k dielectric and an interfacial layer is provided as well as a method of fabricating the MOxNy compound metal. Furthermore, the MOxNy metal compound of the present invention is a very efficient oxygen diffusion barrier at 1000° C. allowing very aggressive equivalent oxide thickness (EOT) and inversion layer thickness scaling below 14 Å in a p-metal oxide semiconductor (pMOS) device. In the above formula, M is a metal selected from Group IVB, VB, VIB or VIIB of the Periodic Table of Elements, x is from about 5 to about 40 atomic % and y is from about 5 to about 40 atomic %.

摘要翻译： 包含MoxNy的复合金属是具有在包括高k电介质和界面层的栅叠层上热稳定的功函数为约4.75至约5.3，优选约5e的功函数的p型金属，以及 制造MOxNy复合金属的方法。 此外，本发明的MOxNy金属化合物在1000℃下是非常有效的氧扩散阻挡层，允许在p金属氧化物半导体（pMOS）器件中非常有侵蚀性的等效氧化物厚度（EOT）和低于14的反型层厚度标度 。 在上式中，M是选自元素周期表第IVB，VB，VIB或VIIB族的金属，x为约5至约40原子％，y为约5至约40原子％。

公开(公告)号：US07436034B2

公开(公告)日：2008-10-14

申请号：US11311455

申请日：2005-12-19

申请人： Alessandro C. Callegari ,  Michael A. Gribelyuk ,  Vijay Narayanan ,  Vamsi K. Paruchuri ,  Sufi Zafar

发明人： Alessandro C. Callegari ,  Michael A. Gribelyuk ,  Vijay Narayanan ,  Vamsi K. Paruchuri ,  Sufi Zafar

IPC分类号： H01L21/00

CPC分类号： H01L21/28088 ,  H01L21/823828 ,  H01L29/4908 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

摘要： A compound metal comprising MOxNy which is a p-type metal having a workfunction of about 4.75 to about 5.3, preferably about 5, eV that is thermally stable on a gate stack comprising a high k dielectric and an interfacial layer is provided as well as a method of fabricating the MOxNy compound metal. Furthermore, the MOxNy metal compound of the present invention is a very efficient oxygen diffusion barrier at 1000° C. allowing very aggressive equivalent oxide thickness (EOT) and inversion layer thickness scaling below 14 Å in a p-metal oxide semiconductor (PMOS) device. In the above formula, M is a metal selected from Group IVB, VB, VIB or VIIB of the Periodic Table of Elements, x is from about 5 to about 40 atomic % and y is from about 5 to about 40 atomic %.

摘要翻译： 一种复合金属，其包含具有约4.75至约5.3，优选约5eV的功函数的p型金属，其在一个或多个金属上是热稳定的 提供了包括高k电介质和界面层的栅极叠层以及制造复合金属的方法。 此外，本发明的金属氧化物金属化合物在1000℃下是非常有效的氧扩散阻挡层，允许非常有效的等效氧化物厚度（EOT）和反演 在p-金属氧化物半导体（PMOS）器件中的层厚度缩小到14埃以下。 在上式中，M是选自元素周期表第IVB，VB，VIB或VIIB族的金属，x为约5至约40原子％，y为约5至约40原子％。

公开(公告)号：US07115959B2

公开(公告)日：2006-10-03

申请号：US10873733

申请日：2004-06-22

申请人： Wanda Andreoni ,  Alessandro C. Callegari ,  Eduard A. Cartier ,  Alessandro Curioni ,  Christopher P. D'Emic ,  Evengi Gousev ,  Michael A. Gribelyuk ,  Paul C. Jamison ,  Rajarao Jammy ,  Dianne L. Lacey ,  Fenton R. McFeely ,  Vijay Narayanan ,  Carlo A. Pignedoli ,  Joseph P. Shepard, Jr. ,  Sufi Zafar

发明人： Wanda Andreoni ,  Alessandro C. Callegari ,  Eduard A. Cartier ,  Alessandro Curioni ,  Christopher P. D'Emic ,  Evengi Gousev ,  Michael A. Gribelyuk ,  Paul C. Jamison ,  Rajarao Jammy ,  Dianne L. Lacey ,  Fenton R. McFeely ,  Vijay Narayanan ,  Carlo A. Pignedoli ,  Joseph P. Shepard, Jr. ,  Sufi Zafar

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L21/28176 ,  H01L29/4908 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/6656 ,  H01L29/66575 ,  H01L29/66772 ,  H01L29/7833 ,  H01L29/78684

摘要： The present invention provides a gate stack structure that has high mobilites and low interfacial charges as well as semiconductor devices, i.e., metal oxide semiconductor field effect transistors (MOSFETs) that include the same. In the semiconductor devices, the gate stack structure of the present invention is located between the substrate and an overlaying gate conductor. The present invention also provides a method of fabricating the inventive gate stack structure in which a high temperature annealing process (on the order of about 800° C.) is employed. The high temperature anneal used in the present invention provides a gate stack structure that has an interface state density, as measured by charge pumping, of about 8×1010 charges/cm2 or less, a peak mobility of about 250 cm2/V-s or greater and substantially no mobility degradation at about 6.0×1012 inversion charges/cm2 or greater.