公开(公告)号：US20090233230A1

公开(公告)日：2009-09-17

申请号：US11989124

申请日：2005-07-22

Applicant: Yosuke Hata ,  Toru Mori

Inventor： Yosuke Hata ,  Toru Mori

IPC: G03F7/20 ,  G03F7/004

CPC classification number: C08F290/06 ,  C08F290/061 ,  C08L53/00 ,  C09D133/08 ,  G03F7/031 ,  G03F7/033 ,  C08L2666/02

Abstract: The present invention provides a photosensitive resin composition characterized by comprising: (a) 20 to 90% by mass of a thermoplastic copolymer comprising an α,β-unsaturated carboxyl group containing monomer as a copolymerization constituent and having an acid equivalent of 100 to 600 and a weight-average molecular weight of 5000 to 500000; (b) 5 to 75% by mass of an addition polymerizable monomer having at least one terminal ethylenic unsaturated group; (c) 0.01 to 30% by mass of a photopolymerization initiator containing a hexaarylbisimidazole; and (d) 0.001 to 10% by mass of a pyrazoline compound represented by the following general formula (I): (wherein A, B, and C each independently represent a substituent selected from the group consisting of an aryl group, a heterocyclic group, a linear or branched alkyl group having 3 or more carbon atoms, and NR2 (R represents a hydrogen atom or an alkyl group); and each of a, b, and c represents an integer of 0 to 2, provide that the value of a+b+c is 1 or larger).

Abstract translation: 本发明提供一种感光性树脂组合物，其特征在于，包含：（a）20〜90质量％的含有α，β-不饱和羧基的单体作为共聚成分，酸当量为100〜600的热塑性共聚物， 重均分子量为5000〜500000; （b）5〜75质量％的具有至少一个末端烯属不饱和基团的加成聚合性单体; （c）0.01〜30质量％的含有六芳基双咪唑的光聚合引发剂; 和（d）0.001〜10质量％的由以下通式（I）表示的吡唑啉化合物：（其中A，B和C各自独立地表示选自芳基，杂环基 ，具有3个以上碳原子的直链或支链烷基，NR2（R表示氢原子或烷基），a，b，c分别表示0〜2的整数， a + b + c为1以上）。

公开(公告)号：US07115964B2

公开(公告)日：2006-10-03

申请号：US11134391

申请日：2005-05-23

Applicant: Toru Mori

Inventor： Toru Mori

IPC: H01L29/00

CPC classification number: H01L29/66772 ,  H01L29/41733 ,  H01L29/78639 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A manufacturing method for an SOI semiconductor device includes creating transistors and an element isolation region on a semiconductor layer in an SOI substrate. The method also includes covering the transistors and the element isolation region with a first insulation film. The method also includes creating a first opening section which penetrates the first insulation film, element isolation region and a buried oxide film to expose the support substrate. The method also includes creating a first source interconnect, first drain interconnect and first gate interconnect which are electrically connected to the transistors, on the second insulation film. The method also includes forming dummy interconnects which are connected with these interconnects, and are electrically connected with the support substrate via the first opening section, on the second insulation film. The method also includes disconnecting the dummy interconnects to electrically insulate the first source interconnect, first drain interconnect and first gate interconnect from the support substrate.

Abstract translation: SOI半导体器件的制造方法包括在SOI衬底中的半导体层上产生晶体管和元件隔离区域。 该方法还包括用第一绝缘膜覆盖晶体管和元件隔离区域。 该方法还包括形成穿透第一绝缘膜，元件隔离区域和掩埋氧化膜以暴露支撑衬底的第一开口部分。 该方法还包括在第二绝缘膜上形成电连接到晶体管的第一源极互连，第一漏极互连和第一栅极互连。 该方法还包括形成与这些互连连接的虚拟互连件，并且经由第一开口部分在第二绝缘膜上与支撑基板电连接。 该方法还包括断开虚拟互连以将第一源互连，第一漏互连和第一栅互连与支撑衬底电绝缘。

公开(公告)号：US06949815B2

公开(公告)日：2005-09-27

申请号：US10746603

申请日：2003-12-23

Applicant: Takao Yamazaki ,  Toru Mori ,  Akinobu Shibuya ,  Shintaro Yamamichi ,  Yuzo Shimada

Inventor： Takao Yamazaki ,  Toru Mori ,  Akinobu Shibuya ,  Shintaro Yamamichi ,  Yuzo Shimada

IPC: H05K3/34 ,  H01L21/60 ,  H01L21/822 ,  H01L23/12 ,  H01L23/50 ,  H01L23/64 ,  H01L27/04 ,  H01L23/52 ,  H01L23/32 ,  H01L23/48 ,  H01G9/05

CPC classification number: H01L24/81 ,  H01L23/50 ,  H01L23/642 ,  H01L24/73 ,  H01L2224/13144 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/19106 ,  H01L2924/30105 ,  H01L2924/30107

Abstract: A semiconductor device has an LSI device provided with a plurality of power supply line connection pads and ground line connection pad in a peripheral edge part of a circuit-formation surface, metal foil leads 5 electrically connected to each of the pads and adhered to the LSI device via an insulation layer, and decoupling capacitors mounted on one surface of the metal foil leads.

Abstract translation: 半导体器件具有在电路形成面的周边部分设置有多个电源线连接焊盘和接地线连接焊盘的LSI器件，电连接到每个焊盘并粘附到LSI的金属箔引线5 通过绝缘层的器件，以及安装在金属箔引线的一个表面上的去耦电容器。

公开(公告)号：US06365828B1

公开(公告)日：2002-04-02

申请号：US09691257

申请日：2000-10-19

Applicant: Yasushi Kinoshita ,  Hiroshi Wabuka ,  Shiro Yoshida ,  Hirokazu Tohya ,  Toru Mori ,  Atsushi Ochi

Inventor： Yasushi Kinoshita ,  Hiroshi Wabuka ,  Shiro Yoshida ,  Hirokazu Tohya ,  Toru Mori ,  Atsushi Ochi

IPC: H05K900

CPC classification number: H05K1/165 ,  H01L23/552 ,  H01L23/585 ,  H01L23/66 ,  H01L2924/0002 ,  H01L2924/3011 ,  H05K1/0231 ,  H05K1/162 ,  H05K7/1092 ,  H05K9/0066 ,  H05K2201/1006 ,  H05K2201/10689 ,  H01L2924/00

Abstract: The electromagnetic interference suppressing device of the present invention includes a plurality of connection layers and ground layers formed of a conductive material. The connection layers and the ground layers are alternately layered. Insulating layers, formed of an insulating material, intervene between the neighboring connection layers and ground layers. The odd connection layers counting from the bottom and the connection layers just above those layers are electrically connected at the same end. The even connection layers counting from the bottom and the connection layers just above those layers are electrically connected at the same end opposite to the odd connection-layered end. The bottommost connection layer is connected to a first signal terminal. The uppermost connection layer is connected to a second signal terminal. The ground layer is connected to a ground terminal.

Abstract translation: 本发明的电磁干扰抑制装置包括多个连接层和由导电材料形成的接地层。 连接层和接地层交替层叠。 由绝缘材料形成的绝缘层介于相邻连接层和接地层之间。 从底部计数的奇数连接层和正好在这些层上方的连接层在同一端电连接。 从底部开始计数的连接层和刚好在这些层上方的连接层在与奇数连接分层端相反的相同端部电连接。 最下面的连接层连接到第一信号端子。 最上面的连接层连接到第二信号端子。 接地层连接到接地端子。

公开(公告)号：US06338048B1

公开(公告)日：2002-01-08

申请号：US09254706

申请日：1999-03-12

Applicant: Toru Mori

Inventor： Toru Mori

IPC: G06K500

CPC classification number: G07F7/0866 ,  G06Q20/00 ,  G06Q20/105 ,  G06Q20/363

Abstract: A plurality of types of settlement conditions exist for transactions with electronic money. An electronic transaction system capable of being applied to a plurality of types of settlement conditions using a single automatic teller machine is provided. In order to achieve this, this system has the following configuration. Namely, in this electronic transaction system for carrying out transaction settlements using electronic money stored on a customer card while using an automatic teller machine, customer identification information and an electronic money amount are stored as balance information for each customer account established at a financial institution, with the customer card being such that stored information can be updated based on pre-decided transaction conditions. The automatic teller machine then houses customer cards corresponding to a plurality of transaction conditions and a plurality of ATM cards, and a plurality of control software is prepared. Control software coinciding with the transaction conditions is then activated, and transactions are carried out with the ATM cards stored in the automatic teller machine.

Abstract translation: 存在用于与电子货币进行交易的多种类型的结算条件。 提供一种能够使用单个自动取款机应用于多种类型的结算条件的电子交易系统。 为了实现这一点，该系统具有以下配置。 也就是说，在使用自动提款机的电子货币使用电子货币进行交易结算的电子交易系统中，客户识别信息和电子货币金额被存储为在金融机构建立的每个客户账户的余额信息， 客户卡可以使得存储的信息可以基于预先确定的交易条件来更新。 然后，自动柜员机容纳对应于多个交易条件的客户卡和多个ATM卡，并且准备了多个控制软件。 然后激活与交易条件相符的控制软件，并且使用存储在自动柜员机中的ATM卡进行交易。

公开(公告)号：US06223169B1

公开(公告)日：2001-04-24

申请号：US08990457

申请日：1997-12-15

Applicant: Toru Mori ,  Makoto Saruya

Inventor： Toru Mori ,  Makoto Saruya

IPC: G06F1760

CPC classification number: G07F7/0866 ,  G06Q20/105 ,  G06Q20/363

Abstract: An electronic transaction processing system for transferring a monetary value between a payer and a receiver includes a first memory apparatus storing a payer's digital cash, a second memory apparatus storing a receiver's digital cash, and a third memory apparatus storing temporarily the payer's digital cash transferred from the first memory apparatus. A transaction is processed by transferring the digital cash transferred from the first memory apparatus to the second memory apparatus via the third memory apparatus.

Abstract translation: 一种用于在付款人和接收方之间转移货币价值的电子交易处理系统包括存储付款人的数字现金的第一存储装置，存储接收者的数字现金的第二存储装置和临时存储从 第一存储装置。 通过经由第三存储装置将从第一存储装置传送的数字货币转移到第二存储装置来处理交易。

公开(公告)号：US06169720A

公开(公告)日：2001-01-02

申请号：US09041645

申请日：1998-03-13

Applicant: Takeshi Kamemura ,  Tatsunori Kato ,  Masanori Motoki ,  Toru Mori

Inventor： Takeshi Kamemura ,  Tatsunori Kato ,  Masanori Motoki ,  Toru Mori

IPC: G11B17032

CPC classification number: G11B17/056 ,  G11B33/027

Abstract: A disk playback device has a front panel pivoted at a lower end thereof to a lower end portion of an open front side of a cabinet, and a slide panel movable into and out of the cabinet along guide slots in the opposite side walls of the cabinet. The slide panel has a fitting pin and a slide pin projecting from each side face thereof and fitting respectively in an elongated hole in each of the side walls of the front panel and in the guide slots of each cabinet side wall. The slide panel is slidable along the guide slots with the opening and closing of the front panel. When the front panel is in a completely opened position, the fitting pin is positioned at a lower level than the guide slot, and the slide panel is exposed inclinedly from the cabinet with a recessed surface which receives the disk facing upwardly.

Abstract translation: 磁盘播放装置具有在其下端枢转到机柜的敞开前侧的下端部的前面板，以及能够沿着机壳的相对侧壁中的引导槽移动进出机壳的滑动面板 。 滑动面板具有从其每个侧面突出的配合销和滑动销，并且分别装配在前板的每个侧壁中的细长孔和每个机柜侧壁的引导槽中。 滑动面板可以通过前面板的打开和关闭沿导向槽滑动。 当前面板处于完全打开的位置时，装配销定位在比导槽更低的位置，并且滑动面板从机柜倾斜地露出，该凹面使盘面朝上。

公开(公告)号：US5446129A

公开(公告)日：1995-08-29

申请号：US285777

申请日：1994-08-04

Applicant: Toru Mori ,  Hideo Sugawa ,  Nobutoshi Yamada ,  Yoshimichi Ueda

Inventor： Toru Mori ,  Hideo Sugawa ,  Nobutoshi Yamada ,  Yoshimichi Ueda

IPC: A61K38/00 ,  C07K14/72 ,  C07K5/00 ,  C07K7/00 ,  C07K14/00

CPC classification number: C07K14/723 ,  A61K38/00

Abstract: A peptide having the formula:A--B--Cwherein A is a hydrogen atom, Glu, Phe Glu--, Phe Phe Glu-- or an amino acid sequence as shown by SEQ ID NO:1 in the Sequence Listing, B is an amino acid sequence as shown by SEQ ID NO:2, and C is a hydroxyl group, Glu, --Glu Ile, --Glu Ile Ile or an amino acid sequence as shown by SEQ ID NO:3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 or 16, and containing from 6 to 25 amino acids; or its salt.

Abstract translation: 具有下式的ABC：其中A是氢原子，Glu，Phe Glu-，Phe Phe Glu-或序列表中SEQ ID NO：1所示的氨基酸序列，B是所示的氨基酸序列 由SEQ ID NO：2表示，C为羟基，Glu，-Glu Ile，-Glu Ile Ile或SEQ ID NO：3，4，5，6，7，8，9， 10,11,12,13,14,15或16，含有6至25个氨基酸; 或其盐。

公开(公告)号：US5262369A

公开(公告)日：1993-11-16

申请号：US807879

申请日：1992-01-21

Applicant: Toru Mori ,  Atsushi Ochi ,  Kazuaki Utsumi ,  Tetsuo Yoshimoto ,  Souichiro Sugano ,  Shinji Abe

Inventor： Toru Mori ,  Atsushi Ochi ,  Kazuaki Utsumi ,  Tetsuo Yoshimoto ,  Souichiro Sugano ,  Shinji Abe

IPC: C04B35/00 ,  C04B35/499 ,  H01B3/12 ,  H01G4/12 ,  C04B35/46

CPC classification number: C04B35/499 ,  H01G4/1254

Abstract: The improved dielectric ceramic composition has sufficiently high dielectric constant, high insulation resistance and small dielectric loss to be suitable for use as a material for ceramic capacitors. The composition comprises as a main component a three-component ceramic composition in solid solution having the formula Pb(Mg.sub.1/3 Nb.sub.2/3)O.sub.3 -Pb(Ni.sub.1/3 Nb.sub.2/3)O.sub.3 -PbTiO.sub.3 which, when expressed by xPb(Mg.sub.1/3 Nb.sub.2/3)O.sub.3 -yPb(Ni.sub.1/3 Nb.sub.2/3)O.sub.3 -zPbTiO.sub.3, is defined by the area surrounded by the following points of (x, y, z), i.e., (0.70, 0.20, 0.10), (0.70, 0.15, 0.15), (0.83, 0.02, 0.15), (0.96, 0.02, 0.02) and (0.78, 0.20, 0.02), and this ceramic composition further contains a Mn oxide or a Mn-containing complex oxide as an additive.

公开(公告)号：US4877947A

公开(公告)日：1989-10-31

申请号：US79454

申请日：1987-07-30

Applicant: Toru Mori

Inventor： Toru Mori

IPC: G07G1/12 ,  G06K17/00 ,  G06Q10/00 ,  G06Q20/00 ,  G06Q20/24 ,  G06Q20/26 ,  G06Q20/34 ,  G06Q40/00 ,  G06Q40/02 ,  G06Q50/00 ,  G07F7/08 ,  G07F7/12 ,  G07G1/00

CPC classification number: G07F7/08 ,  G06Q20/204 ,  G06Q20/40 ,  G07F7/12 ,  G07G1/00

Abstract: A transaction processing system using a prepaid microchip card includes a customer's microchip card reader/writer for communicating with a customer's microchip card in which a balance is recorded, and a vendor's microchip card reader/writer that can be electrically coupled to the customer's microchip card reader/writer and is used for communicating with a vendor's microchip card in which a balance is recorded. A transaction is processed by deducting the amount of the transaction from the balance in the customer's microchip card and adding this amount to the balance in the vendor's microchip card.

Abstract translation: 使用预付费微芯片卡的交易处理系统包括客户的微芯片读卡器/写入器，用于与记录有余额的客户的微芯片卡进行通信，以及可以电耦合到客户的微芯片读卡器的供应商的微芯片卡读/写器 / writer，用于与供应商的微芯片卡进行通信，其中记录了余额。 通过从客户的微芯片卡中的余额中扣除交易金额并将该金额加到供应商的微芯片卡中的余额来处理交易。