Abstract:
In a method of forming an insulating structure, an insulating interlayer is formed on a substrate using a silicon source gas and a reaction gas. A capping layer is formed in-situ on the insulating interlayer by increasing a flow rate of an oxidizing gas included in the reaction gas so that the capping layer has a second thickness when the insulating interlayer is formed on the substrate to have a first thickness. The insulating structure dose not have an interface between the insulating interlayer and the capping layer so that the insulating interlayer is not subject to damage by a cleaning solution during a subsequent cleaning process, since the cleaning solution maynot permeate into the insulating structure. Additionally, leakage current is mitigated or eliminated between the insulating interlayer and the capping layer, thereby improving the reliability of a semiconductor device including the insulating structure.
Abstract:
Embodiments of the invention include a MIM capacitor that has a high capacitance that can be manufactured without the problems that affected the prior art. Such a capacitor includes an upper electrode, a lower electrode, and a dielectric layer that is intermediate the upper and the lower electrodes. A first voltage can be applied to the upper electrode and a second voltage, which is different from the first voltage, can be applied to the lower electrode. A wire layer, through which the first voltage is applied to the upper electrode, is located in the same level as or in a lower level than the lower electrode.
Abstract:
A hydraulic actuator to which a limit-adjustable mechanical lock device is applied, comprising: a housing having a first hole; side covers coupled at both sides of the housing, and having holder insertion holes formed to be opened toward the first hole side of the housing, and plugs; a first holder of which one side of the outer peripheral surface is inserted into the holder insertion hole at the plug side of the side cover by screw coupling; a second holder fitted and coupled to the inner peripheral surface of the side cover and having one end thereof screw-coupled to the second hole of the first holder; a locking means into which a rod is inserted so as to be movable in an axial direction at a predetermined distance across the second hole of the first holder and the third hole of the second holder.
Abstract:
A hydraulic actuator to which a limit-adjustable mechanical lock device is applied, comprising: a housing having a first hole; side covers coupled at both sides of the housing, and having holder insertion holes formed to be opened toward the first hole side of the housing, and plugs; a first holder of which one side of the outer peripheral surface is inserted into the holder insertion hole at the plug side of the side cover by screw coupling; a second holder fitted and coupled to the inner peripheral surface of the side cover and having one end thereof screw-coupled to the second hole of the first holder; a locking means into which a rod is inserted so as to be movable in an axial direction at a predetermined distance across the second hole of the first holder and the third hole of the second holder.
Abstract:
A web browsing method and apparatus for enhancing a user's convenience in web browsing is provided in a system that uses a multi-core processor. The web browsing method and apparatus is applicable in a system, such as a smart phone that has a low computing power or that has a storage device like a flash memory operating in a rapid manner. Optimized machine codes are stored in files and incremental optimization is achieved, so the JAVASCRIPT® program of the web application has a small compilation overhead and achieves fast execution.
Abstract:
In a method of discharging bit-lines for a non-volatile semiconductor memory device performing a read-while-write operation. The method include discharging a global write bit-line to a ground voltage based on a write command within a first period. The method also includes maintaining the discharged voltage of the global write bit-line in the ground voltage during a second period.
Abstract:
In one embodiment, the semiconductor device includes a non-volatile memory cell array, a write circuit configured to write to the non-volatile memory cell array, and a control circuit. The control circuit is configured to store at least one erase indicator. The erase indicator is associated with at least a portion of the non-volatile memory cell array and indicates a logic state. The control circuit is configured to control the write circuit to write the logic state indicated by the erase indicator in the non-volatile memory cell array during an erase operation of the associated portion of the non-volatile memory cell array.
Abstract:
Disclosed is a method of preventing coupling noises for a non-volatile semiconductor memory device. According to the method, if an edge of a write operation signal overlaps an activated period of a read operation signal a check result is generated. The write operation signal is modified based on the check result.
Abstract:
A capacitor of a semiconductor device and a method for manufacturing the same includes a lower metal layer on and/or over a semiconductor substrate; an insulating layer formed on and/or over the lower metal layer with step difference; and an upper electrode on and/or over the insulating layer pattern, wherein a top corner of the upper electrode is rounded so that a curvature pattern is formed on the top corner of the upper electrode.
Abstract:
One embodiment includes a non-volatile memory cell array, and a read unit configured to disable read operation for the non-volatile memory cell array for a time period following writing of data in the non-volatile memory cell array.