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    RECOVERY FROM PROGRAMMING FAILURE IN NON-VOLATILE MEMORY
    21.
    发明申请
    RECOVERY FROM PROGRAMMING FAILURE IN NON-VOLATILE MEMORY 审中-公开
    从非易失性存储器中的编程故障恢复

    公开(公告)号：US20150355858A1

    公开(公告)日：2015-12-10

    申请号：US14821008

    申请日：2015-08-07

    Applicant: Apple Inc.

    Inventor： Shai Ojalvo ,  Eyal Gurgi ,  Yoav Kasorla

    IPC: G06F3/06 ,  G11C29/52 ,  G06F11/10

    CPC classification number: G06F3/0619 ,  G06F3/064 ,  G06F3/0659 ,  G06F3/0683 ,  G06F11/008 ,  G06F11/1012 ,  G06F11/1044 ,  G06F11/1068 ,  G06F11/1076 ,  G11C29/52

    Abstract: A method includes storing data encoded with an Error Correction Code (ECC) in analog memory cells, by buffering the data in a volatile buffer and then writing the buffered data to the analog memory cells while overwriting at least some of the data in the volatile buffer with success indications. Upon detecting a failure in writing the buffered data to the analog memory cells, recovered data is produced by reading both the volatile buffer and the analog memory cells, assigning reliability metrics to respective bits of the recovered data depending on whether the bits were read from the volatile buffer or from the analog memory cells, and applying ECC decoding to the recovered data using the reliability metrics. The recovered data is re-programmed.

    Abstract translation: 一种方法包括通过将数据缓冲在易失性缓冲器中来将数据编码的纠错码（ECC）存储在模拟存储器单元中，然后将缓冲的数据写入模拟存储器单元，同时重写易失性缓冲器中的至少一些数据 有成功迹象。 在检测到将缓冲数据写入模拟存储器单元的故障时，通过读取易失性缓冲器和模拟存储器单元来产生恢复的数据，根据是否从 易失性缓冲器或来自模拟存储器单元，以及使用可靠性度量将ECC解码应用于恢复的数据。 恢复的数据被重新编程。

    ADVANCED PROGRAMMING VERIFICATION SCHEMES FOR MEMORY CELLS
    22.
    发明申请
    ADVANCED PROGRAMMING VERIFICATION SCHEMES FOR MEMORY CELLS 审中-公开
    用于记忆细胞的高级编程验证方案

    公开(公告)号：US20150193293A1

    公开(公告)日：2015-07-09

    申请号：US14662470

    申请日：2015-03-19

    Applicant: Apple Inc.

    Inventor： Eyal Gurgi ,  Yoav Kasorla ,  Barak Rotbard ,  Shai Ojalvo

    IPC: G06F11/07

    CPC classification number: G11C29/38 ,  G06F11/07 ,  G06F11/073 ,  G06F11/0772 ,  G06F11/263 ,  G11C11/1677 ,  G11C11/5628 ,  G11C11/5635 ,  G11C11/5678 ,  G11C13/0035 ,  G11C13/0064 ,  G11C13/0069 ,  G11C13/0097 ,  G11C16/10 ,  G11C16/3459 ,  G11C29/12015 ,  G11C29/44 ,  G11C29/50012

    Abstract: A method for data storage includes receiving in a memory device data for storage in a group of memory cells. The data is stored in the group by performing a Program and Verify (P&V) process, which applies to the memory cells in the group a sequence of programming pulses and compares respective analog values of the memory cells in the group to respective verification thresholds. Immediately following successful completion of the P&V process, a mismatch between the stored data and the received data is detected in the memory device. An error in storage of the data is reported responsively to the mismatch.

    Abstract translation: 一种用于数据存储的方法包括在存储器装置中接收用于存储在一组存储器单元中的数据。 通过执行程序和验证（P＆V）过程将数据存储在组中，该过程适用于组中的存储器单元的编程脉冲序列，并将组中的存储器单元的各自的模拟值与相应的验证阈值进行比较。 在P＆V进程成功完成之后，在存储器件中检测到存储的数据与接收到的数据之间的不匹配。 响应于不匹配报告数据存储错误。

    POWER SHUTDOWN PREDICTION FOR NON-VOLATILE STORAGE DEVICES
    23.
    发明申请
    POWER SHUTDOWN PREDICTION FOR NON-VOLATILE STORAGE DEVICES 审中-公开
    用于非易失存储器件的电源关断预测

    公开(公告)号：US20150082099A1

    公开(公告)日：2015-03-19

    申请号：US14548489

    申请日：2014-11-20

    Applicant: Apple Inc.

    Inventor： Avraham Poza Meir ,  Shai Ojalvo ,  Moshe Neerman

    IPC: G06F11/30

    CPC classification number: G06F11/3058 ,  G06F1/26 ,  G06F1/30 ,  G06F9/4401 ,  G06F11/1441 ,  G06F11/3034

    Abstract: A method includes, in a host that stores data in a storage device, detecting an event that is indicative, statistically and not deterministically, of an imminent power shutdown in the host. A notification is sent to the storage device responsively to the detected event, so as to cause the storage device to initiate preparatory action for the imminent power shutdown.

    Abstract translation: 一种方法包括在存储设备中存储数据的主机中，检测在主机中即将发生功率关闭的统计地而不是确定地指示的事件。 响应于检测到的事件向存储设备发送通知，以使存储设备启动即将停电的准备动作。

    Speculative prefetching of data stored in flash memory
    26.
    发明授权
    Speculative prefetching of data stored in flash memory 有权
    闪存中存储的数据的推测预取

    公开(公告)号：US09582204B2

    公开(公告)日：2017-02-28

    申请号：US14148910

    申请日：2014-01-07

    Applicant: Apple Inc.

    Inventor： Christopher J Sarcone ,  Shai Ojalvo

    IPC: G11C29/00 ,  G06F3/06 ,  G06F12/02 ,  G06F11/10 ,  G11C29/52 ,  G06F12/08

    CPC classification number: G06F3/0619 ,  G06F3/0659 ,  G06F3/0688 ,  G06F11/1072 ,  G06F12/0215 ,  G06F12/0862 ,  G06F2212/6028 ,  G06F2212/654 ,  G11C29/52 ,  Y02D10/13

    Abstract: A method for data storage, includes holding a definition of a speculative readout mode for readout in a storage device, in which the storage device is requested to read a data unit having a data unit size, and in response the storage device retrieves a storage page that contains the data unit and has a storage page size larger than the data unit size, and retains the storage page in preparation for subsequent requests. Activation of the speculative readout mode is coordinated. A readout command using the speculative readout mode is performed.

    Abstract translation: 一种用于数据存储的方法，包括在存储设备中保存用于读出的推测读出模式的定义，其中存储设备被请求读取具有数据单元大小的数据单元，并且响应于存储设备检索存储页面 其包含数据单元并且具有大于数据单元大小的存储页面大小，并且保留存储页面以备以后的请求。 推测读出模式的激活是协调的。 执行使用推测读出模式的读出命令。

    ORDERING OF PARALLEL DATA STORAGE BASED ON DIE PROGRAMMING DURATIONS
    28.
    发明申请
    ORDERING OF PARALLEL DATA STORAGE BASED ON DIE PROGRAMMING DURATIONS 有权
    基于DIE编程的平行数据存储订单

    公开(公告)号：US20160196065A1

    公开(公告)日：2016-07-07

    申请号：US14588947

    申请日：2015-01-04

    Applicant: APPLE INC.

    Inventor： Shai Ojalvo ,  Eyal Gurgi ,  Yoav Kasorla

    IPC: G06F3/06

    CPC classification number: G06F3/061 ,  G06F3/064 ,  G06F3/0688 ,  G06F12/0246 ,  G06F2212/1016 ,  G06F2212/7207 ,  G06F2212/7208

    Abstract: A method includes, in a memory system that includes multiple memory units, holding information indicative of respective programming durations of the memory units. Data is stored in a stripe that includes a plurality of the memory units, by programming the memory units in the stripe in an order that is set based on the information.

    Abstract translation: 一种方法包括在包括多个存储器单元的存储器系统中，保存指示存储器单元的相应编程持续时间的信息。 通过以基于该信息设置的顺序对条带中的存储器单元进行编程，将数据存储在包括多个存储器单元的条带中。

    Uneven wear leveling in analog memory devices
    29.
    发明授权
    Uneven wear leveling in analog memory devices 有权
    模拟存储设备中的均匀磨损均衡

    公开(公告)号：US09262315B2

    公开(公告)日：2016-02-16

    申请号：US13935746

    申请日：2013-07-05

    Applicant: Apple Inc.

    Inventor： Avraham Poza Meir ,  Eyal Gurgi ,  Shai Ojalvo ,  Yoav Kasorla ,  Naftali Sommer

    IPC: G06F12/00 ,  G06F12/02

    CPC classification number: G06F12/0246 ,  G06F2212/7211

    Abstract: A method for data storage in a memory that includes multiple analog memory cells, includes defining, based on a characteristic of the memory cells, an uneven wear leveling scheme that programs and erases at least first and second subsets of the memory cells with respective different first and second Programming and Erasure (P/E) rates. Data is stored in the memory in accordance with the uneven wear leveling scheme.

    Abstract translation: 一种用于在包括多个模拟存储器单元的存储器中的数据存储的方法，包括基于所述存储器单元的特性定义不均匀磨损平衡方案，所述不均匀磨损均衡方案以相应不同的第一方式来编程和擦除所述存储器单元的至少第一和第二子集 和第二个编程和擦除（P / E）率。 根据不均匀的磨损均衡方案将数据存储在存储器中。

    RELIABLE READOUT OF FUSE DATA IN AN INTEGRATED CIRCUIT
    30.
    发明申请
    RELIABLE READOUT OF FUSE DATA IN AN INTEGRATED CIRCUIT 审中-公开
    在一体化电路中可靠地读取保险丝数据

    公开(公告)号：US20150348645A1

    公开(公告)日：2015-12-03

    申请号：US14821254

    申请日：2015-08-07

    Applicant: Apple Inc.

    Inventor： Yoav Kasorla ,  Shai Ojalvo ,  Eyal Gurgi

    IPC: G11C17/18 ,  G06F11/10 ,  G11C17/16

    CPC classification number: G11C17/18 ,  G06F11/1044 ,  G11C17/16 ,  G11C29/74 ,  G11C29/787

    Abstract: An integrated circuit includes fuse readout logic and first and second sets of fuses. One of the sets includes one or more primary fuses whose burn states represent respective bit values, and the other of the sets includes one or more secondary fuses whose burn states are indicative of the bit values stored in the primary fuses. The fuse readout logic is configured to read the bit values by sensing the burn states of the primary fuses, and to conditionally correct the read bit values by sensing the burn states of one or more of the secondary fuses.

    Abstract translation: 集成电路包括熔丝读出逻辑和第一和第二组保险丝。 其中一个集合包括一个或多个主熔丝，其燃烧状态表示相应的位值，并且这些组中的另一个包括一个或多个辅助熔丝，其燃烧状态指示存储在主熔丝中的位值。 熔丝读出逻辑被配置为通过感测主熔丝的燃烧状态来读取位值，并且通过感测一个或多个次熔丝的燃烧状态来有条件地校正读取位值。

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