公开(公告)号：US08179208B2

公开(公告)日：2012-05-15

申请号：US12252808

申请日：2008-10-16

申请人： Robert J. Drost ,  Alex Chow ,  Suwen Yang ,  Mark R. Greenstreet

发明人： Robert J. Drost ,  Alex Chow ,  Suwen Yang ,  Mark R. Greenstreet

IPC分类号： H03H7/20

CPC分类号： H03K5/135 ,  H03K3/0315 ,  H03K5/133

摘要： An interconnect for surfing circuits is presented. The interconnect includes at least one control signal line, at least one data signal line, and at least one variable capacitor coupled to the at least one control signal line and the at least one data signal line, wherein the capacitance of the variable capacitor is configured to be controlled by a control signal on the control signal line so that a velocity of a data signal transmitted on the at least one data signal line is determined by the value of the capacitance of the variable capacitor.

摘要翻译： 介绍了冲浪电路的互连。 互连包括至少一个控制信号线，至少一个数据信号线和耦合到至少一个控制信号线和至少一个数据信号线的至少一个可变电容器，其中可变电容器的电容被配置 由控制信号线上的控制信号控制，使得在至少一条数据信号线上发送的数据信号的速度由可变电容器的电容值决定。

公开(公告)号：US20110089540A1

公开(公告)日：2011-04-21

申请号：US12580658

申请日：2009-10-16

申请人： Robert J. Drost ,  Robert D. Hopkins ,  Alex Chow

发明人： Robert J. Drost ,  Robert D. Hopkins ,  Alex Chow

IPC分类号： H01L23/60

CPC分类号： H01L23/60 ,  H01L24/05 ,  H01L27/0288 ,  H01L2224/02166 ,  H01L2224/05567 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/05552

摘要： A semiconductor die is described. This semiconductor die includes an electro-static discharge (ESD) device with a metal component coupled to an input-output (I/O) pad, and coupled to a ground voltage via a signal line. Moreover, adjacent edges of the metal component and the I/O pad are separated by a spacing that defines an ESD gap. When a field-emission or ionization current flows across the ESD gap, the metal component provides a discharge path to the ground voltage for transient ESD signals. Furthermore, the ESD gap is at least partially enclosed so that there is gas in the ESD gap.

摘要翻译： 描述半导体管芯。 该半导体管芯包括具有耦合到输入 - 输出（I / O）焊盘的金属部件并且经由信号线耦合到接地电压的静电放电（ESD）器件。 此外，金属部件和I / O焊盘的相邻边缘分开限定ESD间隙的间隔。 当场发射或电离电流流过ESD间隙时，金属部件为瞬态ESD信号提供到接地电压的放电路径。 此外，ESD间隙至少部分封闭，使得在ESD间隙中存在气体。

公开(公告)号：US20100176878A1

公开(公告)日：2010-07-15

申请号：US12352481

申请日：2009-01-12

申请人： Robert J. Drost ,  Alex Chow ,  Robert D. Hopkins

发明人： Robert J. Drost ,  Alex Chow ,  Robert D. Hopkins

IPC分类号： H03F1/50

CPC分类号： H03K17/005 ,  H03K17/693

摘要： A capacitively and conductively coupled multiplexer (C3mux) circuit is described. This C3mux circuit includes a set of nonlinear coupling capacitors, such as metal-oxide-semiconductor (MOS) transistors, that can multiplex multiple input signals while minimizing the parasitic capacitance penalty associated with the ‘off’ paths. In particular, the capacitance of a given MOS transistor depends on whether its channel is present or absent. Furthermore, this channel is formed based on whether the gate-to-source and drain voltages for the MOS transistor are greater than the MOS transistor's threshold voltage. Note that the capacitance of the MOS transistors in the C3mux circuit is low for the unselected inputs. Consequently, the parasitic loading and the delay increase slowly as a function of the number of inputs. Moreover, the conductive feedback can be used to maintain a DC level of the input signals.

摘要翻译： 描述了电容和导电耦合多路复用器（C3mux）电路。 该C3mux电路包括一组非线性耦合电容器，例如金属氧化物半导体（MOS）晶体管，其可以复用多个输入信号，同时最小化与“关闭”路径相关联的寄生电容损耗。 特别地，给定MOS晶体管的电容取决于其通道是存在还是不存在。 此外，该沟道是基于MOS晶体管的栅极 - 源极和漏极电压是否大于MOS晶体管的阈值电压而形成的。 请注意，C3mux电路中的MOS晶体管的电容对于未选择的输入为低电平。 因此，寄生负载和延迟作为输入数量的函数缓慢增加。 此外，导电反馈可用于维持输入信号的直流电平。

公开(公告)号：US08358155B2

公开(公告)日：2013-01-22

申请号：US12215943

申请日：2008-06-30

申请人： Alex Chow ,  Robert J. Drost ,  Ronald Ho ,  Arlene Proebsting

发明人： Alex Chow ,  Robert J. Drost ,  Ronald Ho ,  Robert Proebsting

IPC分类号： H03K19/20

CPC分类号： H01L23/48 ,  H01L2225/06527 ,  H01L2924/0002 ,  H01L2924/00

摘要： One embodiment of the present invention provides a system that facilitates proximity communication. This system includes a circuit containing a bootstrap transistor and a pass-gate transistor, where the drain of the bootstrap transistor is coupled to the gate of the pass-gate transistor. Note that a first coupling capacitance exists between the source of the pass-gate transistor and the drain of the bootstrap transistor and a second coupling capacitance exists between the drain of the pass-gate transistor and the drain of the bootstrap transistor. During operation, the gate and the source of the bootstrap transistor are coupled to a high voltage, thereby causing an intermediate voltage at the drain of the bootstrap transistor. When the source of the pass-gate transistor transitions to a high voltage, the first coupling capacitance and the second coupling capacitance boost the voltage at the gate of the pass-gate transistor higher than the high voltage, thereby enabling the high voltage at the source of the pass-gate transistor to pass to the drain of the pass-gate transistor.

公开(公告)号：US20120229941A1

公开(公告)日：2012-09-13

申请号：US13473479

申请日：2012-05-16

申请人： Robert J. Drost ,  Robert D. Hopkins ,  Alex Chow

发明人： Robert J. Drost ,  Robert D. Hopkins ,  Alex Chow

IPC分类号： H02H9/04

CPC分类号： H01L23/60 ,  H01L24/05 ,  H01L27/0288 ,  H01L2224/02166 ,  H01L2224/05567 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/05552

摘要： A semiconductor die is described. This semiconductor die includes an electro-static discharge (ESD) device with a metal component coupled to an input-output (I/O) pad, and coupled to a ground voltage via a signal line. Moreover, adjacent edges of the metal component and the I/O pad are separated by a spacing that defines an ESD gap. When a field-emission or ionization current flows across the ESD gap, the metal component provides a discharge path to the ground voltage for transient ESD signals. Furthermore, the ESD gap is at least partially enclosed so that there is gas in the ESD gap.

摘要翻译： 描述半导体管芯。 该半导体管芯包括具有耦合到输入 - 输出（I / O）焊盘的金属部件并且经由信号线耦合到接地电压的静电放电（ESD）器件。 此外，金属部件和I / O焊盘的相邻边缘分开限定ESD间隙的间隔。 当场发射或电离电流流过ESD间隙时，金属部件为瞬态ESD信号提供到接地电压的放电路径。 此外，ESD间隙至少部分封闭，使得在ESD间隙中存在气体。

公开(公告)号：US20100329390A1

公开(公告)日：2010-12-30

申请号：US12494492

申请日：2009-06-30

申请人： Alex Chow ,  Robert J. Drost ,  Robert David Hopkins

发明人： Alex Chow ,  Robert J. Drost ,  Robert David Hopkins

IPC分类号： H04L25/10 ,  H04B5/00 ,  H04L27/06

CPC分类号： H04L25/03063 ,  H04L25/0268

摘要： A circuit that receives input signals from a transmitter via proximity communication, such as capacitively coupled proximity communication, is described. Because proximity communication may block DC content, the circuit may restore the DC content of input signals. In particular, a refresh circuit in the circuit may short inputs of the circuit to each other at least once per clock cycle (which sets a null value). Furthermore, a feedback circuit ensures that, if there is a signal transition in the input signals during a current clock cycle, it is passed through to an output node of the circuit. On the other hand, if there is no signal transition in the input signals during the current clock cycle, the feedback circuit may select the appropriate output value on the output node based on the output value during the immediately preceding clock cycle.

摘要翻译： 描述了通过诸如电容耦合邻近通信之类的接近通信从发射机接收输入信号的电路。 因为邻近通信可能会阻塞直流内容，所以电路可以恢复输入信号的直流内容。 特别地，电路中的刷新电路可以使每个时钟周期至少一次将电路的输入短路（其设定为空值）。 此外，反馈电路确保，如果在当前时钟周期期间在输入信号中存在信号转换，则其被传递到电路的输出节点。 另一方面，如果在当前时钟周期期间输入信号中没有信号转换，则反馈电路可以基于在紧接的前一时钟周期期间的输出值在输出节点上选择适当的输出值。

公开(公告)号：US20100264954A1

公开(公告)日：2010-10-21

申请号：US12425871

申请日：2009-04-17

申请人： Robert J. Drost ,  Robert D. Hopkins ,  Alex Chow

发明人： Robert J. Drost ,  Robert D. Hopkins ,  Alex Chow

IPC分类号： H03K19/003

CPC分类号： H01L23/66 ,  H01L23/3171 ,  H01L23/48 ,  H01L23/5223 ,  H01L23/5225 ,  H01L23/552 ,  H01L23/585 ,  H01L23/60 ,  H01L23/642 ,  H01L23/645 ,  H01L23/647 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/72 ,  H01L24/90 ,  H01L25/0655 ,  H01L25/0657 ,  H01L25/50 ,  H01L27/0251 ,  H01L2223/6622 ,  H01L2223/6627 ,  H01L2223/6655 ,  H01L2224/02166 ,  H01L2224/0401 ,  H01L2224/05556 ,  H01L2224/05624 ,  H01L2224/13099 ,  H01L2224/95145 ,  H01L2225/06527 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/12032 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19033 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19051 ,  H01L2924/30105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/351 ,  H03H7/38 ,  H01L2924/00

摘要： Embodiments of a circuit for use with an inter-chip connection that has a variable complex impedance (which can be conductive, capacitive or both), a system that includes the circuit, and a communication technique are described. This inter-chip connection may be formed between a microspring or an anisotropic film and a metal connector on or proximate to a surface of a chip. Moreover, the circuit may mitigate signal distortion associated with the variable complex impedance. For example, the circuit may include an internal impedance that is electrically coupled in series with the metal connector, and that has an impedance which dominates the variable complex impedance over a range of operating frequencies. Separately or additionally, the circuit may be adapted to correct for the signal distortion.

摘要翻译： 描述了具有可变复阻抗（其可以是导电，电容或两者）的具有片间连接的电路的实施例，包括该电路的系统以及通信技术。 该芯片间连接可以形成在芯片表面上或其附近的微小弹簧或各向异性膜和金属连接器之间。 此外，电路可以减轻与可变复阻抗相关联的信号失真。 例如，电路可以包括与金属连接器串联电耦合的内部阻抗，并且具有在工作频率范围内支配可变复阻抗的阻抗。 单独地或另外地，电路可以适于校正信号失真。

公开(公告)号：US20090315624A1

公开(公告)日：2009-12-24

申请号：US12143991

申请日：2008-06-23

申请人： Alex Chow ,  Robert J. Drost ,  Robert D. Hopkins

发明人： Alex Chow ,  Robert J. Drost ,  Robert D. Hopkins

IPC分类号： H03F1/38

CPC分类号： H03F1/34 ,  H03F2200/141

摘要： An active resistor and its use in a negative feedback amplifier allow wide voltage swings on the input and output signals. One embodiment includes parallel pass-gate MOS transistors of opposite conductivity types connected between the input and output nodes. Bootstrapping transistors are connected between the gates of the pass-gate transistors and respective bias voltages. Coupling capacitors are connected between the gates and the output node. Additional coupling capacitors may be connected between the gates and the input node to make the resistor symmetric. In other embodiments, only one pass-gate transistor is used.

摘要翻译： 有源电阻及其在负反馈放大器中的应用允许输入和输出信号上的宽电压摆幅。 一个实施例包括连接在输入和输出节点之间的相反导电类型的并行栅极MOS晶体管。 自举晶体管连接在通栅晶体管的栅极和相应的偏置电压之间。 耦合电容器连接在门和输出节点之间。 附加耦合电容器可以连接在栅极和输入节点之间，以使电阻器对称。 在其它实施例中，仅使用一个栅极晶体管。

公开(公告)号：US20090189241A1

公开(公告)日：2009-07-30

申请号：US12317606

申请日：2008-12-24

申请人： Alex Chow ,  Robert J. Drost ,  Ronald Ho ,  Arlene Proebsting

发明人： Alex Chow ,  Robert J. Drost ,  Ronald Ho ,  Arlene Proebsting

IPC分类号： H01L23/52

CPC分类号： H01L23/48 ,  H01L2225/06527 ,  H01L2924/0002 ,  H01L2924/00

摘要： One embodiment of the present invention provides a system that facilitates reducing the power needed for proximity communication. This system includes an integrated circuit with an array of transmission pads that transmit a signal using proximity communication. A layer of fill metal is located in proximity to this array of transmission pads, wherein the layer of fill metal is “floating” (e.g., not connected to any signal). Leaving this layer of fill metal floating reduces the parasitic capacitance for the array of transmission pads, which can reduce the amount of power needed to transmit the signal.

摘要翻译： 本发明的一个实施例提供一种有助于减少邻近通信所需的功率的系统。 该系统包括具有使用接近通信传输信号的传输焊盘阵列的集成电路。 填充金属层位于该传输焊盘阵列附近，其中填充金属层“浮动”（例如，未连接到任何信号）。 离开这层填充金属浮动可以减少传输焊盘阵列的寄生电容，这可以减少传输信号所需的功率。

公开(公告)号：US08698322B2

公开(公告)日：2014-04-15

申请号：US12730823

申请日：2010-03-24

申请人： Robert J. Drost ,  Ashok V. Krishnamoorthy ,  John E. Cunningham

发明人： Robert J. Drost ,  Ashok V. Krishnamoorthy ,  John E. Cunningham

IPC分类号： H01L23/538

CPC分类号： H01L25/0657 ,  H01L23/48 ,  H01L23/5389 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2225/06531 ,  H01L2225/06555 ,  H01L2924/15153

摘要： A multi-chip module (MCM) is described in which at least two substrates are mechanically coupled by an adhesive layer that maintains alignment and a zero (or near zero) spacing between proximity connectors on surfaces of the substrates, thereby facilitating high signal quality during proximity communication between the substrates. In order to provide sufficient shear strength, the adhesive layer has a thickness that is larger than the spacing. This may be accomplished using one or more positive and/or negative features on the substrates. For example, the adhesive may be bonded to: one of the surfaces and an inner surface of a channel that is recessed below the other surface; inner surfaces of channels that are recessed below both of the surfaces; or both of the surfaces. In this last case, the zero (or near zero) spacing may be achieved by disposing proximity connectors on a mesa that protrudes above at least one of the substrate surfaces.

摘要翻译： 描述了一种多芯片模块（MCM），其中至少两个基板通过粘合剂层机械耦合，所述粘合剂层在基板的表面上的接近连接器之间保持对准和零（或接近零）的间隔，从而有利于高信号质量 基板之间的接近连接。 为了提供足够的剪切强度，粘合剂层的厚度大于间隔。 这可以使用衬底上的一个或多个正和/或负特征来实现。 例如，粘合剂可以结合到：一个表面和在另一个表面下方凹进的通道的内表面; 在两个表面下凹陷的通道的内表面; 或两个表面。 在最后一种情况下，零（或接近零）的间距可以通过将接近连接器设置在突出在至少一个衬底表面上的台面上来实现。