公开(公告)号：US20240244747A1

公开(公告)日：2024-07-18

申请号：US17927576

申请日：2021-12-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Nianqi YAO ,  Feifei LI ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Jiayu HE ,  Jie HUANG ,  Kun ZHAO ,  Zhanfeng CAO ,  Ke WANG

IPC: H05K1/11 ,  H01L23/498 ,  H01L33/62 ,  H05K1/09 ,  H05K1/18

CPC classification number: H05K1/111 ,  H01L23/49838 ,  H01L33/62 ,  H05K1/09 ,  H05K1/181 ,  H05K2201/0338 ,  H05K2201/10106 ,  H05K2201/10151

Abstract: A wiring board includes a base substrate and first connection pads disposed on the base substrate. The first connection pads each include electrical connection layer(s); each electrical connection layer includes a main material layer and protective layer(s) disposed on a side of the main material layer away from the base substrate; the protective layer(s) include a first reference protective layer, which is a protective layer farthest away from the base substrate in the protective layer(s); and a material of the main material layer includes copper. The electrical connection layer(s) includes a first electrical connection layer, which is an electrical connection layer farthest away from the base substrate in the electrical connection layer(s); and in protective layer(s) in the first electrical connection layer, at least a material of the first reference protective layer is capable of forming a first intermetallic compound with a first solder.

公开(公告)号：US20240194686A1

公开(公告)日：2024-06-13

申请号：US17908652

申请日：2021-10-25

Applicant: BOE Technology Group Co., Ltd.

Inventor： Nianqi YAO ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Shuilang DONG ,  Lizhong WANG ,  Dapeng XUE ,  Jiayu HE ,  Jie HUANG ,  Lubin SHI ,  Liping LEI

IPC: H01L27/12 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/1225 ,  H01L29/66742 ,  H01L29/78606 ,  H01L29/7869

Abstract: Provided is a thin film transistor and a method for manufacturing thereof, a display panel, and a display device, which relates to the field of display technologies. The thin film transistor includes an active layer, source and drain electrodes, and an oxygen supplementation layer. As an orthogonal projection of the oxygen supplementation layer on the base substrate is at least partially overlapped with an orthogonal projection of a target portion of the active layer on the base substrate, oxygen introduced in forming the oxygen supplementation layer in the thin film transistor is capable of diffusing to the target portion of the active layer, such that a defect in the target portion of the active layer is reduced, and a property of the thin film transistor is greater.

公开(公告)号：US20240186330A1

公开(公告)日：2024-06-06

申请号：US17786177

申请日：2021-08-26

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiayu HE ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Jie HUANG ,  Nianqi YAO ,  Kun ZHAO ,  Feifei LI ,  Liping LEI ,  Qi QI

IPC: H01L27/12

CPC classification number: H01L27/124

Abstract: Embodiments of the present disclosure provide an array substrate and a display apparatus. The array substrate includes: a base substrate; a conductive layer located on the base substrate, where a material of the conductive layer includes copper; and an oxidization protective layer, located on a side, facing away from the base substrate, of the conductive layer, where a material of the oxidization protective layer includes tungsten.

公开(公告)号：US20240178238A1

公开(公告)日：2024-05-30

申请号：US17789505

申请日：2021-06-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Dongfang WANG ,  Ce NING ,  Guangcai YUAN

IPC: H01L27/12

CPC classification number: H01L27/1244 ,  H01L27/1222 ,  H01L27/1251 ,  H01L27/127

Abstract: An array substrate includes: a base; gate lines and data lines on the base; multiple pixel units each including a thin film transistor; first and second conductive layers with a first insulating layer therebetween. The first conductive layer includes a first wiring pattern, the second conductive layer includes a first interconnection pattern, orthographic projections of the first wiring pattern and the first interconnection pattern on the base are at least partially overlapped. The first wiring pattern is connected with the first interconnection pattern through a via hole. Each of part of data lines is located in the first conductive layer and has an auxiliary line formed by the first interconnection pattern in the second conductive layer. The first wiring pattern includes the data lines; at least one of the data line and the first interconnection pattern is connected to a source of the thin film transistor.

公开(公告)号：US20230163145A1

公开(公告)日：2023-05-25

申请号：US16965495

申请日：2019-07-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wei YANG ,  Guangcai YUAN ,  Ce NING ,  Xinhong LU ,  Tianmin ZHOU ,  Lizhong WANG

IPC: H01L27/12

CPC classification number: H01L27/1288 ,  H01L27/1248

Abstract: Provided are an array substrate and a manufacturing method thereof, the manufacturing method includes: forming a first active layer on a base substrate; forming a second active layer; forming a second gate on the second active layer; forming a first insulating layer covering the first active layer on the second gate; patterning the first insulating layer to form first via holes at both sides of the second gate to expose the second active layer; depositing a first metal layer in the first via holes and on the first insulating layer; patterning the first metal layer, removing a part of the first metal layer above the first active layer to expose the first insulating layer; etching the first insulating layer using the patterned first metal layer as a mask, forming second via holes above the first active layer to expose the first active layer; cleaning the exposed first active layer.

公开(公告)号：US20230122965A1

公开(公告)日：2023-04-20

申请号：US17784398

申请日：2021-06-03

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiayu HE ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Jie HUANG ,  Nianqi YAO

IPC: H10K59/126 ,  H10K59/131 ,  H10K71/60 ,  H10K59/13 ,  H10K59/121 ,  H01L27/12

Abstract: A display substrate includes: a base substrate; a metal light-shielding layer disposed on the base substrate; a plurality of pixel units disposed on the base substrate; a plurality of first thin film transistors disposed on the metal light-shielding layer and configured to drive the pixel units; a plurality of photodiodes disposed on the metal light-shielding layer and configured to convert light emitted from the pixel units into photocurrents, each of the photodiodes including a first electrode; a plurality of second thin film transistors disposed on the metal light-shielding layer and configured to receive the photocurrents, so that light emission of the pixel units are compensated according to the photocurrents. Output terminals of the first thin film transistors are electrically connected to the metal light-shielding layer, and a gate of the first thin film transistor is electrically connected to the first electrode. Further disclosed are a display panel and a display substrate manufacturing method.

公开(公告)号：US20220255025A1

公开(公告)日：2022-08-11

申请号：US17732781

申请日：2022-04-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wei YANG ,  Guangcai YUAN ,  Ce NING ,  Xinhong LU ,  Tianmin ZHOU ,  Xin YANG

IPC: H01L51/00 ,  H01L27/32

Abstract: The present disclosure relates to an OLED display panel and display device. The OLED display panel includes: a display area, a bending area and a bonding area for bonding a circuit board, wherein the display panel further includes: a base substrate; a first semiconductor pattern on the base substrate; a first insulating layer group on the first semiconductor pattern; a second semiconductor pattern on the first insulating layer group; a second insulating layer group on the second semiconductor pattern; first via holes in the first insulating layer group and the second insulating layer group; second via holes in the second insulating layer group, wherein the display panel further includes: a first groove located in the bending area and having a depth substantially identical to that of the first via holes; and a metal trace, connecting a trace in the display area to the circuit board.

公开(公告)号：US20210229977A1

公开(公告)日：2021-07-29

申请号：US16753362

申请日：2019-04-03

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaochen MA ,  Guangcai YUAN ,  Ce NING ,  Xin GU ,  Xiao ZHANG Xiao ZHANG ,  Chao LI

IPC: B81B1/00 ,  B81C1/00 ,  B01L3/00

Abstract: A micro-nano channel structure, a method for manufacturing the micro-nano channel structure, a sensor, a method for manufacturing the sensor, and a microfluidic device are provided by the embodiments of the present disclosure. The micro-nano channel structure includes: a base substrate; a base layer, on the base substrate and including a plurality of protrusions; and a channel wall layer, on a side of the plurality of the protrusions away from the base substrate, and the channel wall layer has a micro-nano channel; a recessed portion is provided between adjacent protrusions of the plurality of the protrusions, and an orthographic projection of the micro-nano channel on the base substrate is located within an orthographic projection of the recessed portion on the base substrate.

公开(公告)号：US20210063793A1

公开(公告)日：2021-03-04

申请号：US16631331

申请日：2019-07-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hehe HU ,  Xiaochen MA ,  Guangcai YUAN ,  Ce NING ,  Xin GU

IPC: G02F1/1368 ,  G02F1/1362

Abstract: The present disclosure provides a display panel and a manufacturing method thereof, a driving method and a display device. The display panel includes: a base substrate and a thin film transistor on a surface of the base substrate. The thin film transistor includes: a gate, and a source and a drain arranged along a first direction, and a first passivation layer covering the gate, the source and the drain. a space region in which liquid crystal molecules are filled is formed in the first passivation layer. The space region is between the source and the drain. The source and the drain are configured to control rotation of the liquid crystal molecules.

公开(公告)号：US20190243497A1

公开(公告)日：2019-08-08

申请号：US16319982

申请日：2018-05-14

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wenlin ZHANG ,  Wei YANG ,  Ce NING

IPC: G06F3/041 ,  H01L27/12

Abstract: Provided are an array substrate and preparation method therefor, and a display apparatus. The array substrate includes: a substrate, the substrate having a first TFT region, a touch control region and a second TFT region; a photosensitive PN junction, the photosensitive PN junction being provided in the touch control region; a first thin-film transistor, provided in the first TFT region, and electrically connected to the photosensitive PN junction; and a second thin-film transistor, provided in the second TFT region, and electrically connected to a pixel electrode.