Optical/electrical connector and method of fabrication
    22.
    发明授权
    Optical/electrical connector and method of fabrication 失效
    光/电连接器和制造方法

    公开(公告)号:US5367593A

    公开(公告)日:1994-11-22

    申请号:US115834

    申请日:1993-09-03

    摘要: An optical/electrical connector including a molded base having a well and a plurality of grooves extending from the well to a first outer edge of the base and alignment guides associated with the grooves at the first outer edge. The base further having external electrical connections with first ends exposed and positioned in the well and second ends extending outwardly beyond a second outer edge of the base. An array of photonic components is positioned in the well and each aligned with a separate groove. The array is electrically coupled to the exposed first ends of the external electrical connections of the base. The grooves are filled with a plastic material to form optical waveguides from the optical ports to the first outer edge.

    摘要翻译: 一种光/电连接器,包括具有井的模制基座和从井延伸到基座的第一外边缘的多个槽和与第一外边缘处的槽相关联的对准引导件。 基座还具有外部电连接,第一端暴露并定位在井中,第二端向外延伸超过基座的第二外边缘。 光子组件阵列定位在井中,并且每个与单独的凹槽对准。 阵列电耦合到基座的外部电连接的暴露的第一端。 凹槽用塑料材料填充以形成从光学端口到第一外边缘的光波导。

    Contact areas on an optical waveguide and method of making
    23.
    发明授权
    Contact areas on an optical waveguide and method of making 失效
    光波导上的接触区域和制造方法

    公开(公告)号:US5282071A

    公开(公告)日:1994-01-25

    申请号:US912367

    申请日:1992-07-13

    摘要: An article and a method for making contact areas (221, 222, 230) on an optical waveguide (100, 200) are provided. A waveguide (100, 200) having a first surface (112) and a second surface (113) with a first indent (101) located on the first surface (112) and a second indent (102) located on the second surface (113) and a groove (104) is made interconnecting the first and second indents (101, 102). A low temperature melting member (111) is placed in the first indent (101) on the first surface (112) and is melted, thereby flowing the low temperature melting member into the groove (104) and into the second indent (102) located on the second surface (113).

    摘要翻译: 提供了一种用于在光波导(100,200)上形成接触区域(221,222,230)的物品和方法。 具有第一表面(112)和第二表面(113)的波导(100,200)具有位于第一表面(112)上的第一凹口(101)和位于第二表面(113)上的第二凹口(102) )和使互连第一和第二缩进(101,102)的凹槽(104)。 将低温熔融部件(111)放置在第一表面(112)上的第一压痕(101)中并熔融,从而使低温熔化部件流入槽(104)并进入位于第二压痕 在第二表面(113)上。

    Electronic component and method of manufacture
    24.
    发明授权
    Electronic component and method of manufacture 有权
    电子元件及制造方法

    公开(公告)号:US06630725B1

    公开(公告)日:2003-10-07

    申请号:US09684576

    申请日:2000-10-06

    IPC分类号: H01L23552

    摘要: An electronic component includes a substrate (210, 1510), a device (221, 222) supported by the substrate and including a first bond pad (223, 224, 225, 226), and a cap (231, 232, 631, 731, 732, 1531, 1532) overlying the substrate. The cap includes a second bond pad (241, 242, 243, 244) at an outside surface of the cap, a third bond pad (245, 246, 247, 248) at an inside surface of the cap and electrically coupled to the first bond pad, and an electrically conductive via (251, 252, 254, 751, 752, 753, 754) extending through the cap and electrically coupling together the second and third bond pads.

    摘要翻译: 电子部件包括基板(210,1510),由基板支撑并包括第一接合焊盘(223,224,225,226)的盖子(231,232,631,731) ,732,1531,1532)。 所述盖包括在所述盖的外表面处的第二接合焊盘(241,242,243,244),在所述盖的内表面处的第三接合焊盘(245,246,247,248),并且电耦合到所述第一接合焊盘 接合焊盘和延伸穿过盖并电连接在一起的第二和第三接合焊盘的导电通孔(251,252,254,751,752,753,754)。

    External communication link for a credit card pager
    25.
    发明授权
    External communication link for a credit card pager 失效
    信用卡寻呼机的外部通信链路

    公开(公告)号:US5493437A

    公开(公告)日:1996-02-20

    申请号:US119635

    申请日:1993-09-13

    摘要: A credit card pager having a casing surrounding a substrate and electronic circuitry mounted on the substrate. An information connection including at least one molded waveguide having a core with a photonic device mounted at one end and a second end of the core being positioned on the substrate to be accessible exterior of the casing so as to communicate optical information signals therethrough.

    摘要翻译: 具有围绕基板的壳体和安装在基板上的电子电路的信用卡寻呼机。 一种信息连接,包括至少一个模制波导,其具有安装在一端的具有光子器件的芯的核心,并且芯的第二端位于基板上,以便可触及外壳的外部,以便通过其传送光学信息信号。

    Micro-electro-mechanical device and method of making
    26.
    发明授权
    Micro-electro-mechanical device and method of making 有权
    微机电装置及其制造方法

    公开(公告)号:US06794101B2

    公开(公告)日:2004-09-21

    申请号:US10159909

    申请日:2002-05-31

    IPC分类号: G03G1304

    摘要: A micro-electro-mechanical device (10) including a shorting bar (40) having a first portion (42) electrically coupled to a first input/output signal line (34) and a second portion (43) electrically uncoupled to a second input/output signal line (36). Shorting bar (40) is coupled to a moveable end (49) of a cantilever structure (44). Thus, preferably only the second portion (43) of shorting bar (40) needs to be actuated to be electrically coupled to the second input/output signal line (36).

    摘要翻译: 一种微电子机械装置(10),包括具有电耦合到第一输入/输出信号线(34)的第一部分(42)的短路棒(40)和与第二输入端 /输出信号线(36)。 短杆(40)联接到悬臂结构(44)的可移动端(49)。 因此,优选仅需要致动短路棒(40)的第二部分(43)以电耦合到第二输入/输出信号线(36)。

    Method and apparatus for accurately measuring thickness of a
semiconductor die bond material
    27.
    发明授权
    Method and apparatus for accurately measuring thickness of a semiconductor die bond material 失效
    准确测量半导体管芯接合材料厚度的方法和装置

    公开(公告)号:US5146416A

    公开(公告)日:1992-09-08

    申请号:US663508

    申请日:1991-03-04

    申请人: Shun-Meen Kuo

    发明人: Shun-Meen Kuo

    IPC分类号: G01B5/06

    CPC分类号: G01B5/06

    摘要: A method for measuring die bond material (27) used to bond a semiconductor die (26) to a lead frame (28). The semiconductor die (26) height is measured on the lead frame (28). Die bond material (27) is placed onto the lead frame (28) and the semiconductor die (26) is pressed into the die bond material (27). The height of the semiconductor die (26) on the die bond material (27) is measured again. Thickness of the die bond material (27) is obtained by subtraction of the two heights.

    摘要翻译: 一种用于测量用于将半导体管芯(26)接合到引线框架(28)的管芯接合材料(27)的方法。 在引线框架(28)上测量半导体管芯(26)的高度。 将芯片接合材料(27)放置在引线框架(28)上,半导体管芯(26)被压入管芯接合材料(27)。 再次测量芯片接合材料(27)上的半导体管芯(26)的高度。 通过减去两个高度获得管芯接合材料(27)的厚度。

    Device under test de-embedding
    28.
    发明授权
    Device under test de-embedding 有权
    被测设备去嵌入

    公开(公告)号:US07920987B2

    公开(公告)日:2011-04-05

    申请号:US12037333

    申请日:2008-02-26

    IPC分类号: G21C17/00

    CPC分类号: G01R31/2822 G01R27/28

    摘要: A method of determining the intrinsic electrical characteristics of a device under test (DUT) includes determining a set of test measurements for a test structure including the device and determining test measurements for a number of de-embedding test structures. Based on the test measurements, DUT measurements are determined using both open-short and three-step de-embedding processes. The DUT measurements are combined to determine an imperfection error, which is used to adjust the calculations of a four-port de-embedding method. The adjusted calculations provide for a more accurate measurement of the parasitic elements in the test structure, thereby improving the determination of the intrinsic electrical characteristics of the device.

    摘要翻译: 确定被测设备(DUT)的固有电特性的方法包括确定包括设备的测试结构的测试测量集合以及确定多个解嵌测试结构的测试测量结果。 基于测试测量,使用开放式和三步式去嵌入处理来确定DUT测量。 DUT测量被组合以确定不完美误差,其用于调整四端口去嵌入方法的计算。 经调整的计算提供了对测试结构中的寄生元件的更精确的测量,从而改进了器件的固有电特性的确定。

    DEVICE UNDER TEST DE-EMBEDDING
    29.
    发明申请
    DEVICE UNDER TEST DE-EMBEDDING 有权
    测试去嵌入设备

    公开(公告)号:US20090216480A1

    公开(公告)日:2009-08-27

    申请号:US12037333

    申请日:2008-02-26

    IPC分类号: G01R31/28

    CPC分类号: G01R31/2822 G01R27/28

    摘要: A method of determining the intrinsic electrical characteristics of a device under test (DUT) includes determining a set of test measurements for a test structure including the device and determining test measurements for a number of de-embedding test structures. Based on the test measurements, DUT measurements are determined using both open-short and three-step de-embedding processes. The DUT measurements are combined to determine an imperfection error, which is used to adjust the calculations of a four-port de-embedding method. The adjusted calculations provide for a more accurate measurement of the parasitic elements in the test structure, thereby improving the determination of the intrinsic electrical characteristics of the device.

    摘要翻译: 确定被测设备(DUT)的固有电特性的方法包括确定包括设备的测试结构的测试测量集合以及确定多个解嵌测试结构的测试测量结果。 基于测试测量,使用开放式和三步式去嵌入处理来确定DUT测量。 DUT测量被组合以确定不完美误差,其用于调整四端口去嵌入方法的计算。 经调整的计算提供了对测试结构中的寄生元件的更精确的测量,从而改进了器件的固有电特性的确定。