公开(公告)号：US20080260370A1

公开(公告)日：2008-10-23

申请号：US10583864

申请日：2004-12-22

Applicant: Elke Zakel ,  Ghassem Azdasht

Inventor： Elke Zakel ,  Ghassem Azdasht

IPC: G03B15/03

CPC classification number: G02B27/143 ,  G02B27/144

Abstract: Optical system (40) for observing multiple objects (61, 63) positioned distal from one another, having a camera unit (42) comprising a first prism unit (43) positioned on the optical axis (41) and/or in the beam path (47) of the camera unit for producing two partial beam paths (48, 49) as well as two object prism units (51, 52), each of which is situated in a partial beam path and assigned to an object.

Abstract translation: 用于观察彼此远离定位的多个物体（61,63）的光学系统（40），具有相机单元（42），该照相机单元包括位于光轴（41）和/或光束路径中的第一棱镜单元（43） 用于产生两个部分光束路径（48,49）的相机单元（47）以及两个物镜棱镜单元（51,52），每个物镜棱镜单元位于部分光束路径中并被分配给物体。

公开(公告)号：US07087442B2

公开(公告)日：2006-08-08

申请号：US09962553

申请日：2001-09-24

Applicant: Hans-Hermann Oppermann ,  Elke Zakel ,  Ghassem Azdasht ,  Paul Kasulke

Inventor： Hans-Hermann Oppermann ,  Elke Zakel ,  Ghassem Azdasht ,  Paul Kasulke

IPC: G01R31/26 ,  H01L21/66 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC classification number: H01L25/0657 ,  H01L25/0652 ,  H01L2225/06517 ,  H01L2225/06551 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2225/06579 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Process for the formation of a spatial chip arrangement having several chips (32, 36, 37, 38, 39) arranged in several planes and electrically connected to one another, in which the chips are connected via their peripheral connection surfaces (33) to assigned conducting paths (23) of a conducting-path structure (24, 25) arranged on at least one carrier substrate (21, 22) by the chips being arranged transverse to the longitudinal extent of the carrier substrate.

Abstract translation: 用于形成具有布置在多个平面中并彼此电连接的多个芯片（32,36,37,38,39）的空间芯片布置的工艺，其中芯片经由其外围连接表面（33）连接到分配 通过所述芯片布置在至少一个载体基板（21,22）上的导电通路结构（24,25）的导电路径（23）横向于所述载体基板的纵向延伸。

公开(公告)号：US06720257B1

公开(公告)日：2004-04-13

申请号：US09937955

申请日：2001-09-28

Applicant: Elke Zakel

Inventor： Elke Zakel

IPC: H01L214763

CPC classification number: H01L24/11 ,  H01L2224/13099 ,  H01L2924/01004 ,  H01L2924/01013 ,  H01L2924/01016 ,  H01L2924/01019 ,  H01L2924/01025 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01051 ,  H01L2924/01052 ,  H01L2924/0106 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014

Abstract: A method for manufacturing a bump on a terminal face (Z1) of a semiconductor substrate (20), in which the terminal face is nucleated to generate a basic metallization through electrolytic coating of the terminal face with zincate, in such a way that zinc particles (24) electrolytically deposited on the terminal face serve as nuclei for an ensuing contact metallization (28) autocatalytically deposited on the basic metallization. In addition to the electrolytic coating with zincate, an electrolytic coating of the terminal face with palladium takes place, in such a way that, in addition to zinc particles (24), palladium particles (25) deposited on the terminal face serve as nuclei for the contact metallization subsequently autocatalytically deposited on the terminal face.

Abstract translation: 一种用于在半导体衬底（20）的端面（Z1）上制造凸起的方法，其中端子面被成核以通过用锌酸盐的端子的电解涂覆产生碱性金属化，使得锌颗粒 电解沉积在终端面上的（24）用作用于随后的基本金属化自动催化沉积的接触金属化（28）的核。 除了用锌酸盐的电解涂层之外，还发生了具有钯的末端面的电解涂层，使得除了锌颗粒（24）之外，沉积在终端面上的钯颗粒（25）用作核 接触金属化随后自动催化沉积在端子表面上。

公开(公告)号：US06277660B1

公开(公告)日：2001-08-21

申请号：US09497437

申请日：2000-02-03

Applicant: Elke Zakel ,  Frank Ansorge ,  Paul Kasulke ,  Andreas Ostmann ,  Rolf Aschenbrenner ,  Lothar Dietrich

Inventor： Elke Zakel ,  Frank Ansorge ,  Paul Kasulke ,  Andreas Ostmann ,  Rolf Aschenbrenner ,  Lothar Dietrich

IPC: H01L2126

CPC classification number: G01R1/07307 ,  H01L21/4853 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/16225 ,  H01L2924/01322 ,  H01L2924/15173

Abstract: Method and apparatus for the testing of substrates which are provided with a wiring structure, in particular, chips (21), in conjunction with which, by means of a solder-deposit carrier (25) which is provided with a structured, electrically conductive coating (12) with bond pads (17) for the arranging of solder deposits (28) and their transfer to correspondingly arranged bond pads (22) of a substrate (21), an electrical check of the wiring structure of the substrate (21) takes place during the transfer of the solder deposits (28).

公开(公告)号：US06211571B1

公开(公告)日：2001-04-03

申请号：US08709344

申请日：1996-09-06

Applicant: Elke Zakel ,  Frank Ansorge ,  Paul Kasulke ,  Andreas Ostmann ,  Rolf Aschenbrenner ,  Lothar Dietrich

Inventor： Elke Zakel ,  Frank Ansorge ,  Paul Kasulke ,  Andreas Ostmann ,  Rolf Aschenbrenner ,  Lothar Dietrich

IPC: H01L21331

CPC classification number: G01R1/07307 ,  H01L21/4853 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/11003 ,  H01L2224/16225 ,  H01L2924/01322 ,  H01L2924/15173

Abstract: Method and apparatus for the testing of substrates which are provided with a wiring structure, in particular, chips (21), in conjunction with which, by means of a solder-deposit carrier (25) which is provided with a structured, electrically conductive coating (12) with bond pads (17) for the arranging of solder deposits (28) and their transfer to correspondingly arranged bond pads (22) of a substrate (21), an electrical check of the wiring structure of the substrate (21) takes place during the transfer of the solder deposits (28).

Abstract translation: 用于测试衬底的方法和装置，其具有布线结构，特别是芯片（21），借助于焊料沉积载体（25），其配备有结构化的导电涂层 （12）具有用于布置焊料沉积物（28）的接合焊盘（17）和它们转移到基板（21）的相应布置的焊盘（22），基板（21）的布线结构的电检查 在焊料沉积物转移过程中的位置（28）。

公开(公告)号：US6153940A

公开(公告)日：2000-11-28

申请号：US836804

申请日：1997-08-04

Applicant: Elke Zakel ,  Jens Nave ,  Joachim Eldring

Inventor： Elke Zakel ,  Jens Nave ,  Joachim Eldring

IPC: H05K3/34 ,  H01L21/60 ,  H01L23/12 ,  H01L23/485 ,  H05K3/24 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC classification number: H01L24/81 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/11462 ,  H01L2224/13 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/45144 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/0102 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01068 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/15787 ,  H01L2924/30105 ,  H01L2924/30107

Abstract: The invention relates to a solder bump of an inhomogeneous material compoion for connecting contact pad metallizations of different electronic components or substrates in flip-chip technology, as well as to a method of making such a solder bump. A solder bump consists of a space defining high-melting solder bump core and a layer of a preferably low-melting solder material deposited thereon. The preconditions required for soldering, such as solder deposition, bump height and soldering temperature are thus all combined in the solder bump.

Abstract translation: PCT No.PCT / DE95 / 01589 Sec。 371日期：1997年8月4日 102（e）日期1997年8月4日PCT 1995年11月10日PCT公布。 公开号WO96 / 16442 日期：1996年5月30日本发明涉及一种用于以倒装芯片技术连接不同电子部件或基板的接触焊盘金属化的不均匀材料组合物的焊料凸块，以及制造这种焊料凸块的方法。 焊料凸块由限定高熔点焊料凸点芯的空间和沉积在其上的优选低熔点焊料材料的层组成。 因此焊料凸起中所有的钎焊所需的前提条件，如焊锡沉积，凸块高度和焊接温度都被组合在一起。

公开(公告)号：US6107118A

公开(公告)日：2000-08-22

申请号：US11570

申请日：1998-05-18

Applicant: Rolf Aschenbrenner ,  Elke Zakel ,  Hans-Hermann Oppermann ,  Ghassem Azdasht

Inventor： Rolf Aschenbrenner ,  Elke Zakel ,  Hans-Hermann Oppermann ,  Ghassem Azdasht

IPC: H01L21/58 ,  H01L21/60 ,  H01L21/44 ,  H01L21/48 ,  H01L21/50

CPC classification number: H01L24/83 ,  H01L24/29 ,  H01L24/81 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2224/83192 ,  H01L2224/8385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01043 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/14

Abstract: In a contact-bumpless chip contacting method for contacting a chip having a plurality of conductive contact areas, which are not provided with an additional metallization layer, a carrier substrate is provided, which has a first surface having arranged thereon a plurality of conductive connecting sections. A non-conductive adhesive layer is arranged on the first surface of the carrier substrate and subsequently, the carrier substrate is aligned with the chip to be contacted such that a plurality of conductive contact areas on the chip to be contacted is in alignment with the connecting sections on the first surface of the carrier substrate. Then the carrier substrate is connected to the chip to be contacted by means of the adhesive layer in such a way that the connecting sections of the carrier substrate and the contact areas of the chip abut on one another by means of pressure contact, without any intermetallic connection being established.

Abstract translation: PCT No.PCT / EP96 / 03351 Sec。 371日期1998年5月18日 102（e）日期1998年5月18日PCT提交1996年7月30日PCT公布。 公开号WO97 / 06557 日期：1997年2月20日在接触不牢度的芯片接触方法中，用于接触具有多个不具有附加金属化层的导电接触区域的芯片，提供载体基板，其具有布置在其上的第一表面 多个导电连接部。 在载体基板的第一表面上布置非导电粘合剂层，随后将载体基板与要接触的芯片对准，使得要接触的芯片上的多个导电接触区域与连接 载体基板的第一表面上的部分。 然后，载体衬底通过粘合剂层连接到芯片上以使得载体衬底的连接部分和芯片的接触区域通过压力接触彼此抵接，而没有任何金属间化合物 建立连接。

公开(公告)号：US6070788A

公开(公告)日：2000-06-06

申请号：US809538

申请日：1997-05-08

Applicant: Elke Zakel

Inventor： Elke Zakel

IPC: B23K1/00 ,  B23K1/20 ,  B23K35/14 ,  C22C1/02 ,  H01L21/60 ,  H05K3/34

CPC classification number: H05K3/3494 ,  B23K1/203 ,  H05K3/3468 ,  H05K3/3484 ,  B23K2201/36 ,  H05K2203/0425 ,  H05K2203/043 ,  H05K2203/044 ,  H05K2203/0776 ,  H05K3/3478

Abstract: A method of applying molten solder to connection surfaces on a substrate. The substrate, which has a surface which can be wetted with solder or at least one area which can be wetted while the rest cannot, is immersed in an organic liquid medium whose boiling point is the same as or above the melting point of the solder. Solder is applied to the surface or the area on the substrate where a terminal is to be formed to produce a solder bump, the quantity of solder to be placed on the connection surface is in the liquid medium, at least at the moment when it makes contact with the surface, and the temperature of the liquid medium is at or above the melting point of the solder.

Abstract translation: PCT No.PCT / DE95 / 01209 Sec。 371日期：1997年5月8日 102（e）日期1997年5月8日PCT提交1995年9月4日PCT公布。 公开号WO96 / 08337 日期1996年3月21日一种将熔融焊料施加到基板上的连接表面的方法。 具有可以用焊料润湿的表面的基材或者其余部分不能润湿的至少一个区域浸渍在沸点相同或高于焊料熔点的有机液体介质中。 将焊料施加到要形成端子的表面或基板上的区域以产生焊料凸块，至少在其形成的时刻，要放置在连接表面上的焊料的量在液体介质中 与表面接触，液体介质的温度等于或高于焊料的熔点。

公开(公告)号：US5976302A

公开(公告)日：1999-11-02

申请号：US860311

申请日：1997-11-07

Applicant: Hans Hermann Oppermann ,  Elke Zakel ,  Christine Kallmayer ,  Achim Kloeser

Inventor： Hans Hermann Oppermann ,  Elke Zakel ,  Christine Kallmayer ,  Achim Kloeser

IPC: H01L21/60 ,  B32B31/00 ,  H05K3/30

CPC classification number: H01L24/81 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/0102 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/14 ,  Y10T156/1092 ,  Y10T29/4913 ,  Y10T29/49144

Abstract: A method for the temporary fixing of an electronic component (10) having elevated contact metallizations (11) to a substrate (17) provided with terminal surfaces (16) for a subsequent thermal connection of the contact metallizations to the terminal surfaces, wherein a bonding agent is applied to the component and/or the substrate and wherein the bonding agent used is an alcoholic liquid medium containing an alcohol (13) whose surface tension is used to form bonding forces between the contact metallizations and the terminal surfaces and whose boiling point is below the melting temperature of the contact metallizations (11).

Abstract translation: PCT No.PCT / DE95 / 01871 Sec。 371日期：1997年11月7日 102（e）日期1997年11月7日PCT 1995年12月23日PCT公布。 第WO96 / 24951号公报 日期1996年8月15日一种用于将具有高接触金属化（11）的电子部件（10）临时固定到具有端子表面（16）的基板（17）上的方法，用于随后将接触金属化物热连接到端子 表面，其中粘合剂施加到部件和/或基底上，并且其中使用的粘合剂是含有醇（13）的醇液体介质，其表面张力用于在接触金属化和终端表面之间形成结合力 并且其沸点低于接触金属化物（11）的熔融温度。

公开(公告)号：US5833128A

公开(公告)日：1998-11-10

申请号：US685715

申请日：1996-07-24

Applicant: Joachim Kloeser ,  Elke Zakel ,  Herbert Reichl

Inventor： Joachim Kloeser ,  Elke Zakel ,  Herbert Reichl

IPC: H05K3/34 ,  B23K1/20 ,  H01L21/60 ,  H01L23/485 ,  H01L23/498

CPC classification number: H01L24/10 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/13 ,  H01L2224/13155 ,  H01L2224/1357 ,  H01L2224/13644 ,  H01L2224/81801 ,  H01L2924/00013 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01057 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/3025

Abstract: Method of flux-free contacting of components on a substrate, having the following process steps: producing elevated contact metal bumps of a flux-treated gold-tin solder material on tags of the component; removing flux residues on the surface of the component; melting the elevated contact metal bumps and contacting the contact metal bumps with tags of the substrate.

Abstract translation: 在基板上的部件无助熔接触方法，具有以下工艺步骤：在组件的标签上产生焊剂处理的金 - 锡焊料材料的升高的接触金属凸块; 去除部件表面上的焊剂残留物; 熔化升高的接触金属凸块并使接触金属凸块与基板的标签接触。