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    Conducting network performance analysis
    23.
    发明授权
    Conducting network performance analysis 有权

    公开(公告)号：US12015535B2

    公开(公告)日：2024-06-18

    申请号：US17976553

    申请日：2022-10-28

    Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

    Inventor： Shithal Tumkur Kenchappa ,  Prashanth Tamraparni ,  Duncan Roweth ,  David Charles Hewson ,  Vivek Sharma

    IPC: H04L43/0852 ,  H04L41/0604 ,  H04L43/067

    CPC classification number: H04L43/0852 ,  H04L41/0627 ,  H04L43/067

    Abstract: A method for conducting a network performance analysis, the method comprising measuring latencies of a plurality of packets communicated over a network includes determining latency representations for a plurality of levels of the network, for a plurality of communication routes, and/or for a plurality of communication types. The latency representations comprise the latency measurements, statistical representations of the latency measurements, and/or latency metrics derived from the latency measurements. The method includes comparing the determined latency representations to expected latency representations, the expected latency representations comprising expected latencies, expected statistical representation of latencies, and/or expected latency metrics. Based on the comparison, the method includes determining a discrepancy between one of the expected latency representations and one of the determined latency representations; and based on the determined discrepancy, identifying one of the levels of the network, the communication routes, and/or the communication types as an excess-latency-causing portion of the network.

    System and method for implementing a network-interface-based allreduce operation
    29.
    发明授权
    System and method for implementing a network-interface-based allreduce operation 有权

    公开(公告)号：US11714765B2

    公开(公告)日：2023-08-01

    申请号：US17383606

    申请日：2021-07-23

    Applicant: Hewlett Packard Enterprise Development LP

    Inventor： Keith D. Underwood ,  Robert L. Alverson ,  Duncan Roweth ,  Nathan L. Wichmann

    IPC: G06F13/20 ,  G06F12/10

    CPC classification number: G06F13/20 ,  G06F12/10 ,  G06F2212/1024

    Abstract: An apparatus is provided that includes a network interface to transmit and receive data packets over a network; a memory including one or more buffers; an arithmetic logic unit to perform arithmetic operations for organizing and combining the data packets; and a circuitry to receive, via the network interface, data packets from the network; aggregate, via the arithmetic logic unit, the received data packets in the one or more buffers at a network rate; and transmit, via the network interface, the aggregated data packets to one or more compute nodes in the network, thereby optimizing latency incurred in combining the received data packets and transmitting the aggregated data packets, and hence accelerating a bulk data allreduce operation. One embodiment provides a system and method for performing the allreduce operation. During operation, the system performs the allreduce operation by pacing network operations for enhancing performance of the allreduce operation.

    SYSTEM AND METHOD FOR FACILITATING EFFICIENT PACKET FORWARDING IN A NETWORK INTERFACE CONTROLLER (NIC)
    30.
    发明申请
    SYSTEM AND METHOD FOR FACILITATING EFFICIENT PACKET FORWARDING IN A NETWORK INTERFACE CONTROLLER (NIC) 有权

    公开(公告)号：US20220311544A1

    公开(公告)日：2022-09-29

    申请号：US17594638

    申请日：2020-03-23

    Applicant: Hewlett Packard Enterprise Development LP

    Inventor： Robert Alverson ,  Partha Pratim Kundu ,  Duncan Roweth ,  David Charles Hewson ,  Albert SauPong Cheng

    IPC: H04L1/00 ,  H04L49/00

    Abstract: A network interface controller (NIC) capable of efficient packet forwarding is provided. The NIC can be equipped with a host interface, a packet generation logic block, and a forwarding logic block. During operation, the packet generation logic block can obtain, via the host interface, a message from the host device and for a remote device. The packet generation logic block may generate a plurality of packets for the remote device from the message. The forwarding logic block can then send a first subset of packets of the plurality of packets based on ordered delivery. If a first condition is met, the forwarding logic block can send a second subset of packets of the plurality of packets based on unordered delivery. Furthermore, if a second condition is met, the forwarding logic block can send a third subset of packets of the plurality of packets based on ordered delivery.

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