公开(公告)号：US20220238532A1

公开(公告)日：2022-07-28

申请号：US17647902

申请日：2022-01-13

Applicant: Micron Technology, Inc.

Inventor： Devesh Dadhich Shreeram ,  Kangle Li ,  Matthew N. Rocklein ,  Wei Ching Huang ,  Ping-Cheng Hsu ,  Sevim Korkmaz ,  Sanjeev Sapra ,  An-Jen B. Cheng

IPC: H01L27/108

Abstract: A DRAM capacitor may include a first capacitor electrode, a capacitor dielectric adjacent to the first capacitor electrode, and a second capacitor electrode adjacent to the capacitor dielectric. The first capacitor electrode may include a lower portion, an upper portion, and a step transition between the lower portion and the upper portion, a width of the upper portion of the first capacitor electrode at the step transition is less than a width of the lower portion of the first capacitor electrode at the step transition. Semiconductor devices, systems, and methods are also disclosed.

公开(公告)号：US11011521B2

公开(公告)日：2021-05-18

申请号：US16423684

申请日：2019-05-28

Applicant: Micron Technology, Inc.

Inventor： Sevim Korkmaz ,  Devesh Dadhich Shreeram ,  Srinivasan Balakrishnan ,  Dewali Ray ,  Sanjeev Sapra ,  Paul A. Paduano

IPC: H01L27/108 ,  H01L49/02

Abstract: Methods, apparatuses, and systems related to removing a hard mask are described. An example method includes patterning a silicon hard mask on a semiconductor structure having a first silicate material on a working surface. The method further includes forming a first nitride material on the first silicate material. The method further includes forming a second silicate material on the first nitride material. The method further includes forming a second nitride material on the second silicate material. The method further includes an opening through the semiconductor structure using the patterned hard mask to form a pillar support. The method further includes forming a silicon liner material on the semiconductor structure. The method further includes removing the silicon liner material using a wet etch process.

公开(公告)号：US20210143011A1

公开(公告)日：2021-05-13

申请号：US17153997

申请日：2021-01-21

Applicant: Micron Technology, Inc.

Inventor： Nicholas R. Tapias ,  Sanjeev Sapra ,  Anish A. Khandekar ,  Shen Hu

IPC: H01L21/02 ,  H01L21/762

Abstract: Methods, apparatuses, and systems related to semiconductor structure formation are described. An example method includes forming an opening through silicon (Si) material, formed over a semiconductor substrate, to a first depth to form pillars of Si material. The example method further includes depositing an isolation material within the opening to fill the opening between the Si pillars. The example method further includes removing a portion of the isolation material from between the pillars to a second depth to create a second opening between the pillars and defining inner sidewalls between the pillars. The example method further includes depositing an enhancer material over a top surface of the pillars and along the inner sidewalls of the pillars down to a top portion of the isolation material.

公开(公告)号：US10964475B2

公开(公告)日：2021-03-30

申请号：US16258904

申请日：2019-01-28

Applicant: Micron Technology, Inc.

Inventor： Devesh Dadhich Shreeram ,  Sevim Korkmaz ,  Jian Li ,  Sanjeev Sapra ,  Dewali Ray

IPC: H01L49/02 ,  H01G4/008 ,  H01G4/08

Abstract: Methods, apparatuses, and systems related to forming a capacitor using a sacrificial material are described. An example method includes forming a first silicate material on a substrate. The method further includes forming a first nitride material on the first silicate material. The method further includes forming a second silicate material on the first nitride material. The method further includes forming a second nitride material on the second silicate material. The method further includes forming a sacrificial material on the second nitride material. The method further includes forming a column of capacitor material through the first silicate material, the first nitride material, the second silicate material, the second nitride material, and the sacrificial material. The method further includes removing the sacrificial material to expose a top portion of the capacitor material.

公开(公告)号：US20200328076A1

公开(公告)日：2020-10-15

申请号：US16383159

申请日：2019-04-12

Applicant: Micron Technology, Inc.

Inventor： Sevim Korkmaz ,  Sanjeev Sapra ,  Jerome A. Imonigie ,  Armin Saeedi Vahdat

IPC: H01L21/02 ,  H01L49/02 ,  H01L27/108

Abstract: Methods, apparatuses, and systems related to semiconductor processing (e.g., of a capacitor support structure) are described. An example method includes patterning a surface of a semiconductor substrate to have a first silicate material, a nitride material over the first silicate material, and a second silicate material over the nitride material. The method further includes removing the first silicate material and the second silicate material and leaving the nitride material as a support structure for a column formed from a capacitor material. The method further includes performing supercritical drying on the column, after removal of the first and second silicate materials, to reduce a probability of the column wobbling relative to otherwise drying the column after the removal of the first and second silicate materials.

公开(公告)号：US20200243640A1

公开(公告)日：2020-07-30

申请号：US16259131

申请日：2019-01-28

Applicant: Micron Technology, Inc.

Inventor： Diem Thy N. Tran ,  Devesh Dadhich Shreeram ,  Sanjeev Sapra

IPC: H01L49/02 ,  H01L27/108 ,  H01G4/08

Abstract: Methods, apparatuses, and systems related to forming a capacitor using a hard mask material are described. An example method includes patterning a surface to have a first silicate material, a first nitride material on the first silicate material, a second silicate material on the first nitride material, a second nitride material on the second silicate material, and a sacrificial material on the second nitride material. The method further includes forming a hard mask material on the sacrificial material. The method further includes forming a capacitor material in an opening through the first silicate material, the first nitride material, the second silicate material, the second nitride material, the sacrificial material, and the hard mask material. The method further includes removing the sacrificial material and the hard mask material.

公开(公告)号：US10607851B2

公开(公告)日：2020-03-31

申请号：US15686526

申请日：2017-08-25

Applicant: Micron Technology, Inc.

Inventor： Andrew L. Li ,  Prashant Raghu ,  Sanjeev Sapra ,  Rita J. Klein ,  Sanh D. Tang ,  Sourabh Dhir

IPC: H01L21/00 ,  H01L21/311 ,  H01L21/02 ,  H01L27/108 ,  H01L21/66 ,  H01L21/67 ,  H01L29/423 ,  H01L29/786 ,  H01L29/66

Abstract: Various embodiments comprise methods of selectively etching oxides over nitrides in a vapor-etch cyclic process. In one embodiment, the method includes, in a first portion of the vapor-etch cyclic process, exposing a substrate having oxide features and nitride features formed thereon to selected etchants in a vapor-phase chamber; transferring the substrate to a post-etch heat treatment chamber; and heating the substrate to remove etchant reaction products from the substrate. In a second portion of the vapor-etch cyclic process, the method continues with transferring the substrate from the post-etch heat treatment chamber to the vapor-phase chamber; exposing the substrate to the selected etchants in the vapor-phase chamber; transferring the substrate to the post-etch heat treatment chamber; and heating the substrate to remove additional etchant reaction products from the substrate. Apparatuses for performing the method and additional methods are also disclosed.

公开(公告)号：US20190267232A1

公开(公告)日：2019-08-29

申请号：US15904777

申请日：2018-02-26

Applicant: Micron Technology, Inc.

Inventor： Michael T. Andreas ,  Jerome A. Imonigie ,  Prashant Raghu ,  Sanjeev Sapra ,  Ian K. McDaniel

IPC: H01L21/02 ,  B81C1/00

Abstract: In an example, a wet cleaning process is performed to clean a structure having features and openings between the features while preventing drying of the structure. After performing the wet cleaning process, a polymer solution is deposited in the openings while continuing to prevent any drying of the structure. A sacrificial polymer material is formed in the openings from the polymer solution. The structure may be used in semiconductor devices, such as integrated circuits, memory devices, MEMS, among others.

公开(公告)号：US09397210B2

公开(公告)日：2016-07-19

申请号：US14043943

申请日：2013-10-02

Applicant: Micron Technology, Inc.

Inventor： James Mathew ,  Gordon Haller ,  Ronald A. Weimer ,  John Hopkins ,  Vinayak K. Shamanna ,  Sanjeev Sapra

IPC: H01L27/115 ,  H01L29/78 ,  H01L21/764

CPC classification number: H01L29/78 ,  H01L21/764 ,  H01L27/11524 ,  H01L27/1157

Abstract: A memory array has first and second memory cells over a semiconductor and an isolation region extending into the semiconductor. The isolation region includes an air gap between charge-storage structures of the first and second memory cells and a thickness of dielectric over the air gap and contained between the first and second memory cells.

Abstract translation: 存储器阵列具有半导体上的第一和第二存储器单元以及延伸到半导体中的隔离区。 隔离区包括第一和第二存储单元的电荷存储结构之间的气隙和气隙上的电介质的厚度，并且包含在第一和第二存储单元之间。

公开(公告)号：US12193208B2

公开(公告)日：2025-01-07

申请号：US17647902

申请日：2022-01-13

Applicant: Micron Technology, Inc.

Inventor： Devesh Dadhich Shreeram ,  Kangle Li ,  Matthew N. Rocklein ,  Wei Ching Huang ,  Ping-Cheng Hsu ,  Sevim Korkmaz ,  Sanjeev Sapra ,  An-Jen B. Cheng

IPC: H10B12/00

Abstract: A DRAM capacitor may include a first capacitor electrode, a capacitor dielectric adjacent to the first capacitor electrode, and a second capacitor electrode adjacent to the capacitor dielectric. The first capacitor electrode may include a lower portion, an upper portion, and a step transition between the lower portion and the upper portion, a width of the upper portion of the first capacitor electrode at the step transition is less than a width of the lower portion of the first capacitor electrode at the step transition. Semiconductor devices, systems, and methods are also disclosed.