公开(公告)号：US20050042886A1

公开(公告)日：2005-02-24

申请号：US10645679

申请日：2003-08-21

申请人： Aaron Frank ,  David Gonzalez ,  John DeGenova ,  Srinivas Raghavan ,  Deepak Ramappa

发明人： Aaron Frank ,  David Gonzalez ,  John DeGenova ,  Srinivas Raghavan ,  Deepak Ramappa

IPC分类号： H01L21/28 ,  B08B7/00 ,  C25D5/34 ,  C25D7/12 ,  H01L21/00 ,  H01L21/288 ,  H01L21/304 ,  H01L21/321 ,  H01L21/768 ,  H01L21/31

CPC分类号： H01L21/76856 ,  B08B7/0057 ,  C25D5/34 ,  H01L21/321 ,  H01L21/67028 ,  H01L21/67115 ,  H01L21/76862 ,  H01L21/76873

摘要： The present invention provides a system for removing organic contaminants (216) from a copper seed layer that has been deposited on a semiconductor substrate (206). The present invention provides a housing (204) to enclose the semiconductor substrate within. An ultraviolet radiation source (210) is disposed within the housing. A treatment medium (208) is also provided within the housing. The semiconductor substrate is enclosed within the housing and exposed to the treatment medium. The ultraviolet radiation source exposes the semiconductor substrate to ultraviolet radiation, desorbing the contaminants from the seed layer.

摘要翻译： 本发明提供了一种从已沉积在半导体衬底（206）上的铜籽晶层去除有机污染物（216）的系统。 本发明提供一种将半导体衬底包围的壳体（204）。 紫外线辐射源（210）设置在壳体内。 处理介质（208）也设置在壳体内。 将半导体衬底封装在壳体内并暴露于处理介质。 紫外线辐射源将半​​导体衬底暴露于紫外线辐射，从种子层解吸污染物。

公开(公告)号：US08603900B2

公开(公告)日：2013-12-10

申请号：US12911029

申请日：2010-10-25

申请人： Deepak Ramappa

发明人： Deepak Ramappa

IPC分类号： H01L21/425 ,  H01L21/00 ,  H01L21/38 ,  H01L21/469

CPC分类号： H01L31/1804 ,  H01L31/02168 ,  H01L31/022441 ,  H01L31/0682 ,  H01L31/1864 ,  H01L31/1868 ,  Y02E10/547 ,  Y02P70/521

摘要： Methods of improving the anti-reflection properties of one or more dielectric layers and reducing surface recombination of generated carriers of a solar cell are disclosed. In some embodiments, dopants are introduced into the dielectric layers to improve their anti-reflection properties. In other embodiments, species are introduced into the dielectric layers to create electrical fields which repel the minority carriers away from the surface and toward the contacts. In another embodiment, mobiles species are introduced to the anti-reflective coating, which cause carrier to be repelled from the surface of the solar cell. By creating a barrier at the surface of the solar cell, undesired recombination at the surface may be reduced.

摘要翻译： 公开了改善一个或多个电介质层的抗反射特性并减少太阳能电池的所生成的载流子的表面复合的方法。 在一些实施方案中，将掺杂剂引入电介质层以改善其抗反射性能。 在其它实施例中，物质被引入到电介质层中以形成电场，其排斥少数载流子远离表面并朝向接触。 在另一个实施方案中，将移动体物质引入到抗反射涂层中，这导致载体从太阳能电池的表面排斥。 通过在太阳能电池的表面产生阻挡层，可以减少表面处的不期望的复合。

公开(公告)号：US07112540B2

公开(公告)日：2006-09-26

申请号：US10766491

申请日：2004-01-28

申请人： Richard L. Guldi ,  Deepak Ramappa

发明人： Richard L. Guldi ,  Deepak Ramappa

IPC分类号： H01L21/31 ,  H01L23/52

CPC分类号： H01L21/76843 ,  H01L21/76856 ,  H01L21/76873

摘要： The present invention provides an electroplating process and a method for manufacturing an integrated circuit. The electroplating process includes, among other steps, placing a substrate 290 in an enclosure 200 being substantially devoid of unwanted contaminants and forming a material layer 310 over the substrate 290 within the enclosure 200, the enclosure 200 still being substantially devoid of the unwanted contaminants. The electroplating process further includes forming a thin layer of oxide 410 over the material layer 310 within the enclosure 200, the enclosure 200 still being substantially devoid of the unwanted contaminants during the forming the thin layer of oxide 410.

摘要翻译： 本发明提供一种电镀工艺和一种用于制造集成电路的方法。 除了其他步骤之外，电镀工艺还包括将衬底290放置在外壳200中，基本上没有不想要的污染物，并且在外壳200内的衬底290上形成材料层310，外壳200基本上没有不想要的污染物。 电镀工艺还包括在外壳200内的材料层310上形成薄层的氧化物410，在形成薄层氧化物410期间，外壳200基本上没有不想要的污染物。

公开(公告)号：US20050274805A1

公开(公告)日：2005-12-15

申请号：US10853867

申请日：2004-05-26

申请人： Deepak Ramappa

发明人： Deepak Ramappa

IPC分类号： G06K7/10 ,  H01L21/44 ,  H01L21/66

CPC分类号： H01L22/20 ,  Y10S438/935

摘要： The present invention defines a system (100) for detecting copper contamination within a semiconductor manufacturing process. According to the present invention, a semiconductor wafer (102) is transferred (108) from a semiconductor manufacturing component (104), which may have exposed the wafer to copper contamination, to a measurement system (106). The measurement system measures an electrical value at a plurality of locations along a surface of the wafer, prior to and after exposure of the surface to an activation system (112). The activation system is provided to cause any copper contamination along the surface to form a precipitate thereon. An analysis component (110) is provided to receive electrical value and location information from the measurement system and to identify, from the measurements, the presence and location of copper contamination along the semiconductor wafer surface.

摘要翻译： 本发明限定了用于在半导体制造过程中检测铜污染的系统（100）。 根据本发明，将半导体制造部件（104）从半导体制造部件（104）转移（108），半导体制造部件（104）可能将晶片暴露于铜污染物到测量系统（106）。 测量系统在将表面暴露于激活系统（112）之前和之后，测量沿着晶片表面的多个位置处的电气值。 提供激活系统以使沿着表面的任何铜污染物在其上形成沉淀物。 提供分析组件（110）以从测量系统接收电值和位置信息，并从测量中识别沿着半导体晶片表面的铜污染的存在和位置。

公开(公告)号：US20050037525A1

公开(公告)日：2005-02-17

申请号：US10946558

申请日：2004-09-21

申请人： Deepak Ramappa

发明人： Deepak Ramappa

IPC分类号： G01N23/06 ,  H01L21/66

CPC分类号： G01N23/06

摘要： The present invention provides a system and method for evaluating gate oxide integrity in a semiconductor wafer. The system may include: a semiconductor wafer; a layer of gate oxide on the semiconductor wafer; a layer of polysilicon on the gate oxide; an electron beam microscope with adjustable energy levels, wherein the electron beam is directed at the semiconductor wafer; an electron beam inspection tool used to detect passive voltage contrasts within the gate oxide layer. The system may also include a measuring tool for measuring an electrical current level of the semiconductor substrate. The system may also include an electrical ground connected to the semiconductor wafer. The system may also include the energy levels vary from about 600 eV to 5000 eV.

公开(公告)号：US08658513B2

公开(公告)日：2014-02-25

申请号：US13098942

申请日：2011-05-02

申请人： Fareen Adeni Khaja ,  Deepak Ramappa ,  San Yu ,  Chi-Chun Chen

发明人： Fareen Adeni Khaja ,  Deepak Ramappa ,  San Yu ,  Chi-Chun Chen

IPC分类号： H01L21/76

CPC分类号： H01L21/2654 ,  H01L21/26586 ,  H01L21/26593 ,  H01L21/266 ,  H01L27/156 ,  H01L33/0095 ,  H01L33/38

摘要： An improved method of creating LED arrays is disclosed. A p-type layer, multi-quantum well and n-type layer are disposed on a substrate. The device is then etched to expose portions of the n-type layer. To create the necessary electrical isolation between adjacent LEDs, an ion implantation is performed to create a non-conductive implanted region. In some embodiments, an implanted region extends through the p-type layer, MQW and n-type layer. In another embodiment, a first implanted region is created in the n-type layer. In addition, a second implanted region is created in the p-type layer and multi-quantum well immediately adjacent to etched n-type layer. In some embodiments, the ion implantation is done perpendicular to the substrate. In other embodiments, the implant is performed at an angle.

摘要翻译： 公开了一种改进的LED阵列的制造方法。 p型层，多量子阱和n型层设置在基板上。 然后将器件蚀刻以暴露n型层的部分。 为了在相邻LED之间创建必要的电隔离，执行离子注入以产生非导电注入区域。 在一些实施例中，注入区域延伸穿过p型层，MQW和n型层。 在另一个实施例中，在n型层中形成第一注入区。 此外，在p型层和紧邻蚀刻的n型层的多量子阱中产生第二注入区。 在一些实施例中，垂直于衬底完成离子注入。 在其他实施例中，以一定角度执行植入物。

公开(公告)号：US08465909B2

公开(公告)日：2013-06-18

申请号：US12916993

申请日：2010-11-01

申请人： Nicholas P. T. Bateman ,  Helen L. Maynard ,  Benjamin B. Riordon ,  Christopher R. Hatem ,  Deepak Ramappa

发明人： Nicholas P. T. Bateman ,  Helen L. Maynard ,  Benjamin B. Riordon ,  Christopher R. Hatem ,  Deepak Ramappa

IPC分类号： G03F7/20

CPC分类号： H01L31/0682 ,  H01L21/266 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

摘要： Various methods of utilizing the physical and chemical property differences between amorphized and crystalline silicon are used to create masks that can be used for subsequent implants. In some embodiments, the difference in film growth between amorphous and crystalline silicon is used to create the mask. In other embodiments, the difference in reflectivity or light absorption between amorphous and crystalline silicon is used to create the mask. In other embodiments, differences in the characteristics of doped and undoped silicon is used to create masks.

摘要翻译： 使用利用非晶化和晶体硅之间的物理和化学性质差异的各种方法来产生可用于后续植入物的掩模。 在一些实施方案中，使用无定形和晶体硅之间的膜生长差异来产生掩模。 在其他实施例中，使用非晶硅和晶体硅之间的反射率或光吸收的差异来产生掩模。 在其他实施例中，掺杂和未掺杂硅的特性的差异被用于产生掩模。

公开(公告)号：US08148237B2

公开(公告)日：2012-04-03

申请号：US12851168

申请日：2010-08-05

申请人： Deepak Ramappa ,  Julian G. Blake

发明人： Deepak Ramappa ,  Julian G. Blake

IPC分类号： H01L21/46

CPC分类号： H01L21/76254 ,  Y10S438/977

摘要： A method of cleaving a substrate is disclosed. A species, such as hydrogen or helium, is implanted into a substrate to form a layer of microbubbles. The substrate is then annealed a pressure greater than atmosphere. This annealing may be performed in the presence of the species that was implanted. This diffuses the species into the substrate. The substrate is then cleaved along the layer of microbubbles. Other steps to form an oxide layer or to bond to a handle also may be included.

摘要翻译： 公开了一种切割基板的方法。 将诸如氢或氦的物质植入衬底中以形成微泡层。 然后将衬底退火，压力大于大气压。 该退火可以在植入物种的存在下进行。 这将物种扩散到基质中。 然后沿着微泡层切割底物。 可以包括形成氧化物层或结合到手柄的其它步骤。

公开(公告)号：US20120074117A1

公开(公告)日：2012-03-29

申请号：US13238687

申请日：2011-09-21

申请人： Deepak Ramappa ,  Paul Sullivan

发明人： Deepak Ramappa ,  Paul Sullivan

IPC分类号： B23K26/00

CPC分类号： H01L21/02675 ,  B23K26/0006 ,  B23K26/0608 ,  B23K26/0619 ,  B23K26/354 ,  B23K2103/56 ,  H01L21/268

摘要： Improved methods of annealing a workpiece are disclosed. Lasers are used to both increase the temperature of the workpiece, and to laser melt anneal the workpiece. By utilizing lasers for both operations, the manufacturing complexity is reduced. Furthermore, laser melt anneal may provide better junctions and more well defined junction depths. By heating the workpiece either immediately before or after the laser melt anneal, the quality of the junction may be improved. Shallow annealing may be accomplished and annealing may occur in the presence of a species to form a passivation layer. If the workpiece is a solar cell, in-situ heating may improve open circuit voltage (Voc) or dark currents. Insitu heating of the substrate lowers the melting threshold of the substrate and also increases light absorption in the substrate. This reduces the power of the melt laser and hence reduces the residual damage.

摘要翻译： 公开了改进工件退火的方法。 激光器既用于增加工件的温度，又可以激光熔融退火工件。 通过利用两种操作的激光器，制造复杂度降低。 此外，激光熔融退火可以提供更好的结和更明确的结深度。 通过在激光熔融退火之前或之后加热工件，可以提高结的质量。 可以实现浅退火，并且在物质存在下进行退火以形成钝化层。 如果工件是太阳能电池，原位加热可以提高开路电压（Voc）或暗电流。 衬底的本体加热降低了衬底的熔化阈值，并且还增加了衬底中的光吸收。 这降低了熔体激光器的功率，从而减少了残余损伤。

公开(公告)号：US20100112788A1

公开(公告)日：2010-05-06

申请号：US12603774

申请日：2009-10-22

申请人： Deepak Ramappa

发明人： Deepak Ramappa

IPC分类号： H01L21/302 ,  H01L21/3205

CPC分类号： H01L21/26506 ,  H01L21/26513 ,  H01L21/26566 ,  H01L21/324 ,  H01L29/665

摘要： A method of implantation that minimizes surface damage to a workpiece is disclosed. In one embodiment, following a doping implant, a second implant is performed which causes the silicon at the surface of the workpiece to become amorphous. This reduces surface damage and interstitials, which has several benefits. First, inactive dopant clusters may become activated due to the replenishment of silicon. Secondly, the amorphous nature of the silicon makes it bond more easily in subsequent process steps, such as silicidation.

摘要翻译： 公开了一种最小化对工件的表面损伤的植入方法。 在一个实施例中，在掺杂注入之后，执行第二注入，其使得在工件的表面处的硅变得无定形。 这样可以减少表面损伤和间隙，这有几个好处。 首先，由于硅的补充，非活性掺杂剂簇可能被激活。 其次，硅的无定形性使其在随后的工艺步骤（例如硅化）中更容易粘合。