公开(公告)号：US20200098870A1

公开(公告)日：2020-03-26

申请号：US16539319

申请日：2019-08-13

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Maria Cristina ESTACIO ,  Jerome TEYSSEYRE ,  Elsie Agdon CABAHUG

IPC: H01L29/16 ,  H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L23/367 ,  H01L23/495

Abstract: A semiconductor package is disclosed. Specific implementations of a semiconductor package may include: one or more semiconductor die coupled between a baseframe and a clip, the baseframe including a gate pad of the baseframe coupled with a gate pad of the one or more semiconductor die, and a source pad of the baseframe coupled with a source pad of the one or more semiconductor die, where the gate pad of the baseframe extends beyond a perimeter of the one or more semiconductor die.

公开(公告)号：US20240429136A1

公开(公告)日：2024-12-26

申请号：US18829030

申请日：2024-09-09

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Maria Clemens Ypil QUINONES ,  Bigildis DOSDOS ,  Jerome TEYSSEYRE ,  Erwin Ian Vamenta ALMAGRO ,  Romel N. MANATAD

IPC: H01L23/495 ,  H01L21/48 ,  H01L23/00 ,  H01L23/31 ,  H01L23/482 ,  H01L23/544

Abstract: A semiconductor device package may include a leadframe having a first portion with first extended portions and a second portion with second extended portions. Mold material may encapsulate a portion of the leadframe and a portion of a semiconductor die mounted to the leadframe. A first set of contacts of the semiconductor die may be connected to a first surface of the first extended portions, while a second set of contacts may be connected to a first surface of the second extended portions. A mold-locking cavity having the mold material included therein may be disposed in contact with a second surface of the first extended portions opposed to the first surface of the first extended portions, a second surface of the second extended portions opposed to the first surface of the second extended portions, the first portion of the leadframe, and the second portion of the leadframe.

公开(公告)号：US20240304529A1

公开(公告)日：2024-09-12

申请号：US18181950

申请日：2023-03-10

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Jie CHANG ,  XiaoYing YUAN ,  Keunhyuk LEE ,  Jerome TEYSSEYRE ,  Leo GU

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/31 ,  H01L25/00 ,  H01L25/07

CPC classification number: H01L23/49575 ,  H01L21/56 ,  H01L23/3107 ,  H01L23/49503 ,  H01L25/072 ,  H01L25/50 ,  H01L23/49562

Abstract: Implementations of high-power semiconductor device modules are described, including automotive power transistor assemblies for use in power amplifier circuits such as a cascode circuit. In some implementations, power amplifier circuit components are provided on separate semiconductor die attached to discrete dual die attach pads. A separation between the die attach pads, as well as a through-hole, provide sufficient isolation between the die to permit operation of the circuit at high voltages without relying on a thick multi-layer direct bond copper (DBC) isolation structure. In some implementations, higher voltage operation can be supported by a thin multi-layer, resin coated copper DAP in which the top layer is split.

公开(公告)号：US20240194631A1

公开(公告)日：2024-06-13

申请号：US18444180

申请日：2024-02-16

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Keunhyuk LEE ,  Jerome TEYSSEYRE ,  Tiburcio A. MALDO

IPC: H01L23/00

CPC classification number: H01L24/72 ,  H01L24/90

Abstract: A clip preform includes a die contact portion and an aligner structure. An intermediate portion connects the die contact portion to a lead contact portion in the aligner structure. The die contact portion is configured to contact a semiconductor die. The aligner structure is configured to attach the lead contact portion to a lead post. The die contact portion, the intermediate portion, and the aligner structure form a structure of a primary clip for connecting the semiconductor die to the lead post. The clip preform is severable by removing parts of the die contact portion and the intermediate portion of the clip preform to form a secondary clip for connecting the semiconductor die to the lead post. The aligner structure, a remaining part of the die contact portion, and a remaining part of the intermediate portion of the clip preform form a structure of the secondary clip.

公开(公告)号：US20240071860A1

公开(公告)日：2024-02-29

申请号：US18502162

申请日：2023-11-06

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Yusheng LIN ,  Jerome TEYSSEYRE

IPC: H01L23/373 ,  H01L21/52 ,  H01L23/00 ,  H01L23/31 ,  H01L23/433 ,  H01L23/498 ,  H01L25/00 ,  H01L25/065 ,  H01L25/07

CPC classification number: H01L23/3735 ,  H01L21/52 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/4334 ,  H01L23/49822 ,  H01L24/20 ,  H01L25/0657 ,  H01L25/072 ,  H01L25/50 ,  H01L29/861

Abstract: In a general aspect, a package includes a semiconductor die disposed between a first high voltage isolation carrier and a second high voltage isolation carrier. The semiconductor die is thermally coupled to the first high voltage isolation carrier. The package also includes a molding material disposed in a space between the semiconductor die and the first high voltage isolation carrier, and a conductive spacer disposed between the semiconductor die and the second high voltage isolation carrier. The conductive spacer is thermally coupled to semiconductor die and to the second high voltage isolation carrier. A longitudinal dimension of the conductive spacer is greater than a longitudinal dimension of the semiconductor die. The molding material encapsulates the semiconductor die and the conductive spacer.

公开(公告)号：US20230019930A1

公开(公告)日：2023-01-19

申请号：US17806961

申请日：2022-06-15

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Inpil YOO ,  Jerome TEYSSEYRE ,  Oseob JEON ,  Keunhyuk LEE ,  Michael J. SEDDON

IPC: H01L23/44 ,  H05K7/20

Abstract: Implementations of a semiconductor package may include one or more power semiconductor die included in a die module; a first heat sink directly coupled to one or more source pads of the die module; a second heat sink directly coupled to one or more drain pads of the die module; a gate contact coupled with one or more gate pads of the die module; and a coating coupled directly to the die module. The gate contact may be configured to extend through an immersion cooling enclosure.

公开(公告)号：US20220406744A1

公开(公告)日：2022-12-22

申请号：US17664749

申请日：2022-05-24

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Jooyang EOM ,  Seungwon IM ,  Maria Cristina ESTACIO ,  Jerome TEYSSEYRE ,  Inpil YOO

IPC: H01L23/00 ,  H01L23/373

Abstract: Implementations of semiconductor devices may include a die coupled over a lead frame, a redistribution layer (RDL) coupled over the die, a first plurality of vias coupled between the RDL and the die, and a second plurality of vias coupled over and directly to the lead frame. The second plurality of vias may be adjacent to an outer edge of the semiconductor device and may be electrically isolated from the die.

公开(公告)号：US20220157801A1

公开(公告)日：2022-05-19

申请号：US16949896

申请日：2020-11-19

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Jerome TEYSSEYRE ,  Inpil YOO ,  JooYang EOM

IPC: H01L25/00 ,  H01L25/18 ,  H01L25/07 ,  H01L23/467 ,  H01L23/473 ,  H01L23/367

Abstract: According to an aspect, a power module package includes a plurality of power modules including a first power module and a second power module, a plurality of heat sinks including a first heat sink coupled to the first power module and a second heat sink coupled to the second power module, and a module carrier coupled to the plurality of power modules, where the module carrier includes a first region defining a first heat-sink slot and a second region defining a second heat-sink slot. The first heat sink extends at least partially through the first heat-sink slot and the second heat sink extends at least partially through the second heat-sink slot. The power module package includes a housing coupled to the module carrier and a ring member located between the module carrier and the housing.

公开(公告)号：US20210159157A1

公开(公告)日：2021-05-27

申请号：US16695582

申请日：2019-11-26

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Keunhyuk LEE ,  Tiburcio MALDO ,  Jerome TEYSSEYRE ,  ZhengQiao XU ,  Zhiling LIU

IPC: H01L23/498 ,  H01L23/00 ,  H01L21/48 ,  H01L21/56

Abstract: Implementations of semiconductor clips may include a die attach portion coupled to a step portion, a lead attach portion directly coupled to the step portion, a first alignment feature directly coupled to a first side of the lead attach portion, and a second alignment feature directly coupled to a second side of the lead attach portion. The second side may be opposite the first side. The lead attach portion may be in a plane substantially parallel with a plane formed by the die attach portion.

公开(公告)号：US20190287886A1

公开(公告)日：2019-09-19

申请号：US16429366

申请日：2019-06-03

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Jerome TEYSSEYRE ,  Maria Cristina ESTACIO ,  Seungwon IM

IPC: H01L23/495 ,  H01L23/433 ,  H01L23/473 ,  H01L23/00 ,  H01L29/16 ,  H01L21/56 ,  H01L23/373 ,  H01L23/31

Abstract: In a general aspect, a method can include forming a first conductive metal layer including a common gate conductor, and coupling a plurality of semiconductor die to the common gate conductor of the first conductive metal layer where the plurality of semiconductor die include a first silicon carbide die and a second silicon carbide die. The method can include encapsulating at least a portion of the first conductive metal layer and the semiconductor die within an insulator where the first conductive metal layer includes a first conductive path between the common gate conductor and a die gate conductor of the first silicon carbide die, and a second conductive path between the common gate conductor and a die gate conductor of the second silicon carbide die. The first conductive path can have a length substantially equal to a length of the second conductive path.