公开(公告)号：US20080128688A1

公开(公告)日：2008-06-05

申请号：US12016701

申请日：2008-01-18

申请人： Yaoling Pan ,  Francisco Leon ,  David P. Stumbo

发明人： Yaoling Pan ,  Francisco Leon ,  David P. Stumbo

IPC分类号： H01L51/05

CPC分类号： H01L51/0545 ,  B82Y10/00 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/78681 ,  H01L29/7869 ,  H01L29/78696 ,  H01L51/0035 ,  H01L51/0037 ,  H01L51/0048 ,  H01L51/0049 ,  H01L51/0541 ,  H01L51/0566 ,  H01L51/4253 ,  H01L51/4266 ,  Y02E10/549 ,  Y02P70/521 ,  Y10S977/762 ,  Y10S977/763 ,  Y10S977/764

摘要： The present invention is directed to thin film transistors using nanowires (or other nanostructures such as nanoribbons, nanotubes and the like) incorporated in and/or disposed proximal to conductive polymer layer(s), and production scalable methods to produce such transistors. In particular, a composite material comprising a conductive polymeric material such as polyaniline (PANI) or polypyrrole (PPY) and one or more nanowires incorporated therein is disclosed. Several nanowire-TFT fabrication methods are also provided which in one exemplary embodiment includes providing a device substrate; depositing a first conductive polymer material layer on the device substrate; defining one or more gate contact regions in the conductive polymer layer; depositing a plurality of nanowires over the conductive polymer layer at a sufficient density of nanowires to achieve an operational current level; depositing a second conductive polymer material layer on the plurality of nanowires; and forming source and drain contact regions in the second conductive polymer material layer to thereby provide electrical connectivity to the plurality of nanowires, whereby the nanowires form a channel having a length between respective ones of the source and drain regions.

摘要翻译： 本发明涉及使用并入和/或设置在导电聚合物层附近的纳米线（或诸如纳米带，纳米管等的其它纳米结构）的薄膜晶体管，以及用于生产这种晶体管的生产可扩展方法。 特别地，公开了包含导电聚合材料如聚苯胺（PANI）或聚吡咯（PPY）和一个或多个纳米线的复合材料，其中并入其中。 还提供了几种纳米线TFT制造方法，其在一个示例性实施例中包括提供器件衬底; 在器件衬底上沉积第一导电聚合物材料层; 限定所述导电聚合物层中的一个或多个栅极接触区域; 在所述导电聚合物层上以足够的纳米线密度沉积多个纳米线以实现工作电流水平; 在所述多个纳米线上沉积第二导电聚合物材料层; 以及在所述第二导电聚合物材料层中形成源极和漏极接触区域，从而提供与所述多个纳米线的电连接性，由此所述纳米线形成在所述源极和漏极区域中的相应长度之间具有长度的沟道。

公开(公告)号：US07345307B2

公开(公告)日：2008-03-18

申请号：US11233503

申请日：2005-09-22

申请人： Yaoling Pan ,  Francisco Leon ,  David P. Stumbo

发明人： Yaoling Pan ,  Francisco Leon ,  David P. Stumbo

IPC分类号： H01L29/10

CPC分类号： H01L51/0545 ,  B82Y10/00 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/78681 ,  H01L29/7869 ,  H01L29/78696 ,  H01L51/0035 ,  H01L51/0037 ,  H01L51/0048 ,  H01L51/0049 ,  H01L51/0541 ,  H01L51/0566 ,  H01L51/4253 ,  H01L51/4266 ,  Y02E10/549 ,  Y02P70/521 ,  Y10S977/762 ,  Y10S977/763 ,  Y10S977/764

摘要： The present invention is directed to thin film transistors using nanowires (or other nanostructures such as nanoribbons, nanotubes and the like) incorporated in and/or disposed proximal to conductive polymer layer(s), and production scalable methods to produce such transistors. In particular, a composite material comprising a conductive polymeric material such as polyaniline (PANI) or polypyrrole (PPY) and one or more nanowires incorporated therein is disclosed. Several nanowire-TFT fabrication methods are also provided which in one exemplary embodiment includes providing a device substrate; depositing a first conductive polymer material layer on the device substrate; defining one or more gate contact regions in the conductive polymer layer; depositing a plurality of nanowires over the conductive polymer layer at a sufficient density of nanowires to achieve an operational current level; depositing a second conductive polymer material layer on the plurality of nanowires; and forming source and drain contact regions in the second conductive polymer material layer to thereby provide electrical connectivity to the plurality of nanowires, whereby the nanowires form a channel having a length between respective ones of the source and drain regions.

摘要翻译： 本发明涉及使用并入和/或设置在导电聚合物层附近的纳米线（或诸如纳米带，纳米管等的其它纳米结构）的薄膜晶体管，以及用于生产这种晶体管的生产可扩展方法。 特别地，公开了包含导电聚合材料如聚苯胺（PANI）或聚吡咯（PPY）和一个或多个纳米线的复合材料，其中并入其中。 还提供了几种纳米线TFT制造方法，其在一个示例性实施例中包括提供器件衬底; 在器件衬底上沉积第一导电聚合物材料层; 限定所述导电聚合物层中的一个或多个栅极接触区域; 在所述导电聚合物层上以足够的纳米线密度沉积多个纳米线以实现工作电流水平; 在所述多个纳米线上沉积第二导电聚合物材料层; 以及在所述第二导电聚合物材料层中形成源极和漏极接触区域，从而提供与所述多个纳米线的电连接性，由此所述纳米线形成在所述源极和漏极区域中的相应长度之间具有长度的沟道。

公开(公告)号：US07667296B2

公开(公告)日：2010-02-23

申请号：US11525121

申请日：2006-09-22

申请人： David Stumbo ,  Jian Chen ,  David Heald ,  Yaoling Pan

发明人： David Stumbo ,  Jian Chen ,  David Heald ,  Yaoling Pan

IPC分类号： H01L29/93

CPC分类号： B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/93 ,  Y10S977/762

摘要： A nanowire capacitor and methods of making the same are disclosed. The nanowire capacitor includes a subrate and a semiconductor nanowire that is supported by the substrate. An insulator is formed on a portion of the surface of the nanowire. Additionally, an outer coaxial conductor is formed on a portion insulator and a contact coupled to the nanowire.

摘要翻译： 公开了一种纳米线电容器及其制造方法。 纳米线电容器包括由衬底和由衬底支撑的半导体纳米线。 绝缘体形成在纳米线表面的一部分上。 此外，外部同轴导体形成在部分绝缘体上和与纳米线耦合的触点。

公开(公告)号：US20050212079A1

公开(公告)日：2005-09-29

申请号：US10806361

申请日：2004-03-23

申请人： David Stumbo ,  Jian Chen ,  David Heald ,  Yaoling Pan

发明人： David Stumbo ,  Jian Chen ,  David Heald ,  Yaoling Pan

IPC分类号： H01L29/06 ,  H01L29/93

CPC分类号： B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/93 ,  Y10S977/762

摘要： A nanowire varactor diode and methods of making the same are disclosed. The structure comprises a coaxial capacitor running the length of the semiconductor nanowire. In one embodiment, a semiconductor nanowire of a first conductivity type is deposited on a substrate. An insulator is formed on at least a portion of the nanowire's surface. A region of the nanowire is doped with a second conductivity type material. A first electrical contact is formed on at least part of the insulator and the doped region. A second electrical contact is formed on a non-doped potion of the nanowire. During operation, the conductivity type at the surface of the nanowire inverts and a depletion region is formed upon application of a voltage to the first and second electrical contacts. The varactor diode thereby exhibits variable capacitance as a function of the applied voltage.

摘要翻译： 公开了一种纳米线变容二极管及其制造方法。 该结构包括运行半导体纳米线长度的同轴电容器。 在一个实施例中，第一导电类型的半导体纳米线沉积在衬底上。 在纳米线表面的至少一部分上形成绝缘体。 纳米线的区域掺杂有第二导电类型的材料。 在绝缘体和掺杂区域的至少一部分上形成第一电接触。 在纳米线的非掺杂药液上形成第二电接触。 在操作期间，纳米线表面的导电类型反转，并且在向第一和第二电触点施加电压时形成耗尽区。 因此，变容二极管作为施加电压的函数呈现可变电容。

公开(公告)号：US20050064185A1

公开(公告)日：2005-03-24

申请号：US10910800

申请日：2004-08-04

申请人： Mihai Buretea ,  Jian Chen ,  Calvin Chow ,  Chunming Niu ,  Yaoling Pan ,  J. Parce ,  Linda Romano ,  David Stumbo

发明人： Mihai Buretea ,  Jian Chen ,  Calvin Chow ,  Chunming Niu ,  Yaoling Pan ,  J. Parce ,  Linda Romano ,  David Stumbo

IPC分类号： D02G3/00 ,  H01L21/336 ,  H01L21/44 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L33/06 ,  H01L33/24 ,  H01L51/00 ,  H01L51/05

CPC分类号： H01L29/0665 ,  B82Y10/00 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78681 ,  H01L29/78696 ,  H01L33/06 ,  H01L33/24 ,  H01L51/0048 ,  H01L51/0545 ,  H01L2924/0002 ,  Y10T428/2913 ,  H01L2924/00

摘要： The present invention relates to a system and process for producing a nanowire-material composite. A substrate having nanowires attached to a portion of at least one surface is provided. A material is deposited over the portion to form the nanowire-material composite. The process further optionally comprises separating the nanowire-material composite from the substrate to form a freestanding nanowire-material composite. The freestanding nanowire material composite is optionally further processed into a electronic substrate. A variety of electronic substrates can be produced using the methods described herein. For example, a multi-color light-emitting diode can be produced from multiple, stacked layers of nanowire-material composites, each composite layer emitting light at a different wavelength.

摘要翻译： 本发明涉及纳米线材料复合体的制造方法和制造方法。 提供了具有连接到至少一个表面的一部分的纳米线的衬底。 在该部分上沉积材料以形成纳米线材料复合材料。 该方法进一步任选地包括从衬底分离纳米线材料复合物以形成独立的纳米线材料复合材料。 独立的纳米线材料复合材料任选进一步加工成电子基片。 可以使用本文所述的方法来生产各种电子基板。 例如，多个发光二极管可以由多个层叠的纳米线材料复合体制成，每个复合层发射不同波长的光。

公开(公告)号：US20070238314A1

公开(公告)日：2007-10-11

申请号：US11225951

申请日：2005-09-14

申请人： Mihai Buretea ,  Jian Chen ,  Calvin Chow ,  Chunming Niu ,  Yaoling Pan ,  J. Parce ,  Linda Romano ,  David Stumbo

发明人： Mihai Buretea ,  Jian Chen ,  Calvin Chow ,  Chunming Niu ,  Yaoling Pan ,  J. Parce ,  Linda Romano ,  David Stumbo

IPC分类号： H01L21/31

CPC分类号： H01L29/0665 ,  B82Y10/00 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/42384 ,  H01L29/66742 ,  H01L29/78681 ,  H01L29/78696 ,  H01L33/06 ,  H01L33/24 ,  H01L51/0048 ,  H01L51/0545 ,  H01L2924/0002 ,  Y10T428/2913 ,  H01L2924/00

摘要： The present invention relates to a system and process for producing a nanowire-material composite. A substrate having nanowires attached to a portion of at least one surface is provided. A material is deposited over the portion to form the nanowire-material composite. The process further optionally comprises separating the nanowire-material composite from the substrate to form a freestanding nanowire-material composite. The freestanding nanowire material composite is optionally further processed into a electronic substrate. A variety of electronic substrates can be produced using the methods described herein. For example, a multi-color light-emitting diode can be produced from multiple, stacked layers of nanowire-material composites, each composite layer emitting light at a different wavelength.

摘要翻译： 本发明涉及纳米线材料复合体的制造方法和制造方法。 提供了具有连接到至少一个表面的一部分的纳米线的衬底。 在该部分上沉积材料以形成纳米线材料复合材料。 该方法进一步任选地包括从衬底分离纳米线材料复合物以形成独立的纳米线材料复合材料。 独立的纳米线材料复合材料任选进一步加工成电子基片。 可以使用本文所述的方法来生产各种电子基板。 例如，多个发光二极管可以由多个层叠的纳米线材料复合体制成，每个复合层发射不同波长的光。

公开(公告)号：US07115971B2

公开(公告)日：2006-10-03

申请号：US10806361

申请日：2004-03-23

申请人： David Stumbo ,  Jian Chen ,  David Heald ,  Yaoling Pan

发明人： David Stumbo ,  Jian Chen ,  David Heald ,  Yaoling Pan

IPC分类号： H01L29/93

CPC分类号： B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/93 ,  Y10S977/762

摘要： A nanowire varactor diode and methods of making the same are disclosed. The structure comprises a coaxial capacitor running the length of the semiconductor nanowire. In one embodiment, a semiconductor nanowire of a first conductivity type is deposited on a substrate. An insulator is formed on at least a portion of the nanowire's surface. A region of the nanowire is doped with a second conductivity type material. A first electrical contact is formed on at least part of the insulator and the doped region. A second electrical contact is formed on a non-doped potion of the nanowire. During operation, the conductivity type at the surface of the nanowire inverts and a depletion region is formed upon application of a voltage to the first and second electrical contacts. The varactor diode thereby exhibits variable capacitance as a function of the applied voltage.

摘要翻译： 公开了一种纳米线变容二极管及其制造方法。 该结构包括运行半导体纳米线长度的同轴电容器。 在一个实施例中，第一导电类型的半导体纳米线沉积在衬底上。 在纳米线表面的至少一部分上形成绝缘体。 纳米线的区域掺杂有第二导电类型的材料。 在绝缘体和掺杂区域的至少一部分上形成第一电接触。 在纳米线的非掺杂药液上形成第二电接触。 在操作期间，纳米线表面的导电类型反转，并且在向第一和第二电触点施加电压时形成耗尽区。 因此，变容二极管作为施加电压的函数呈现可变电容。

公开(公告)号：US20070012985A1

公开(公告)日：2007-01-18

申请号：US11525121

申请日：2006-09-22

申请人： David Stumbo ,  Jian Chen ,  David Heald ,  Yaoling Pan

发明人： David Stumbo ,  Jian Chen ,  David Heald ,  Yaoling Pan

IPC分类号： H01L27/108

CPC分类号： B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/068 ,  H01L29/93 ,  Y10S977/762

摘要： A nanowire capacitor and methods of making the same are disclosed. The nanowire capacitor includes a substrate and a semiconductor nanowire that is supported by the substrate. An insulator is formed on a portion of the surface of the nanowire. Additionally, an outer coaxial conductor is formed on a portion of the insulator and a contact coupled to the nanowire.

摘要翻译： 公开了一种纳米线电容器及其制造方法。 纳米线电容器包括由衬底支撑的衬底和半导体纳米线。 绝缘体形成在纳米线表面的一部分上。 此外，在绝缘体的一部分上形成一个外部同轴导体和一个与纳米线相连的触点。

公开(公告)号：US20080041814A1

公开(公告)日：2008-02-21

申请号：US11839778

申请日：2007-08-16

申请人： Linda Romano ,  Jian Chen ,  Xiangfeng Duan ,  Robert Dubrow ,  Stephen Empedocles ,  Jay Goldman ,  James Hamilton ,  David Heald ,  Francesco Lemmi ,  Chunming Niu ,  Yaoling Pan ,  George Pontis ,  Vijendra Sahi ,  Erik Scher ,  David Stumbo ,  Jeffery Whiteford

发明人： Linda Romano ,  Jian Chen ,  Xiangfeng Duan ,  Robert Dubrow ,  Stephen Empedocles ,  Jay Goldman ,  James Hamilton ,  David Heald ,  Francesco Lemmi ,  Chunming Niu ,  Yaoling Pan ,  George Pontis ,  Vijendra Sahi ,  Erik Scher ,  David Stumbo ,  Jeffery Whiteford

IPC分类号： B32B9/00 ,  H01B13/00

CPC分类号： C30B29/605 ,  B82Y10/00 ,  C30B11/12 ,  H01L21/02439 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/02532 ,  H01L21/02603 ,  H01L21/02606 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/02653 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/125 ,  H01L29/66469 ,  H01L29/775 ,  H01L29/78684 ,  H01L29/7869 ,  H01L29/78696 ,  H01L51/0048 ,  Y10S977/762 ,  Y10S977/938 ,  Y10T428/139 ,  Y10T428/2902 ,  Y10T428/2949

摘要： The present invention is directed to methods to harvest, integrate and exploit nanomaterials, and particularly elongated nanowire materials. The invention provides methods for harvesting nanowires that include selectively etching a sacrificial layer placed on a nanowire growth substrate to remove nanowires. The invention also provides methods for integrating nanowires into electronic devices that include placing an outer surface of a cylinder in contact with a fluid suspension of nanowires and rolling the nanowire coated cylinder to deposit nanowires onto a surface. Methods are also provided to deposit nanowires using an ink-jet printer or an aperture to align nanowires. Additional aspects of the invention provide methods for preventing gate shorts in nanowire based transistors. Additional methods for harvesting and integrating nanowires are provided.

摘要翻译： 本发明涉及收获，整合和利用纳米材料，特别是细长的纳米线材料的方法。 本发明提供了收获纳米线的方法，其包括选择性地蚀刻放置在纳米线生长衬底上以去除纳米线的牺牲层。 本发明还提供了将纳米线整合到电子器件中的方法，包括将圆筒的外表面与纳米线的流体悬浮液接触并滚动纳米线涂覆的圆筒以将纳米线沉积到表面上。 还提供了使用喷墨打印机或孔径以纳米线排列纳米线的方法。 本发明的另外的方面提供了用于防止基于纳米线的晶体管中的栅极短路的方法。 提供了收获和集成纳米线的其他方法。

公开(公告)号：US20060008942A1

公开(公告)日：2006-01-12

申请号：US11117707

申请日：2005-04-29

申请人： Linda Romano ,  Jian Chen ,  Xiangfeng Duan ,  Robert Dubrow ,  Stephen Empedocles ,  Jay Goldman ,  James Hamilton ,  David Heald ,  Francesco Lemmi ,  Chunming Niu ,  Yaoling Pan ,  George Pontis ,  Vijendra Sahi ,  Erik Scher ,  David Stumbo ,  Jeffery Whiteford

发明人： Linda Romano ,  Jian Chen ,  Xiangfeng Duan ,  Robert Dubrow ,  Stephen Empedocles ,  Jay Goldman ,  James Hamilton ,  David Heald ,  Francesco Lemmi ,  Chunming Niu ,  Yaoling Pan ,  George Pontis ,  Vijendra Sahi ,  Erik Scher ,  David Stumbo ,  Jeffery Whiteford

IPC分类号： H01L51/40 ,  H01L21/31 ,  H01L21/20 ,  H01L21/336 ,  B29C47/00 ,  D01F9/12 ,  H01L21/00 ,  D02G3/00

CPC分类号： C30B29/605 ,  B82Y10/00 ,  C30B11/12 ,  H01L21/02439 ,  H01L21/02513 ,  H01L21/02521 ,  H01L21/02532 ,  H01L21/02603 ,  H01L21/02606 ,  H01L21/02639 ,  H01L21/02645 ,  H01L21/02653 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/125 ,  H01L29/66469 ,  H01L29/775 ,  H01L29/78684 ,  H01L29/7869 ,  H01L29/78696 ,  H01L51/0048 ,  Y10S977/762 ,  Y10S977/938 ,  Y10T428/139 ,  Y10T428/2902 ,  Y10T428/2949

摘要： The present invention is directed to methods to harvest, integrate and exploit nanomaterials, and particularly elongated nanowire materials. The invention provides methods for harvesting nanowires that include selectively etching a sacrificial layer placed on a nanowire growth substrate to remove nanowires. The invention also provides methods for integrating nanowires into electronic devices that include placing an outer surface of a cylinder in contact with a fluid suspension of nanowires and rolling the nanowire coated cylinder to deposit nanowires onto a surface. Methods are also provided to deposit nanowires using an ink-jet printer or an aperture to align nanowires. Additional aspects of the invention provide methods for preventing gate shorts in nanowire based transistors. Additional methods for harvesting and integrating nanowires are provided.

摘要翻译： 本发明涉及收获，整合和利用纳米材料，特别是细长的纳米线材料的方法。 本发明提供了收获纳米线的方法，其包括选择性地蚀刻放置在纳米线生长衬底上以去除纳米线的牺牲层。 本发明还提供了将纳米线整合到电子器件中的方法，包括将圆筒的外表面与纳米线的流体悬浮液接触并滚动纳米线涂覆的圆筒以将纳米线沉积到表面上。 还提供了使用喷墨打印机或孔径以纳米线排列纳米线的方法。 本发明的另外的方面提供了用于防止基于纳米线的晶体管中的栅极短路的方法。 提供了收获和集成纳米线的其他方法。