Abstract:
A technique is provided that reduces dullness of a potential provided to a line such as gate line on an active-matrix substrate to enable driving the line at high speed and, at the same time, reduces the size of the picture frame region. On an active-matrix substrate (20a) are provided gate lines (13G) and source lines. On the active-matrix substrate (20a) are further provided: gate drivers (11) each including a plurality of switching elements, at least one of which is located in a pixel region, for supplying a scan signal to a gate line (13G); and lines (15L1) each for supplying a control signal to the associated gate driver (11). A control signal is supplied by a display control circuit (4) located outside the display region to the gate drivers (11) via the lines (15L1). In response to a control signal supplied, each gate driver (11) drives the gate line (13G) to which it is connected.
Abstract:
A method of driving a display device including a display panel that includes a color filter board is provided. The color filter board includes a light blocking section formed in a grid and color sections that are formed in areas surrounded by a pattern of the light blocking section in different colors from area to area. The color sections form display pixels on a combination basis. The display panel includes a light blocking area in at least a section of an edge along an outline of the display panel. The method includes setting the color sections that do not form the display pixels among the color sections adjacent to the light blocking area in a plan view of the display panel constantly in the black state.
Abstract:
The present invention addresses the problem of reducing power consumption when switching a gate line between a selected state and a non-selected state, and of providing a narrower frame for an active matrix substrate. A gate driver (11) that scans each gate line is formed inside a display area in an active matrix substrate (20a) having gate lines (13G) and data lines formed therein. The gate driver (11) switches the gate line to either a selected state or a non-selected state, in accordance with a control signal supplied via a line (15L). The gate driver (11) includes a high-charge drive circuit (11a), a low-charge drive circuit (11b), and a shift register (11c). The high-charge drive circuit is supplied with a first DC voltage signal corresponding to the selected state via the line (15L), and charges the gate line to the potential of the first DC voltage signal. The low-charge drive circuit (11b) is supplied with a second DC voltage signal corresponding to the non-selected state, and charges the gate line to the potential of the second DC voltage signal.
Abstract:
A method of manufacturing a display panel substrate having a semiconductor element includes a film forming step of forming a thin film, a resist film forming step of forming a positive resist film on the thin film, a first exposure step of selectively exposing a resist film via a photomask including a pattern of the semiconductor element, a second exposure step of selectively exposing the resist film by scanning and irradiating the resist film with light along an outline shape of the display panel substrate, a developing step of developing the resist film to remove the resist film exposed in the first and second exposure steps and form a resist pattern on the thin film, an etching step of etching the thin film using the resist pattern as a mask, and forming a thin-film pattern by selectively removing the thin film, and a peeling step of peeling the resist pattern.
Abstract:
A liquid crystal display device includes: a first substrate; a second substrate; and a liquid crystal layer of a horizontal orientation type that is sandwiched between the first substrate and the second substrate. The first substrate includes a first electrode pair that applies a first horizontal electric field to the liquid crystal layer, an insulating layer provided on the first electrode pair, and a second electrode pair that is provided on the insulating layer and that applies a second horizontal electric field to the liquid crystal layer. The first electrode pair includes first and second linear electrodes provided with a gap therebetween. The second electrode pair includes third and fourth linear electrodes provided with a gap therebetween. In a plan view of the first substrate, the third and fourth linear electrodes extend in a direction perpendicular with respect to the first and second linear electrodes.
Abstract:
The present invention provides a mirror display which prevents the boundary line between a frame region and a display region from being observed in a mirror mode and which thus has improved design quality. The mirror display of the present invention includes a half mirror plate including a half mirror layer, and a display device disposed behind the half mirror plate, the display device including a display panel and a frame component that supports a peripheral portion of the display panel, and the mirror display including a reflectance adjuster that makes equal the reflectance in a display region where the half mirror layer and the display panel face each other and the reflectance in a frame region where the half mirror layer and the frame component face each other.
Abstract:
The present invention provides a liquid crystal display device that is excellent in production efficiency, achieves a high CR, and significantly improves the viewing angle characteristics (reduces the gamma shift), while suppressing an image blur. The present invention provides a liquid crystal display device at least including: an anisotropic collimating backlight; a lower polarizing plate; a liquid crystal panel; an upper polarizing plate; and an anisotropic diffusion element, the anisotropic collimating backlight having a light distribution anisotropy of a specific angle being combined with the anisotropic diffusion element having a diffusion anisotropy of a specific angle.
Abstract:
A technique is provided that reduces dullness of a potential provided to a line such as gate line on an active-matrix substrate to enable driving the line at high speed and, at the same time, reduces the size of the picture frame region. On an active-matrix substrate (20a) are provided gate lines (13G) and source lines. On the active-matrix substrate (20a) are further provided: gate drivers (11) each including a plurality of switching elements, at least one of which is located in a pixel region, for supplying a scan signal to a gate line (13G); and lines (15L1) each for supplying a control signal to the associated gate driver (11). A control signal is supplied by a display control circuit (4) located outside the display region to the gate drivers (11) via the lines (15L1). In response to a control signal supplied, each gate driver (11) drives the gate line (13G) to which it is connected.
Abstract:
A liquid crystal display device equipped with in-cell touch panel functionality is configured to increase location determining performance by reducing a driving load on sensor electrodes (location determining electrodes). A liquid crystal display device 1 equipped with touch panel functionality includes: drive electrodes 13; detection electrodes 12; drive electrode-specific auxiliary wires 13a; and detection electrode-specific auxiliary wires 12a, the drive electrode-specific auxiliary wires 13a and the detection electrode-specific auxiliary wires 12a being provided so as to overlap domain boundaries 6b.
Abstract:
Provided is a liquid crystal display device having excellent viewing angle characteristics and high contrast in a display mode using both a vertical electric field and a horizontal electric field. This liquid crystal display device is provided with a first substrate and a second substrate disposed facing each other, and a liquid crystal layer held between said first and second substrates. The liquid crystal layer contains liquid crystal molecules having a negative dielectric anisotropy. The first substrate is provided with a flat plate first electrode, a first insulating layer, and a second electrode provided in a layer other than that of the first electrode and provided separated from the first electrode by the first insulating layer. The second electrode has multiple comb-tooth sections and multiple slits, and the second substrate has a flat plate third electrode. Defining V1 as the potential difference between the first electrode and the third electrode, V2 as the potential difference between the first electrode and the second electrode, and V2—B as the potential difference between the first electrode and the second electrode when the lowest gradation is showed, V1, V2 and V2—B satisfy 0