Abstract:
The present invention provides a liquid crystal display device. The device includes a light guide plate, a color filter substrate, an array substrate and a light shading tape. Wherein, a side wall of the concave slot is an incline slope, an edge of the color filter substrate is supported on the incline slope of the concave slot, an edge of a plastic frame is aligned with an edge of the array substrate, and a light shading tape for relatively fixing the color filter substrate and the light guide plate. The present invention can realize a narrow frame and no frame design of the liquid crystal display device. The structure of the display panel is simplified in order to simplify the manufacturing process and reduce the production cost.
Abstract:
An LTPS array substrate includes a plurality of LTPS thin-film transistors and a bottom transparent conductive layer, a protective layer, and a top transparent conductive layer. Each LTPS thin-film transistor includes a substrate, a patternized light shield layer, a buffering layer, a patternized poly-silicon layer, a gate insulation layer, a gate line, and a common electrode line, an insulation layer, a drain and a source, and a planarization layer that are formed to sequentially stack on each other. The light shield layer covers the scan line and the source/drain. A patternized third metal layer is between the bottom transparent conductive layer and the protective layer and includes a first zone and a second zone intersecting the first zone. The first zone shields the source line. A portion of the second zone overlaps a side portion of the light shield layer that is close to the source/drain electrode.
Abstract:
The present invention provides a liquid crystal display panel, which comprises a color film substrate, an array substrate and a liquid crystal layer sandwiched between the color film substrate and the array substrate, said array substrate has a pixel electrode where a surface is disposed with a number of recesses and a number of terraces, said number of recesses and said number of terraces are disposed in evenly intersectional arrangement, said respective recess is located at a position between two interconnected pixels, said respective recess is disposed with a first spacer, said respective terrace is disposed with a second spacer, a height of said first spacer protruded from said terrace is larger than a height of said second spacer protruded from said terrace, said first spacers and said second spacers are extended into the liquid crystal layer, for support of between said color film substrate and said array substrate.
Abstract:
An LTPS pixel unit and a manufacturing method. The method includes following steps: forming a buffering layer on the substrate; forming a semiconductor pattern and a common electrode pattern which are disposed with an interval on the buffering layer; sequentially forming a first insulation layer, a gate electrode pattern and a second insulation layer on the semiconductor pattern; forming a source electrode pattern and a drain electrode pattern on the second insulation layer, wherein, the source electrode pattern and the drain electrode pattern electrically contact with the semiconductor pattern through a first contact hole at the first insulation layer and the second insulation layer; and forming a pixel electrode pattern on the second insulation layer, wherein, the pixel electrode pattern electrically contacts with the source electrode pattern or the drain electrode pattern. Accordingly, the present invention can save the cost and increase process yield.
Abstract:
The present invention proposes a gate driver including a plurality of gate driver on array (GOA) units. Each of the GOA unit includes a main driving circuit, a starting signal output circuit, and a plurality of gate driving circuits. The gate driver utilizes a starting signal and two inversed clock signals to control the charging period and the discharging period of the gate driver. Furthermore, the gate driver utilizes multiple clock signals to control the output of the gate driving signals. In this way, the number of the clock signals is reduced and thus the power consumption is also reduced.
Abstract:
An array substrate and a manufacturing method thereof are provided. The method has steps of: forming a buffer layer, a light-shading layer, and a whole semiconductor layer on a substrate; simultaneously patterning the semiconductor layer and the light-shading layer; and forming a first insulation layer, a first metal layer, a second insulation layer, a second metal layer, a flat layer, and a first transparent conductive layer on the patterned semiconductor layer.
Abstract:
A GOA (Gate driver On Array) for an LCD (Liquid Crystal Display) device is disclosed herein. The LCD device includes a plurality of scanning lines. The GOA circuit includes a plurality of cascaded GOA units. An (n)th level GOA unit correspondingly charges a scanning line. The (n)th level GOA unit includes a pull-down sustain circuit, a pull-up circuit, a bootstrap capacitor circuit, a pull-down circuit, and a clock circuit. The pull-down sustain circuit includes a first TFT (thin film transistor), a second TFT, a third TFT, and a fourth TFT to raise the stability of a gate signal point and to reduce the usage of the TFTs.
Abstract:
The invention provides a thin film transistor (TFT) array substrate and a display panel. The TFT array substrate is disposed with multiple pixels arranged in an array. Each pixel includes first through third sub-pixels sequentially arranged along a first direction. The first through third sub-pixels are connected to a same scan line. The TFT array substrate further is disposed with first through third data lines sequentially arranged along the first direction. The first through third data lines respectively are for driving the first through third sub-pixels. The first sub-pixel includes first and second areas, the second sub-pixel includes third and fourth areas, and the third sub-pixel includes fifth and sixth areas, arranged along a second direction. A voltage difference between a sub-pixel electrode in the sixth area and a common electrode is different from a voltage difference between a sub-pixel electrode in the fifth area and the common electrode.
Abstract:
The present invention discloses a pixel structure, a manufacturing method thereof and a display panel. The method for manufacturing the pixel structure comprises: forming a patterned first metal layer on a substrate; and forming a planarized first insulating layer on the substrate, in which the first insulating layer is configured to fill gaps of the first metal layer and expose the surface of the first metal layer. Thus, the segment difference of the first metal layer can be eliminated, and hence the adverse effects on the manufacturing of subsequent layers due to segment difference can be eliminated. Therefore, the first metal layer thicker than that of the traditional method can be prepared. Consequently, the wiring load of large-size panels can be effectively reduced; the resistance of signal lines can be reduced; the signal delay can be reduced; and the display quality can be improved.
Abstract:
The present disclosure discloses a TFT-LCD display panel based on an HSD structure, including: a sub-pixel unit array; a plurality of pairs of gate lines, with each pair being arranged between two adjacent rows of the sub-pixel units, wherein each gate line includes subsections arranged repeatedly and the subsection is consist of subsection portions with different widths, on the wider subsection portion of which a TFT element connected with a pixel electrode of the sub-pixel unit is placed; a plurality of data lines perpendicular to the gate lines, wherein two or more columns of sub-pixel units are arranged between two adjacent data lines. TFT elements of the present disclosure are placed on the gate lines other than the pixel region, which increases the open rate of the pixel region, and thus improves the penetration rate of the pixels.