Abstract:
A capacitor including a dielectric structure, a lower electrode may be formed on a substrate. The dielectric structure may be formed on the lower electrode, and may include a first thin film, which may improve a morphology of the dielectric structure, and a second thin film, which may have at least one of an EOT larger than that of the first thin film and a dielectric constant higher than that of the first thin film. An upper electrode may be formed on the dielectric structure, and the dielectric structure may have an improved morphology and/or a higher dielectric constant.
Abstract:
Multi-layered structures formed using atomic-layer deposition processes include multiple metal oxide layers wherein the metal oxide layers are formed without the presence of interlayer oxide layers and may include different metal oxide compositions.
Abstract:
An apparatus for depositing a thin film includes a reaction chamber, a reaction gas provider to supply a reaction gas and/or inert gas to the reaction chamber, an oxidant provider to supply a first oxidant and a second oxidant to the reaction chamber, and an air drain to exhaust gas from the apparatus. The oxidant provider is operable to supply the second oxidant to the reaction chamber using the first oxidant as a transfer gas.
Abstract:
The crystallinity of non-monocrystalline silicon necks that connect monocrystalline silicon hemispherical grains to an underlying electrode on an integrated circuit substrate is increased. Preferably, the non-monocrystalline silicon necks are crystallized. By crystallizing the non-monocrystalline silicon necks, the necks may be made more resistant to breaking and detaching during subsequent cleaning processes. The non-monocrystalline silicon necks preferably are crystallized by thermal annealing after fabrication of the hemispherical grain silicon.
Abstract:
A plasma display apparatus comprising a connector is provided. The plasma display apparatus comprises a plasma display panel comprising an electrode of a predetermined width and a connector comprising an electrode line of a width narrower than the predetermined width of the electrode to supply a driving signal to the electrode. A distance between the electrode line and an adjacent electrode line is longer than a distance between the electrode and an adjacent electrode.
Abstract:
Disclosed are methods for fabricating semiconductor devices incorporating a composite trench isolation structure comprising a first oxide pattern, a SOG pattern and a second oxide pattern wherein the oxide patterns enclose the SOG pattern. The methods include the deposition of a first oxide layer and a SOG layer to fill recessed trench regions formed in the substrate. The first oxide layer and the SOG layer are then subjected to a planarization sequence including a CMP process followed by an etchback process to form a composite structure having a substantially flat upper surface that exposes both the oxide and the SOG material. The second oxide layer is then applied and subjected to a similar CMP/etchback sequence to obtain a composite structure having an upper surface that is recessed relative to a plane defined by the surfaces of adjacent active regions.
Abstract:
The present invention is related to a method of method of manufacture of a reflective polarizing film that can improve brightness of a liquid crystal display device remarkably by making a liquid crystal film that can cover visible light by using cholesteric liquid crystal layers having different selective light-reflection central wavelengths, attaching a quarter wave (¼ λ) retardation film on top of the liquid crystal film, and adding prism patterns to the opposite side of the liquid crystal film. The reflective polarizing film of the present invention is characterized by that two or more cholesteric liquid crystal layers having different selective reflection wavelength regions are laminated in order from a shorter wavelength to a longer wavelength, and brightness of a liquid crystal display device is maximized owing to an integrated film manufactured by attaching a ¼ λ retardation film onto cholesteric liquid crystal layers and forming prism patterns onto the opposite side.
Abstract:
A capacitor including a dielectric structure, a lower electrode may be formed on a substrate. The dielectric structure may be formed on the lower electrode, and may include a first thin film, which may improve a morphology of the dielectric structure, and a second thin film, which may have at least one of an EOT larger than that of the first thin film and a dielectric constant higher than that of the first thin film. An upper electrode may be formed on the dielectric structure, and the dielectric structure may have an improved morphology and/or a higher dielectric constant.
Abstract:
A method of manufacturing a semiconductor device can include forming a tunnel oxide layer on a substrate, forming a floating gate on the tunnel oxide layer and forming a dielectric layer pattern on the floating gate using an ALD process. The dielectric layer pattern can include a metal precursor that includes zirconium and an oxidant. A control gate can be formed on the dielectric layer pattern. The semiconductor device can include the dielectric layer pattern provided herein.
Abstract:
The present invention relates to an evaporation source for evaporating an organic electroluminescent layer. In particular, the present invention relates to the evaporation source preventing an aperture, through which a vaporized evaporation material is emitted, from being clogged by restricting heat transfer to outward. The evaporation source according to the present invention includes a cell retaining an evaporation material therein; a cell cap installed on the upper part of the cell and having a cell cap aperture for emitting a vaporized evaporation material; an external wall placed in the outside of the cell to support a heating means set up at the outside of the cell; a cover placed above the cell cap, fixed to the upper end of the external wall, and having a cover aperture corresponding to the cell cap aperture; and a shut-off plate placed between the cover and the cell cap and having a shut-off plate aperture corresponding to the cell cap aperture and the cover aperture in the center of the shut-off plate.