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公开(公告)号：US20230345738A1
公开(公告)日：2023-10-26
申请号：US18335816
申请日：2023-06-15
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Shy-Jay Lin , Chien-Min Lee , Hiroki Noguchi , MingYuan Song , Yen-Lin Huang , William Joseph Gallagher
IPC: H10B61/00 , H01L23/528 , H01L21/768 , H01L21/8234
CPC classification number: H10B61/22 , H01L23/528 , H01L21/76898 , H01L21/823475
Abstract: A device includes a substrate having a first side and a second side, a first transistor that includes a first gate over a first protrusion and a first source region and a first drain region interposing the first protrusion, a first buried contact disposed adjacent to the first protrusion and having at least a portion extending into the substrate, a first contact plug disposed over the first drain region, first conductive lines disposed over the first contact plug and electrically connecting to the first drain region by the first contact plug, first via penetrating through the substrate and connecting the first buried contact; and second conductive lines disposed over the second side of the substrate and electrically connecting to the first via. The first buried contact is electrically connecting to the first source region or the first gate.
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公开(公告)号：US11699474B2
公开(公告)日：2023-07-11
申请号：US17696394
申请日：2022-03-16
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： MingYuan Song , Shy-Jay Lin , Chien-Min Lee , William Joseph Gallagher
IPC: G11C11/16 , G01R33/09 , H01L27/22 , H01L43/04 , H01L43/08 , H01L43/10 , H01L43/14 , H10B61/00 , H10N50/10 , H10N50/85 , H10N52/01 , H10N52/80
CPC classification number: G11C11/1675 , G01R33/093 , G11C11/161 , H10B61/22 , H10N50/10 , H10N50/85 , H10N52/01 , H10N52/80
Abstract: A magnetic memory device includes a magnetic tunnel junction (MTJ) stack, a spin-orbit torque (SOT) induction wiring disposed over the MTJ stack, a first terminal coupled to a first end of the SOT induction wiring, a second terminal coupled to a second end of the SOT induction wiring, and a shared selector layer coupled to the first terminal.
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公开(公告)号：US20220208244A1
公开(公告)日：2022-06-30
申请号：US17696394
申请日：2022-03-16
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： MingYuan Song , Shy-Jay Lin , Chien-Min Lee , William Joseph Gallagher
Abstract: A magnetic memory device includes a magnetic tunnel junction (MTJ) stack, a spin-orbit torque (SOT) induction wiring disposed over the MTJ stack, a first terminal coupled to a first end of the SOT induction wiring, a second terminal coupled to a second end of the SOT induction wiring, and a shared selector layer coupled to the first terminal.
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公开(公告)号：US10734580B2
公开(公告)日：2020-08-04
申请号：US16397871
申请日：2019-04-29
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Tai-Yen Peng , Hui-Hsien Wei , Wei-Chih Wen , Pin-Ren Dai , Chien-Min Lee , Han-Ting Tsai , Jyu-Horng Shieh , Chung-Te Lin
Abstract: A memory device includes an inter-layer dielectric (ILD) layer, a metallization pattern, an etch stop layer, a metal-containing compound layer, a memory cell, and a bottom electrode via. The metallization pattern is in the ILD layer. The etch stop layer is over the ILD layer. The metal-containing compound layer is over the etch stop layer. The memory cell is over the metal-containing compound layer and includes a bottom electrode, a resistance switching element over the bottom electrode, and a top electrode over the resistance switching element. The bottom electrode via connects the bottom electrode to the metallization pattern through the metal-containing compound layer and the etch stop layer.
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公开(公告)号：US20250040447A1
公开(公告)日：2025-01-30
申请号：US18912177
申请日：2024-10-10
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chien-Min Lee , Shy-Jay Lin
IPC: H10N52/80 , H01F10/32 , H01F41/30 , H10N50/01 , H10N50/10 , H10N50/80 , H10N50/85 , H10N52/00 , H10N52/01
Abstract: A magnetic memory device includes a spin-orbit torque (SOT) induction spin Hall electrode and a free layer of a magnetic tunnel junction (MTJ) stack disposed on the spin Hall electrode which is a synthetic anti-ferromagnetic structure. The free layer has a magnetic moment which is askew of the long axis of the MTJ stack and askew the direction of current flow through the spin Hall electrode. The MTJ stack internally generates a magnetic field to switch the state of the free layer. The free layer includes a first layer separated from a second layer by a spacer layer, where the first layer and the second layer may have the same or different crystalline structures.
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Patent Agency Ranking
公开(公告)号：US12156479B2
公开(公告)日：2024-11-26
申请号：US17518789
申请日：2021-11-04
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Yen-Lin Huang , MingYuan Song , Chien-Min Lee , Shy-Jay Lin , Chi-Feng Pai , Chen-Yu Hu , Chao-Chung Huang , Kuan-Hao Chen , Chia-Chin Tsai , Yu-Fang Chiu , Cheng-Wei Peng
IPC: H10N50/85 , C22C5/04 , H01F10/32 , H10B61/00 , H10N50/10 , H10N50/80 , H10N52/00 , H10N52/01 , H10N52/80
Abstract: A memory device and a manufacturing method thereof are provided. The memory device includes a magnetic tunneling junction (MTJ) and a spin Hall electrode (SHE). The MTJ includes a free layer, a reference layer and a barrier layer lying between the free layer and the reference layer. The SHE is in contact with the MTJ, and configured to convert a charge current to a spin current for programming the MTJ. The SHE is formed of an alloy comprising at least one heavy metal element and at least one light transition metal element. The heavy metal element is selected from metal elements with one or more valence electrons filling in 5d orbitals, and the light transition metal element is selected from transition metal elements with one or more valence electrons partially filling in 3d orbitals.
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公开(公告)号：US12127489B2
公开(公告)日：2024-10-22
申请号：US18170947
申请日：2023-02-17
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Tai-Yen Peng , Hui-Hsien Wei , Wei-Chih Wen , Pin-Ren Dai , Chien-Min Lee , Han-Ting Tsai , Jyu-Horng Shieh , Chung-Te Lin
CPC classification number: H10N70/884 , H10B61/22 , H10B63/30 , H10B63/82 , H10B63/84 , H10N50/01 , H10N50/80 , H10N70/023 , H10N70/063 , H10N70/24 , H10N70/245 , H10N70/826 , H10N70/8416 , H10N70/8833
Abstract: An IC structure comprises a substrate, a first dielectric structure, a second dielectric structure, a first via structure, and a memory cell structure. The substrate comprises a memory region and a logic region. The first dielectric structure is over the memory region. The second dielectric structure laterally extends from the first dielectric structure to over the logic region. The second dielectric structure has a thickness less than a thickness of the first dielectric structure. The first via structure extends through the first dielectric structure. A top segment of the first via structure is higher than a top surface of the first dielectric structure. The first memory cell structure is over the first via structure.
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公开(公告)号：US20230389448A1
公开(公告)日：2023-11-30
申请号：US18447912
申请日：2023-08-10
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chien-Min Lee , Shy-Jay Lin
IPC: H10N52/80 , H01F41/30 , H01F10/32 , H10N50/01 , H10N50/10 , H10N50/80 , H10N50/85 , H10N52/01 , H10N52/00
CPC classification number: H10N52/80 , H01F41/302 , H01F10/3254 , H01F10/3272 , H01F10/329 , H10N50/01 , H10N50/10 , H10N50/80 , H10N50/85 , H10N52/01 , H10N52/101
Abstract: A magnetic memory device includes a spin-orbit torque (SOT) induction spin Hall electrode and a free layer of a magnetic tunnel junction (MTJ) stack disposed on the spin Hall electrode which is a synthetic anti-ferromagnetic structure. The free layer has a magnetic moment which is askew of the long axis of the MTJ stack and askew the direction of current flow through the spin Hall electrode. The MTJ stack internally generates a magnetic field to switch the state of the free layer. The free layer includes a first layer separated from a second layer by a spacer layer, where the first layer and the second layer may have the same or different crystalline structures.
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公开(公告)号：US20230371402A1
公开(公告)日：2023-11-16
申请号：US18355551
申请日：2023-07-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Shy-Jay Lin , Chien-Min Lee , MingYuan Song
Abstract: A magnetic memory device includes a spin-orbit torque (SOT) induction structure which may be strained and seedless and formed with a perpendicular magnetic anisotropy. A magnetic tunnel junction (MTJ) stack is disposed over the SOT induction structure. A spacer layer may decouple layers between the SOT induction structure and the MTJ stack or decouple layers within the MTJ stack. One end of the SOT induction structure may be coupled to a first transistor and another end of the SOT induction structure coupled to a second transistor.
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公开(公告)号：US20230292631A1
公开(公告)日：2023-09-14
申请号：US18308914
申请日：2023-04-28
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chien-Min Lee , Shy-Jay Lin , Yen-Lin Huang , MingYuan Song , Tung Ying Lee
Abstract: Semiconductor device includes pair of active devices, composite spin Hall electrode, and a magnetic tunnel junction. Composite spin Hall electrode is electrically connected to pair of active devices. Magnetic tunnel junction is disposed on opposite side of composite spin hall electrode with respect to pair of active devices. Spin Hall electrode includes pair of heavy metal layers, and spacer layer disposed in between pair of heavy metal layers. Pair of heavy metal layers is made of a heavy metal in a metastable state. Spacer layer comprises first material different from the pair of heavy metal layers.
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