公开(公告)号：US20170207103A1

公开(公告)日：2017-07-20

申请号：US15405977

申请日：2017-01-13

Applicant: Tokyo Electron Limited

Inventor： Subhadeep Kal ,  Elliott Franke ,  Akiteru Ko ,  Aelan Mosden

IPC: H01L21/3213 ,  H01L21/321

CPC classification number: H01L21/32135 ,  H01L21/0337 ,  H01L21/67109

Abstract: A method for the dry removal of a material on a microelectronic workpiece is described. The method includes receiving a workpiece having a surface exposing a target layer composed of silicon selected from the group consisting of amorphous silicon (a-Si), polycrystalline silicon (poly-Si), and doped silicon that fills a trench or via within a retention layer, and selectively removing at least a portion of the target layer from the retention layer. The selective removal includes exposing the surface of the workpiece to a chemical environment containing N, H, and F at a first setpoint temperature to chemically alter a surface region of the target layer, and then, elevating the temperature of the workpiece to a second setpoint temperature to remove the chemically treated surface region of the target layer.

公开(公告)号：US12002683B2

公开(公告)日：2024-06-04

申请号：US17713723

申请日：2022-04-05

Applicant: Tokyo Electron Limited

Inventor： Hamed Hajibabaeinajafabadi ,  Pingshan Luan ,  Aelan Mosden ,  Sergey Voronin

IPC: H01L21/3213 ,  H01L21/02 ,  H01L21/311 ,  H01L29/40 ,  H01L29/66

CPC classification number: H01L21/31116 ,  H01L21/02532 ,  H01L29/66439 ,  H01L29/66742

Abstract: A method of processing a substrate that includes: positioning a substrate in a plasma processing chamber, the substrate including a layer stack of alternating layers of silicon (Si) layers and silicon-germanium (SiGe) layers, the substrate including a recess that exposes sidewalls of the Si layers and sidewalls of the SiGe layers; flowing a first process gas into the plasma processing chamber; while flowing the first process gas, pulsing a second process gas into the plasma processing chamber at a pulsing frequency; while flowing the first process gas and pulsing the second process gas, applying power to a source electrode and a bias electrode of the plasma processing chamber to generate a plasma in the plasma processing chamber; and exposing the substrate to the plasma to laterally etch a portion of the Si layers selectively to the SiGe layers and form indents between the SiGe layers.

公开(公告)号：US20240096639A1

公开(公告)日：2024-03-21

申请号：US17945897

申请日：2022-09-15

Applicant: TOKYO ELECTRON LIMITED

Inventor： Jonathan HOLLIN ,  Matthew Flaugh ,  Subhadeep Kal ,  Aelan Mosden

IPC: H01L21/311 ,  H01L21/67

CPC classification number: H01L21/31116 ,  H01L21/67109

Abstract: A surface of a substrate is modified, where the substrate includes at least two different layers or films of different materials. The modified layer is then selectively converted to a protection layer on one of the layers, while the other layer is etched.

公开(公告)号：US11538690B2

公开(公告)日：2022-12-27

申请号：US17171742

申请日：2021-02-09

Applicant: Tokyo Electron Limited

Inventor： Pingshan Luan ,  Aelan Mosden

IPC: H01L21/3065 ,  H01L21/311 ,  H01L21/3213

Abstract: In certain embodiments, a method for processing a semiconductor substrate includes receiving a semiconductor substrate that includes a film stack. The film stack includes a first silicon layer, a second silicon layer, and a first germanium-containing layer positioned between the first silicon layer and the second silicon layer. The method further includes selectively etching the first germanium-containing layer by exposing the film stack to a plasma that includes fluorine agents, nitrogen agents, and hydrogen agents. The plasma etches the first germanium-containing layer and causes a passivation layer to be formed on exposed surfaces of the first silicon layer and the second silicon layer to inhibit etching of the first silicon layer and the second silicon layer during exposure of the film stack to the plasma.

公开(公告)号：US20220254645A1

公开(公告)日：2022-08-11

申请号：US17171742

申请日：2021-02-09

Applicant: Tokyo Electron Limited

Inventor： Pingshan Luan ,  Aelan Mosden

IPC: H01L21/3065

Abstract: In certain embodiments, a method for processing a semiconductor substrate includes receiving a semiconductor substrate that includes a film stack. The film stack includes a first silicon layer, a second silicon layer, and a first germanium-containing layer positioned between the first silicon layer and the second silicon layer. The method further includes selectively etching the first germanium-containing layer by exposing the film stack to a plasma that includes fluorine agents, nitrogen agents, and hydrogen agents. The plasma etches the first germanium-containing layer and causes a passivation layer to be formed on exposed surfaces of the first silicon layer and the second silicon layer to inhibit etching of the first silicon layer and the second silicon layer during exposure of the film stack to the plasma.

公开(公告)号：US20210057213A1

公开(公告)日：2021-02-25

申请号：US16868277

申请日：2020-05-06

Applicant: Tokyo Electron Limited

Inventor： Daisuke Ito ,  Subhadeep Kal ,  Shinji Irie ,  Aelan Mosden

IPC: H01L21/027 ,  H01L21/3065 ,  G03F7/20 ,  H01J37/32 ,  H01L21/67

Abstract: Embodiments provide a non-plasma etch, such as a gas-phase and/or remote plasma etch, of titanium-containing material layers with tunable selectivity to other material layers. A substrate is received within a process chamber, and the substrate has exposed material layers including a titanium-containing material layer and at least one additional material layer. The additional material layer is selectively etched with respect to the titanium-containing material layer by exposing the substrate to a controlled environment including a halogen-containing gas. For one embodiment, the halogen-containing gas includes a fluorine-based gas. For one embodiment, the titanium-containing material layer is a titanium or a titanium nitride material layer. For one embodiment, the additional material layer includes tungsten, tungsten oxide, hafnium oxide, silicon oxide, silicon-germanium, silicon, silicon nitride, and/or aluminum oxide. A non-selective etch with respect to the titanium-containing material layer can be performed by modulating the process parameters such as temperature.

公开(公告)号：US10923356B2

公开(公告)日：2021-02-16

申请号：US16436022

申请日：2019-06-10

Applicant: Tokyo Electron Limited

Inventor： Subhadeep Kal ,  Masashi Matsumoto ,  Daisuke Ito ,  Yusuke Muraki ,  Aelan Mosden

IPC: H01L21/3065 ,  H01L29/161 ,  H01L21/67 ,  H01L29/423

Abstract: A method for the dry removal of a material on a microelectronic workpiece is described. The method includes receiving a substrate having a working surface exposing a silicon-germanium alloy and at least one other material, the silicon-germanium alloy represented as SixGe1-x, wherein x is a real number ranging from 0 to 1; and selectively etching the silicon-germanium alloy relative to the other material by exposing the substrate to a controlled gas-phase environment containing an anhydrous halogen compound, such as a diatomic halogen or an interhalogen compound.

公开(公告)号：US20200312673A1

公开(公告)日：2020-10-01

申请号：US16802554

申请日：2020-02-27

Applicant: Tokyo Electron Limited

Inventor： Yu-Hao Tsai ,  Du Zhang ,  Mingmei Wang ,  Aelan Mosden ,  Matthew Flaugh

IPC: H01L21/3213

Abstract: Methods for the atomic layer etch (ALE) of tungsten or other metal layers are disclosed that use in part sequential oxidation and reduction of tungsten/metal layers to achieve target etch parameters. For one embodiment, a metal layer is first oxidized to form a metal oxide layer and an underlying metal layer. The metal oxide layer is then reduced to form a surface metal layer and an underlying metal oxide layer. The surface metal layer is then removed to leave the underlying metal oxide layer and the underlying metal layer. Further, the oxidizing, reducing, and removing processes can be repeated to achieve a target etch depth. In addition, a target etch rate can also achieved for each process cycle of oxidizing, reducing, and removing.

公开(公告)号：US20200027741A1

公开(公告)日：2020-01-23

申请号：US16436022

申请日：2019-06-10

Applicant: Tokyo Electron Limited

Inventor： Subhadeep Kal ,  Masashi Matsumoto ,  Daisuke Ito ,  Yusuke Muraki ,  Aelan Mosden

IPC: H01L21/3065 ,  H01L29/161

Abstract: A method for the dry removal of a material on a microelectronic workpiece is described. The method includes receiving a substrate having a working surface exposing a silicon-germanium alloy and at least one other material, the silicon-germanium alloy represented as SixGe1-x, wherein x is a real number ranging from 0 to 1; and selectively etching the silicon-germanium alloy relative to the other material by exposing the substrate to a controlled gas-phase environment containing an anhydrous halogen compound, such as a diatomic halogen or an interhalogen compound.

公开(公告)号：US20180308753A1

公开(公告)日：2018-10-25

申请号：US15491786

申请日：2017-04-19

Applicant: Tokyo Electron Limited

Inventor： Aelan Mosden ,  Kaushik Kumar

IPC: H01L21/768 ,  H01L21/311 ,  H01L21/28

Abstract: Process integration techniques are disclosed that use a carbon fill layer during formation of self-aligned structures. A carbon layer may be placed over an etch stop layer. A cap layer may be provided over the carbon layer. The carbon layer may fill a high aspect ratio structure formed on the substrate. The carbon layer may be removed from a substrate in a highly selective removal technique in a manner that does not damage underlying layers. The carbon layer may fill a self-aligned contact region that is provided for a self-aligned contact process flow. A tone inversion mask may be used to protect multiple self-aligned contact regions. With the blocking mask in place, the carbon layer may be removed from regions that are not the self-aligned contact region. After removal of the blocking mask, the carbon layer which fills the self-aligned contacts may then be removed.