公开(公告)号：US20180130708A1

公开(公告)日：2018-05-10

申请号：US15808473

申请日：2017-11-09

Applicant: Tokyo Electron Limited

Inventor： Nihar Mohanty ,  Elliott Franke ,  Richard Farrell

IPC: H01L21/768 ,  H01L21/311 ,  H01L21/02 ,  H01L23/528 ,  H01L23/522

CPC classification number: H01L21/76897 ,  H01L21/02118 ,  H01L21/02318 ,  H01L21/31111 ,  H01L21/31133 ,  H01L21/76802 ,  H01L21/76828 ,  H01L21/76834 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/5283

Abstract: A formed back-end-of-line (BEOL) metal line layer may include a plurality of metal lines with dielectric oxide caps that are disposed in between each metal lines. To overlay an interconnecting layer of metal lines on a selected metal line of the BEOL metal line layer, a block copolymer (BCP) may be formed on a patterning layer. Thereafter, a selective etching of the formed BCP creates a recess above the selected metal line. The created recess facilitates the overlaying of the interconnecting layer of metal lines.

公开(公告)号：US10049892B2

公开(公告)日：2018-08-14

申请号：US15145010

申请日：2016-05-03

Applicant: Tokyo Electron Limited

Inventor： Nihar Mohanty ,  Eric Chih-Fang Liu ,  Elliott Franke

IPC: H01L21/324 ,  H01L21/033 ,  H01L21/027 ,  G03F7/004 ,  C23C16/503 ,  G03F7/16 ,  H01L21/308 ,  B81C1/00

Abstract: Techniques herein include methods of processing photoresist patterns and photoresist materials for successful use in multi-patterning operations. Techniques include combinations of targeted deposition, curing, and trimming to provide a post-processed resist that effectively enables multi-patterning using photoresist materials to function as mandrels. Photoresist patterns and mandrels are hardened, strengthened, and/or dimensionally adjusted to provide desired dimensions and/or mandrels enabling straight sidewall spacers. Polymer is deposited with tapered profile to compensate for compressive stresses of various conformal or subsequent films to result in a vertical profile despite any compression.

公开(公告)号：US10319637B2

公开(公告)日：2019-06-11

申请号：US15808473

申请日：2017-11-09

Applicant: Tokyo Electron Limited

Inventor： Nihar Mohanty ,  Elliott Franke ,  Richard Farrell

IPC: H01L21/311 ,  H01L21/768 ,  H01L23/528 ,  H01L23/522 ,  H01L21/02

Abstract: A formed back-end-of-line (BEOL) metal line layer may include a plurality of metal lines with dielectric oxide caps that are disposed in between each metal lines. To overlay an interconnecting layer of metal lines on a selected metal line of the BEOL metal line layer, a block copolymer (BCP) may be formed on a patterning layer. Thereafter, a selective etching of the formed BCP creates a recess above the selected metal line. The created recess facilitates the overlaying of the interconnecting layer of metal lines.

公开(公告)号：US20170207103A1

公开(公告)日：2017-07-20

申请号：US15405977

申请日：2017-01-13

Applicant: Tokyo Electron Limited

Inventor： Subhadeep Kal ,  Elliott Franke ,  Akiteru Ko ,  Aelan Mosden

IPC: H01L21/3213 ,  H01L21/321

CPC classification number: H01L21/32135 ,  H01L21/0337 ,  H01L21/67109

Abstract: A method for the dry removal of a material on a microelectronic workpiece is described. The method includes receiving a workpiece having a surface exposing a target layer composed of silicon selected from the group consisting of amorphous silicon (a-Si), polycrystalline silicon (poly-Si), and doped silicon that fills a trench or via within a retention layer, and selectively removing at least a portion of the target layer from the retention layer. The selective removal includes exposing the surface of the workpiece to a chemical environment containing N, H, and F at a first setpoint temperature to chemically alter a surface region of the target layer, and then, elevating the temperature of the workpiece to a second setpoint temperature to remove the chemically treated surface region of the target layer.

公开(公告)号：US09576812B2

公开(公告)日：2017-02-21

申请号：US15085186

申请日：2016-03-30

Applicant: Tokyo Electron Limited

Inventor： Elliott Franke ,  Vinayak Rastogi ,  Akiteru Ko ,  Kiyohito Ito

IPC: H01L21/311 ,  H01L21/3065 ,  H01J37/32 ,  H01L21/308 ,  H01L21/67

CPC classification number: H01L21/30655 ,  H01J37/32009 ,  H01J2237/334 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/67069

Abstract: Provided is a method of creating structure profiles on a substrate using faceting and passivation layers. A first plasma etch process performed generating a faceted sidewall and a desired inflection point; a second plasma etch process is performed using an oxygen, nitrogen, or combined oxygen and nitrogen plasma, generating a passivation layer; and a third plasma etch process using operating variables of an etch chemistry on the faceted sidewall and the passivation layer to induce differential etch rates to achieve a breakthrough on near-horizontal surfaces of the structure, wherein the third plasma etch used is configured to produce a target sidewall profile on the substrate down to the underlying stop layer. Selected two or more plasma etch variables are controlled in the performance of the first plasma etch process, the second plasma etch process, and/or the third plasma etch process in order to achieve target sidewall profile objectives.

Abstract translation: 提供了使用刻面和钝化层在基底上产生结构轮廓的方法。 执行产生刻面侧壁和期望拐点的第一等离子体蚀刻工艺; 使用氧，氮或组合的氧和氮等离子体进行第二等离子体蚀刻工艺，产生钝化层; 以及使用刻蚀侧壁和钝化层上的蚀刻化学品的操作变量的第三等离子体蚀刻工艺，以诱导差分蚀刻速率以在结构的近水平表面上实现突破，其中所用的第三等离子体蚀刻被配置为产生 基板上的目标侧壁轮廓直到底层停止层。 在第一等离子体蚀刻工艺，第二等离子体蚀刻工艺和/或第三等离子体蚀刻工艺的性能中控制所选择的两个或更多个等离子蚀刻变量，以实现目标侧壁轮廓目标。

公开(公告)号：US10748769B2

公开(公告)日：2020-08-18

申请号：US16407042

申请日：2019-05-08

Applicant: Tokyo Electron Limited

Inventor： Elliott Franke ,  Angelique Raley ,  Sophie Thibaut

IPC: H01L21/033 ,  H01L21/311 ,  H01L21/67 ,  H01L21/027 ,  H01L21/02

Abstract: Embodiments of methods and systems for patterning of low aspect ratio stacks are described. In one embodiment, a method may include receiving a substrate comprising a patterned organic planarizing layer (OPL) mask wherein a surface of the OPL mask is exposed, the OPL mask landing on a dielectric layer. The method may also include performing a partial etch of the dielectric layer in a region exposed by the OPL mask. Additionally, the method may include depositing a capping material on a surface of the OPL mask. The method may also include performing a cyclical process of the partial etch of the dielectric layer and deposition of the capping material on a surface of the OPL mask until the dielectric layer is removed to a target depth. In such embodiments, the cyclical process generates an output patterned substrate with a target line edge roughness (LER).

公开(公告)号：US20160329207A1

公开(公告)日：2016-11-10

申请号：US15145010

申请日：2016-05-03

Applicant: Tokyo Electron Limited

Inventor： Nihar Mohanty ,  Eric Chih-Fang Liu ,  Elliott Franke

IPC: H01L21/027 ,  H01L21/308 ,  H01L21/324

CPC classification number: H01L21/324 ,  B81C1/00404 ,  B81C2201/017 ,  C23C16/503 ,  G03F7/004 ,  G03F7/167 ,  H01L21/0273 ,  H01L21/0337 ,  H01L21/3081 ,  H01L21/3085 ,  H01L21/3086

Abstract: Techniques herein include methods of processing photoresist patterns and photoresist materials for successful use in multi-patterning operations. Techniques include combinations of targeted deposition, curing, and trimming to provide a post-processed resist that effectively enables multi-patterning using photoresist materials to function as mandrels. Photoresist patterns and mandrels are hardened, strengthened, and/or dimensionally adjusted to provide desired dimensions and/or mandrels enabling straight sidewall spacers. Polymer is deposited with tapered profile to compensate for compressive stresses of various conformal or subsequent films to result in a vertical profile despite any compression.

Abstract translation: 本文的技术包括在多图案化操作中成功使用的光致抗蚀剂图案和光致抗蚀剂材料的处理方法。 技术包括目标沉积，固化和修整的组合以提供后处理抗蚀剂，其有效地使得能够使用光致抗蚀剂材料作为心轴发挥作用的多图案化。 光刻胶图案和心轴被硬化，加强和/或尺寸调整以提供使得能够形成直壁侧壁间隔物的所需尺寸和/或心轴。 聚合物沉积有锥形轮廓以补偿各种适形或随后的膜的压缩应力，导致垂直轮廓，尽管任何压缩。

公开(公告)号：US20160293435A1

公开(公告)日：2016-10-06

申请号：US15085186

申请日：2016-03-30

Applicant: Tokyo Electron Limited

Inventor： Elliott Franke ,  Vinayak Rastogi ,  Akiteru Ko ,  Kiyohito Ito

IPC: H01L21/3065 ,  H01L21/67 ,  H01J37/32 ,  H01L21/308

CPC classification number: H01L21/30655 ,  H01J37/32009 ,  H01J2237/334 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/67069

Abstract: Provided is a method of creating structure profiles on a substrate using faceting and passivation layers. A first plasma etch process performed generating a faceted sidewall and a desired inflection point; a second plasma etch process is performed using an oxygen, nitrogen, or combined oxygen and nitrogen plasma, generating a passivation layer; and a third plasma etch process using operating variables of an etch chemistry on the faceted sidewall and the passivation layer to induce differential etch rates to achieve a breakthrough on near-horizontal surfaces of the structure, wherein the third plasma etch used is configured to produce a target sidewall profile on the substrate down to the underlying stop layer. Selected two or more plasma etch variables are controlled in the performance of the first plasma etch process, the second plasma etch process, and/or the third plasma etch process in order to achieve target sidewall profile objectives.

Abstract translation: 提供了使用刻面和钝化层在基底上产生结构轮廓的方法。 执行产生刻面侧壁和期望拐点的第一等离子体蚀刻工艺; 使用氧，氮或组合的氧和氮等离子体进行第二等离子体蚀刻工艺，产生钝化层; 以及使用刻蚀侧壁和钝化层上的蚀刻化学品的操作变量的第三等离子体蚀刻工艺，以诱导差分蚀刻速率以在结构的近水平表面上实现突破，其中所用的第三等离子体蚀刻被配置为产生 基板上的目标侧壁轮廓直到底层停止层。 在第一等离子体蚀刻工艺，第二等离子体蚀刻工艺和/或第三等离子体蚀刻工艺的性能中控制所选择的两个或更多个等离子蚀刻变量，以实现目标侧壁轮廓目标。