公开(公告)号：US20050048728A1

公开(公告)日：2005-03-03

申请号：US10917288

申请日：2004-08-13

申请人： Takaaki Kawahara

发明人： Takaaki Kawahara

IPC分类号： C23C16/44 ,  H01L21/02 ,  H01L21/28 ,  H01L21/314 ,  H01L21/316 ,  H01L21/336 ,  H01L29/51 ,  H01L29/78

CPC分类号： H01L21/28194 ,  H01L21/3141 ,  H01L21/3142 ,  H01L21/31612 ,  H01L21/31645 ,  H01L28/56 ,  H01L29/4916 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

摘要： A first insulating film is formed on a base substrate, then a second insulating film is formed on the first insulating film, the second insulating film having a relative permittivity higher than that of the first insulating film. A gate electrode is formed on the second insulating film. The second insulating film forming includes first to sixth steps, and a cycle consisting of the first to sixth steps is repeated.

摘要翻译： 在基底基板上形成第一绝缘膜，然后在第一绝缘膜上形成第二绝缘膜，第二绝缘膜的相对介电常数高于第一绝缘膜。 栅电极形成在第二绝缘膜上。 第二绝缘膜形成包括第一至第六步骤，并且重复由第一至第六步骤组成的循环。

公开(公告)号：US06638880B2

公开(公告)日：2003-10-28

申请号：US09981824

申请日：2001-10-19

申请人： Mikio Yamamuka ,  Takaaki Kawahara ,  Masayoshi Tarutani ,  Tsuyoshi Horikawa ,  Shigeru Matsuno ,  Takehiko Sato

发明人： Mikio Yamamuka ,  Takaaki Kawahara ,  Masayoshi Tarutani ,  Tsuyoshi Horikawa ,  Shigeru Matsuno ,  Takehiko Sato

IPC分类号： H01L2100

CPC分类号： C23C16/45502 ,  C23C16/4401 ,  C23C16/4412 ,  C23C16/45519 ,  C23C16/45561 ,  C23C16/4557 ,  C23C16/45589 ,  H01L21/31691

摘要： In the chemical vapor deposition apparatus, a substrate stage for mounting a substrate is provided inside a reaction chamber of the apparatus. A source gas inlet for introducing a source gas and exhaust outlets and for exhausting the source gas are provided. Exhaust outlet valves provided for exhaust outlets are open and shut successively with time. The direction of the flow of source gas relative to the fixed substrate varies with time. The present chemical vapor deposition apparatus allows the improved evenness of film thickness, the composition ratio, and the like within the substrate surface as well as the reduction of particles of foreign substance generated inside the reaction chamber.

公开(公告)号：US06448191B2

公开(公告)日：2002-09-10

申请号：US09832928

申请日：2001-04-12

申请人： Takaaki Kawahara ,  Mikio Yamamuka ,  Tsuyoshi Horikawa ,  Masayoshi Tarutani ,  Takehiko Sato ,  Shigeru Matsuno

发明人： Takaaki Kawahara ,  Mikio Yamamuka ,  Tsuyoshi Horikawa ,  Masayoshi Tarutani ,  Takehiko Sato ,  Shigeru Matsuno

IPC分类号： H01L2131

CPC分类号： H01L21/31691 ,  C23C16/409 ,  H01L28/55

摘要： A method of forming a (Ba, Sr) TiO3 high dielectric constant thin film with sufficient coverage is provided. A Ba material, an Sr material and a Ti material including bis (t-butoxy) bis (dipivaloylmethanate) titanium are dissolved in an organic solvent to obtain a solution material. The solution material is vaporized, so that material gas is obtained. A (Ba, Sr) TiO3 thin film is formed on a substrate by CVD reaction using the material gas.

摘要翻译： 提供了形成具有足够覆盖面的（Ba，Sr）TiO 3高介电常数薄膜的方法。 将Ba材料，Sr材料和包含双（叔丁氧基）双（二戊酰甲烷甲酸酯）钛的Ti材料溶解在有机溶剂中以获得溶液材料。 使溶液气化，得到原料气体。 通过使用原料气体的CVD反应在基板上形成（Ba，Sr）TiO 3薄膜。

公开(公告)号：US6096133A

公开(公告)日：2000-08-01

申请号：US478362

申请日：2000-01-06

申请人： Akimasa Yuuki ,  Takaaki Kawahara ,  Tetsuro Makita ,  Mikio Yamamuka ,  Koichi Ono ,  Tomonori Okudaira

发明人： Akimasa Yuuki ,  Takaaki Kawahara ,  Tetsuro Makita ,  Mikio Yamamuka ,  Koichi Ono ,  Tomonori Okudaira

IPC分类号： C23C16/40 ,  C23C16/448 ,  C23C16/52 ,  C23C16/54 ,  C23C16/00

CPC分类号： C23C16/409 ,  C23C16/4481 ,  C23C16/52 ,  C23C16/54

摘要： An apparatus for depositing a thin film on a substrate by chemical vapor deposition (CVD) includes a material container for containing a liquid CVD source material; a material feeder for feeding the liquid CVD source material from the material container to a vaporizer while keeping the CVD source material liquid; a vaporizer for vaporizing the liquid CVD source material fed from the material feeder by heating the liquid CVD source material to a high temperature to form a CVD source material gas; a reaction chamber connected to the vaporizer by a pipe for forming a thin film on a substrate using the CVD source material gas; and a thermostatic box surrounding the reaction chamber, wherein both of the vaporizer and piping connecting the vaporizer to the reaction chamber are located within the thermostatic box.

摘要翻译： 用于通过化学气相沉积（CVD）在衬底上沉积薄膜的装置包括用于容纳液体CVD源材料的材料容器; 用于将液体CVD源材料从所述材料容器供给到蒸发器并同时保持所述CVD源材料的材料供给器; 蒸发器，用于通过将液体CVD源材料加热至高温来蒸发从供料器供给的液体CVD源材料，以形成CVD源材料气体; 反应室，其通过用于使用所述CVD源材料气体在基板上形成薄膜的管连接到所述蒸发器; 以及围绕反应室的恒温箱，其中蒸发器和将蒸发器连接到反应室的管道都位于恒温箱内。

公开(公告)号：US5882410A

公开(公告)日：1999-03-16

申请号：US115991

申请日：1998-07-15

申请人： Takaaki Kawahara ,  Mikio Yamamuka ,  Tetsuro Makita ,  Tsuyoshi Horikawa ,  Akimasa Yuuki ,  Teruo Shibano

发明人： Takaaki Kawahara ,  Mikio Yamamuka ,  Tetsuro Makita ,  Tsuyoshi Horikawa ,  Akimasa Yuuki ,  Teruo Shibano

IPC分类号： C23C16/40 ,  C23C16/448 ,  C23C16/52 ,  H01L21/02 ,  H01L21/314 ,  C23C16/00

CPC分类号： H01L28/56 ,  C23C16/409 ,  C23C16/4481 ,  C23C16/4485 ,  C23C16/52 ,  H01L21/02197 ,  H01L21/022 ,  H01L21/02271

摘要： There is provided a (Ba, Sr) TiO.sub.3 film of higher dielectric constant and less leakage current for serving as a dielectric thin film of a capacitor in a semiconductor memory. DPM (dipivaloylmethanato) compounds of Ba, Sr and Ti are dissolved in THF (tetrahydrofuran) to obtain Ba(DPM).sub.2 /THF, Sr(DPM).sub.2 /THF and TiO(DPM).sub.2 /THF solutions which are used as source material solutions. A (Ba, Sr) TiO.sub.3 film is formed by a CVD method while increasing a relative percentage of a Ti source material flow rate to a sum of Ba source material flow rate and Sr source material flow rate. The film formation is carried out in multiple steps, and annealing is applied in each step after deposition of the film.

公开(公告)号：US08293632B2

公开(公告)日：2012-10-23

申请号：US12755058

申请日：2010-04-06

申请人： Masaru Kadoshima ,  Shinsuke Sakashita ,  Takaaki Kawahara ,  Jiro Yugami

发明人： Masaru Kadoshima ,  Shinsuke Sakashita ,  Takaaki Kawahara ,  Jiro Yugami

IPC分类号： H01L21/3205

CPC分类号： H01L21/823857

摘要： To improve productivity and performance of a CMISFET including a high-dielectric-constant gate insulating film and a metal gate electrode. An Hf-containing insulating film for a gate insulating film is formed over the main surface of a semiconductor substrate. A metal nitride film is formed on the insulating film. The metal nitride film in an nMIS formation region where an n-channel MISFET is to be formed is selectively removed by wet etching using a photoresist pattern on the metal nitride films a mask. Then, a threshold adjustment film containing a rare-earth element is formed. The Hf-containing insulating film in the nMIS formation region reacts with the threshold adjustment film by heat treatment. The Hf-containing insulating film in a pMIS formation region where a p-channel MISFET is to be formed does not react with the threshold adjustment film because of the existence of the metal nitride film. Then, after removing the unreacted threshold adjustment film and the metal nitride film, metal gate electrodes are formed in the nMIS formation region and the pMIS formation region.

摘要翻译： 提高包括高介电常数栅极绝缘膜和金属栅电极在内的CMISFET的生产率和性能。 在半导体衬底的主表面上形成用于栅极绝缘膜的含Hf绝缘膜。 在绝缘膜上形成金属氮化物膜。 通过在金属氮化物膜上使用光刻胶图案的掩模，通过湿式蚀刻选择性地去除要形成n沟道MISFET的nMIS形成区域中的金属氮化物膜。 然后，形成含有稀土元素的阈值调节膜。 nMIS形成区域中的含Hf绝缘膜通过热处理与阈值调节膜反应。 由于存在金属氮化物膜，所以要形成p沟道MISFET的pMIS形成区域中的含Hf绝缘膜不会与阈值调节膜反应。 然后，在除去未反应的阈值调整膜和金属氮化物膜之后，在nMIS形成区域和pMIS形成区域中形成金属栅电极。

公开(公告)号：US20110057265A1

公开(公告)日：2011-03-10

申请号：US12943600

申请日：2010-11-10

申请人： Shinsuke SAKASHITA ,  Takaaki Kawahara ,  Jiro Yugami

发明人： Shinsuke SAKASHITA ,  Takaaki Kawahara ,  Jiro Yugami

IPC分类号： H01L27/092

CPC分类号： H01L21/823842

摘要： Provided is a highly reliable semiconductor device equipped with a plurality of semiconductor elements having desired properties, respectively; and a manufacturing method facilitating the manufacture of the semiconductor device. The semiconductor device is manufactured by forming a gate-electrode metal film having a thickness of from 3 to 30 nm over the entire upper surface of a gate insulating film; forming an n-side cap layer having a thickness of 10 nm or less over the entire upper surface of a portion of the gate-electrode metal film belonging to an nFET region by using a material different from that of the gate-electrode metal film; and carrying out heat treatment over the n-side cap layer to diffuse the material of the n-side cap layer into the gate-electrode metal film immediately below the n-side cap layer and react them to form an n-side gate-electrode metal film in a nFET region. A poly-Si layer is then deposited, followed by gate electrode processing.

摘要翻译： 提供一种高度可靠的半导体器件，其分别配备有具有期望特性的多个半导体元件; 以及便于制造半导体器件的制造方法。 半导体器件通过在栅极绝缘膜的整个上表面上形成厚度为3至30nm的栅电极金属膜来制造; 通过使用与栅电极金属膜不同的材料，在属于nFET区域的栅极金属膜的一部分的整个上表面上形成厚度为10nm以下的n侧覆盖层; 在n侧盖层上进行热处理，将n侧盖层的材料向n侧盖层正下方的栅电极金属膜扩散，形成n侧栅电极 金属膜在nFET区域。 然后沉积多晶硅层，随后进行栅电极处理。

公开(公告)号：US07855134B2

公开(公告)日：2010-12-21

申请号：US12354434

申请日：2009-01-15

申请人： Shinsuke Sakashita ,  Takaaki Kawahara ,  Jiro Yugami

发明人： Shinsuke Sakashita ,  Takaaki Kawahara ,  Jiro Yugami

IPC分类号： H01L21/3205 ,  H01L21/4763

CPC分类号： H01L21/823842

摘要： Provided is a highly reliable semiconductor device equipped with a plurality of semiconductor elements having desired properties, respectively; and a manufacturing method facilitating the manufacture of the semiconductor device. The semiconductor device is manufactured by forming a gate-electrode metal film having a thickness of from 3 to 30 nm over the entire upper surface of a gate insulating film; forming an n-side cap layer having a thickness of 10 nm or less over the entire upper surface of a portion of the gate-electrode metal film belonging to an nFET region by using a material different from that of the gate-electrode metal film; and carrying out heat treatment over the n-side cap layer to diffuse the material of the n-side cap layer into the gate-electrode metal film immediately below the n-side cap layer and react them to form an n-side gate-electrode metal film in a nFET region. A poly-Si layer is then deposited, followed by gate electrode processing.

摘要翻译： 提供一种高度可靠的半导体器件，其分别配备有具有期望特性的多个半导体元件; 以及便于制造半导体器件的制造方法。 半导体器件通过在栅极绝缘膜的整个上表面上形成厚度为3至30nm的栅电极金属膜来制造; 通过使用与栅电极金属膜不同的材料，在属于nFET区域的栅极金属膜的一部分的整个上表面上形成厚度为10nm以下的n侧覆盖层; 在n侧盖层上进行热处理，将n侧盖层的材料向n侧盖层正下方的栅电极金属膜扩散，形成n侧栅电极 金属膜在nFET区域。 然后沉积多晶硅层，随后进行栅电极处理。

公开(公告)号：US20090218634A1

公开(公告)日：2009-09-03

申请号：US12354434

申请日：2009-01-15

申请人： Shinsuke Sakashita ,  Takaaki Kawahara ,  Jiro Yugami

发明人： Shinsuke Sakashita ,  Takaaki Kawahara ,  Jiro Yugami

IPC分类号： H01L27/092 ,  H01L21/3205

CPC分类号： H01L21/823842

摘要： Provided is a highly reliable semiconductor device equipped with a plurality of semiconductor elements having desired properties, respectively; and a manufacturing method facilitating the manufacture of the semiconductor device. The semiconductor device is manufactured by forming a gate-electrode metal film having a thickness of from 3 to 30 nm over the entire upper surface of a gate insulating film; forming an n-side cap layer having a thickness of 10 nm or less over the entire upper surface of a portion of the gate-electrode metal film belonging to an nFET region by using a material different from that of the gate-electrode metal film; and carrying out heat treatment over the n-side cap layer to diffuse the material of the n-side cap layer into the gate-electrode metal film immediately below the n-side cap layer and react them to form an n-side gate-electrode metal film in a nFET region. A poly-Si layer is then deposited, followed by gate electrode processing.

摘要翻译： 提供一种高度可靠的半导体器件，其分别配备有具有期望特性的多个半导体元件; 以及便于制造半导体器件的制造方法。 半导体器件通过在栅极绝缘膜的整个上表面上形成厚度为3至30nm的栅电极金属膜来制造; 通过使用与栅电极金属膜不同的材料，在属于nFET区域的栅极金属膜的一部分的整个上表面上形成厚度为10nm以下的n侧覆盖层; 在n侧盖层上进行热处理，将n侧盖层的材料向n侧盖层正下方的栅电极金属膜扩散，形成n侧栅电极 金属膜在nFET区域。 然后沉积多晶硅层，随后进行栅电极处理。

公开(公告)号：US06312526B1

公开(公告)日：2001-11-06

申请号：US09440709

申请日：1999-11-16

申请人： Mikio Yamamuka ,  Takaaki Kawahara ,  Masayoshi Tarutani ,  Tsuyoshi Horikawa ,  Shigeru Matsuno ,  Takehiko Sato

发明人： Mikio Yamamuka ,  Takaaki Kawahara ,  Masayoshi Tarutani ,  Tsuyoshi Horikawa ,  Shigeru Matsuno ,  Takehiko Sato

IPC分类号： C23C1604

CPC分类号： C23C16/45502 ,  C23C16/4401 ,  C23C16/4412 ,  C23C16/45519 ,  C23C16/45561 ,  C23C16/4557 ,  C23C16/45589 ,  H01L21/31691

摘要： In the chemical vapor deposition apparatus, a substrate stage for mounting a substrate is provided inside a reaction chamber of the apparatus. A source gas inlet for introducing a source gas and exhaust outlets and for exhausting the source gas are provided. Exhaust outlet valves provided for exhaust outlets are open and shut successively with time. The direction of the flow of source gas relative to the fixed substrate varies with time. The present chemical vapor deposition apparatus allows the improved evenness of film thickness, the composition ratio, and the like within the substrate surface as well as the reduction of particles of foreign substance generated inside the reaction chamber.

摘要翻译： 在化学气相沉积装置中，在装置的反应室内设置用于安装基板的基板台。 提供了用于引入源气体和排气口并用于排出源气体的源气体入口。 为排气口设置的排气阀随时间开启和关闭。 源气体相对于固定基板的流动方向随时间变化。 本化学气相沉积装置允许改善基板表面内的膜厚度，组成比等的均匀性以及反应室内产生的异物颗粒的减少。