公开(公告)号：USRE40602E1

公开(公告)日：2008-12-09

申请号：US10611307

申请日：2003-07-01

申请人： Akihiro Matsuda ,  Yoshihisa Nagano ,  Yasuhiro Uemoto

发明人： Akihiro Matsuda ,  Yoshihisa Nagano ,  Yasuhiro Uemoto

IPC分类号： H01L21/70

CPC分类号： H01L27/11502 ,  H01L27/11507

摘要： The present invention provides a semiconductor device including a semiconductor element and a dummy semiconductor element adjacent to the semiconductor element. When the semiconductor element is a capacitor element including a bottom electrode, a top electrode and a dielectric layer between the electrodes, a dummy capacitor element also has dummy electrodes and a dummy dielectric layer between the dummy electrodes. The dummy electrode is located so that a space between the top electrode of the capacitor element ad the dummy top electrode is in a predetermined range (e.g. 0.3 μm to 14 μm). The dummy capacitor element prevents the capacitor dielectric layer from degrading since the collisions of the etching ions with the capacitor dielectric layer in a dry etching process is suppressed.

摘要翻译： 本发明提供一种包括半导体元件和与半导体元件相邻的虚设半导体元件的半导体器件。 当半导体元件是包括底部电极，顶部电极和电极之间的电介质层的电容器元件时，虚拟电容器元件在虚拟电极之间也具有虚拟电极和虚设电介质层。 虚拟电极被定位成使得电容器元件的顶部电极和虚拟顶部电极之间的空间处于预定范围（例如，0.3μm至14μm）。 由于在干式蚀刻工艺中蚀刻离子与电容器电介质层的碰撞被抑制，所以虚拟电容器元件防止电容器介电层降解。

公开(公告)号：US06214660B1

公开(公告)日：2001-04-10

申请号：US09177620

申请日：1998-10-23

申请人： Yasuhiro Uemoto ,  Eigi Fujii ,  Koji Arita ,  Yoshihisa Nagano ,  Yasuhiro Shimada ,  Masamichi Azuma ,  Atsuo Inoue ,  Yasufumi Izutsu

发明人： Yasuhiro Uemoto ,  Eigi Fujii ,  Koji Arita ,  Yoshihisa Nagano ,  Yasuhiro Shimada ,  Masamichi Azuma ,  Atsuo Inoue ,  Yasufumi Izutsu

IPC分类号： H01L213205

CPC分类号： H01L27/11502 ,  H01L28/40 ,  H01L28/56

摘要： A method for fabricating a capacitor for an integrated circuit, comprising the steps of forming a titanium film for an adhesion layer over a substrate, forming a titanium dioxide film for a diffusion barrier layer by annealing the titanium film after ion-implantation of oxygen ion into a surface region of the titanium film so as to change titanium in the surface region to titanium dioxide, and forming a high dielectric constant capacitor on the titanium dioxide film.

摘要翻译： 一种用于制造用于集成电路的电容器的方法，包括以下步骤：在衬底上形成用于粘附层的钛膜，通过在离子注入氧离子之后将钛膜退火形成用于扩散阻挡层的二氧化钛膜 钛膜的表面区域，以将表面区域中的钛变为二氧化钛，并在二氧化钛膜上形成高介电常数电容器。

公开(公告)号：US07531863B2

公开(公告)日：2009-05-12

申请号：US11270615

申请日：2005-11-10

申请人： Yoshihisa Nagano ,  Yasuhiro Uemoto

发明人： Yoshihisa Nagano ,  Yasuhiro Uemoto

IPC分类号： H01L27/108

CPC分类号： H01L27/10894 ,  H01L27/10852 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/55

摘要： A protective insulating film is deposited over first and second field-effect transistors formed on a semiconductor substrate. A capacitor composed of a capacitor lower electrode, a capacitor insulating film composed of an insulating metal oxide film, and a capacitor upper electrode is formed on the protective insulating film. A first contact plug formed in the protective insulating film provides a direct connection between the capacitor lower electrode and an impurity diffusion layer of the first field-effect transistor. A second contact plug formed in the protective insulating film provides a direct connection between the capacitor upper electrode and an impurity diffusion layer of the second field-effect transistor.

公开(公告)号：US06441420B1

公开(公告)日：2002-08-27

申请号：US09576971

申请日：2000-05-24

申请人： Yoshihisa Nagano ,  Yasuhiro Uemoto

发明人： Yoshihisa Nagano ,  Yasuhiro Uemoto

IPC分类号： H01L2994

CPC分类号： H01L27/10894 ,  H01L27/10852 ,  H01L27/11507 ,  H01L27/11509 ,  H01L28/55

摘要： A protective insulating film is deposited over first and second field-effect transistors formed on a semiconductor substrate. A capacitor composed of a capacitor lower electrode, a capacitor insulating film composed of an insulating metal oxide film, and a capacitor upper electrode is formed on the protective insulating film. A first contact plug formed in the protective insulating film provides a direct connection between the capacitor lower electrode and an impurity diffusion layer of the first field-effect transistor. A second contact plug formed in the protective insulating film provides a direct connection between the capacitor upper electrode and an impurity diffusion layer of the second field-effect transistor.

公开(公告)号：US06448598B2

公开(公告)日：2002-09-10

申请号：US09338542

申请日：1999-06-23

申请人： Yoshihisa Nagano ,  Shinichiro Hayashi ,  Yasuhiro Uemoto

发明人： Yoshihisa Nagano ,  Shinichiro Hayashi ,  Yasuhiro Uemoto

IPC分类号： H01L27108

CPC分类号： H01L27/10852 ,  H01L28/55

摘要： A semiconductor memory includes plural lower electrodes formed on a semiconductor substrate; a capacitor dielectric film of an insulating metal oxide continuously formed over the plural lower electrodes; plural upper electrodes formed on the capacitor dielectric film in positions respectively corresponding to the plural lower electrodes; and plural transistors formed on the semiconductor substrate. The plural lower electrodes are respectively connected with source regions of the plural transistors.

摘要翻译： 半导体存储器包括形成在半导体衬底上的多个下电极; 连续地形成在所述多个下电极上的绝缘金属氧化物的电容器电介质膜; 在分别对应于多个下电极的位置上形成在电容器电介质膜上的多个上电极; 以及形成在半导体基板上的多个晶体管。 多个下电极分别与多个晶体管的源极区域连接。

公开(公告)号：US5929475A

公开(公告)日：1999-07-27

申请号：US573134

申请日：1995-12-15

申请人： Yasuhiro Uemoto ,  Eigi Fujii ,  Koji Arita ,  Yoshihisa Nagano ,  Yasuhiro Shimada ,  Masamichi Azuma ,  Atsuo Inoue ,  Yasufumi Izutsu

发明人： Yasuhiro Uemoto ,  Eigi Fujii ,  Koji Arita ,  Yoshihisa Nagano ,  Yasuhiro Shimada ,  Masamichi Azuma ,  Atsuo Inoue ,  Yasufumi Izutsu

IPC分类号： H01L21/02 ,  H01L21/314 ,  H01L27/115 ,  H01L29/76 ,  H01L27/108 ,  H01L31/062

CPC分类号： H01L27/11502 ,  H01L28/40 ,  H01L28/56

摘要： A method for fabricating a capacitor for an integrated circuit, comprising the steps of forming a titanium film for an adhesion layer over a substrate, forming a titanium dioxide film for a diffusion barrier layer by annealing the titanium film after ion-implantation of oxygen ion into a surface region of the titanium film so as to change titanium in the surface region to titanium dioxide, and forming a high dielectric constant capacitor on the titanium dioxide film.

摘要翻译： 一种用于制造用于集成电路的电容器的方法，包括以下步骤：在衬底上形成用于粘附层的钛膜，通过在离子注入氧离子之后将钛膜退火形成用于扩散阻挡层的二氧化钛膜 钛膜的表面区域，以将表面区域中的钛变为二氧化钛，并在二氧化钛膜上形成高介电常数电容器。

公开(公告)号：US5245452A

公开(公告)日：1993-09-14

申请号：US369476

申请日：1989-06-21

申请人： Akira Nakamura ,  Kohji Senda ,  Eiji Fujii ,  Fumiaki Emoto ,  Yasuhiro Uemoto ,  Atsuya Yamamoto ,  Kazunori Kobayashi

发明人： Akira Nakamura ,  Kohji Senda ,  Eiji Fujii ,  Fumiaki Emoto ,  Yasuhiro Uemoto ,  Atsuya Yamamoto ,  Kazunori Kobayashi

IPC分类号： G02F1/1337 ,  C08F220/54 ,  G02F1/1343 ,  G02F1/136 ,  G02F1/1368 ,  H01L21/336 ,  H01L27/12 ,  H01L29/78 ,  H01L29/786

CPC分类号： G02F1/1368 ,  C08F220/54 ,  G02F1/13439 ,  G02F2202/104

摘要： An image display device includes thin film transistors and pixel electrodes arranged in matrix form on a substrate. A semiconductor layer forming a channel region of the thin film transistor also serves as the pixel electrode, thereby making the structure of the device simple and facilitating fabrication thereof.

公开(公告)号：US6080617A

公开(公告)日：2000-06-27

申请号：US950920

申请日：1997-10-15

申请人： Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Shinitirou Hayashi ,  Tooru Nasu ,  Koichi Arita ,  Atsuo Inoue ,  Akihiro Matsuda ,  Masaki Kibe ,  Tatsuo Ootsuki

发明人： Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Shinitirou Hayashi ,  Tooru Nasu ,  Koichi Arita ,  Atsuo Inoue ,  Akihiro Matsuda ,  Masaki Kibe ,  Tatsuo Ootsuki

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/06 ,  H01L27/115 ,  H01L29/92

CPC分类号： H01L27/11502 ,  H01L27/0629 ,  H01L27/0688 ,  H01L27/1085 ,  H01L27/11507 ,  H01L28/40 ,  H01L28/55

摘要： A semiconductor device comprising an integrated circuit and a capacitor. In this capacitor, a bottom electrode, a dielectric film and a top electrode are formed, independently of the integrated circuit, on the interlayer insulating film, and the top electrode and bottom electrode are connected with metal interconnections through contact holes opened in the protective film for protecting the surface of the capacitor. In this constitution, either the top electrode or the bottom electrode is connected the bias line of the integrated circuit, and the other is connected to the ground line, so that extraneous emission may be reduced without having to connect the capacitor outside.

摘要翻译： 一种包括集成电路和电容器的半导体器件。 在该电容器中，在层间绝缘膜上形成独立于集成电路的底电极，电介质膜和顶电极，并且顶电极和底电极通过在保护膜中开口的接触孔与金属互连连接 用于保护电容器的表面。 在这种结构中，顶部电极或底部电极与集成电路的偏置线连接，另一个连接到接地线，使得可以减少外部发射而不必将电容器连接到外部。

公开(公告)号：US06447838B1

公开(公告)日：2002-09-10

申请号：US08543827

申请日：1995-10-16

申请人： Masamichi Azuma ,  Eiji Fujii ,  Yasuhiro Uemoto ,  Shinichiro Hayashi ,  Toru Nasu ,  Yoshihiro Shimada ,  Akihiro Matsuda ,  Tatsuo Otsuki ,  Michael C. Scott ,  Joseph D. Cuchiaro ,  Carlos A. Paz de Araujo

发明人： Masamichi Azuma ,  Eiji Fujii ,  Yasuhiro Uemoto ,  Shinichiro Hayashi ,  Toru Nasu ,  Yoshihiro Shimada ,  Akihiro Matsuda ,  Tatsuo Otsuki ,  Michael C. Scott ,  Joseph D. Cuchiaro ,  Carlos A. Paz de Araujo

IPC分类号： B05D512

CPC分类号： H01L28/75 ,  H01L21/28568 ,  H01L28/55 ,  H01L28/65 ,  Y10T29/42

摘要： A Ti/TiN adhesion/barrier layer is formed on a substrate and annealed. The anneal step is performed at a temperature within a good morphology range of 100° C. above a base barrier anneal temperature that depends on the thickness of said barrier layer. The base barrier anneal temperature is about 700° C. for a barrier thickness of about 1000 Å and about 800° C. for a barrier thickness of about 3000 Å. The barrier layer is 800 Å thick or thicker. A first electrode is formed, followed by a BST dielectric layer and a second electrode. A bottom electrode structure in which a barrier layer of TiN is sandwiched between two layers of platinum is also disclosed. The process and structures also produce good results with other capacitor dielectrics, including ferroelectrics such as strontium bismuth tantalate.

摘要翻译： 在基板上形成Ti / TiN粘合/阻挡层并退火。 退火步骤在取决于所述阻挡层的厚度的基本阻挡退火温度之上的100℃的良好形态范围内进行。 对于约3000的屏障厚度，对于约1000和约800℃的阻挡层厚度，基底阻挡退火温度为约700℃。 阻挡层厚度为800或更厚。 形成第一电极，随后是BST介电层和第二电极。 还公开了其中TiN阻挡层夹在两层铂之间的底部电极结构。 该工艺和结构也与其他电容器电介质（包括铁电锶钽酸锶）等产生良好的结果。

公开(公告)号：US5661319A

公开(公告)日：1997-08-26

申请号：US681093

申请日：1996-07-22

申请人： Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Tooru Nasu ,  Akihiro Matsuda ,  Tatsuo Ootsuki

发明人： Eiji Fujii ,  Yasuhiro Shimada ,  Yasuhiro Uemoto ,  Tooru Nasu ,  Akihiro Matsuda ,  Tatsuo Ootsuki

IPC分类号： H01L21/02 ,  H01L21/8242 ,  H01L27/108 ,  H01L27/12 ,  H01L29/786 ,  H01L29/92 ,  H01L29/94 ,  H01G7/06

CPC分类号： H01L29/94 ,  H01L27/10808 ,  H01L27/10852 ,  H01L27/1203 ,  H01L28/55 ,  H01L29/78654 ,  H01L28/75

摘要： This is a semiconductor device having an integrated circuit and a capacitor formed on a semiconductor substrate. The capacitor comprises a bottom electrode serving also as a part of a diffusion layer of the integrated circuit, a dielectric film being formed on the bottom electrode, and a top electrode of a conductive film being formed on the dielectric film. In particular, it is preferred to form the dielectric film in two layers of dielectric film, and compose the dielectric film contacting with the bottom electrode of a dielectric material in a composition possessing an excess of a metal element than the stoichiometric composition.

摘要翻译： 这是具有形成在半导体衬底上的集成电路和电容器的半导体器件。 电容器包括还用作集成电路的扩散层的一部分的底部电极，形成在底部电极上的电介质膜和形成在电介质膜上的导电膜的顶部电极。 特别地，优选将电介质膜形成为两层电介质膜，并且构成与具有比化学计量组成更多的金属元素的组成的与电介质材料的底电极接触的电介质膜。