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公开(公告)号:US20080169826A1
公开(公告)日:2008-07-17
申请号:US11622947
申请日:2007-01-12
申请人: James E. Bartling
发明人: James E. Bartling
CPC分类号: G01R27/2605 , G01R29/023 , G01R31/2884 , G01R31/3167 , G01R31/31725 , G01R31/31727 , G04F10/04 , G04F10/105
摘要: A time period of an event is determined by charging a known value capacitor from a constant current source during the event. The resultant voltage on the capacitor is proportional to the event time period and may be calculated from the resultant voltage and known capacitance value. Capacitance is measured by charging a capacitor from a constant current source during a known time period. The resultant voltage on the capacitor is proportional to the capacitance thereof and may be calculated from the resultant voltage and known time period. A long time period event may be measured by charging a first capacitor at the start of the event and a second capacitor at the end of the event, while counting clock times therebetween. Delay of an event is done by charging voltages on first and second capacitors at beginning and end of event, while comparing voltages thereon with a reference voltage.
摘要翻译: 在事件期间,通过从恒定电流源对已知值的电容器充电来确定事件的时间段。 电容器上的合成电压与事件时间周期成比例,可以根据合成电压和已知电容值计算。 在已知的时间段内通过从恒定电流源对电容器充电来测量电容。 电容器上的合成电压与其电容成比例,并且可以由所得到的电压和已知的时间周期来计算。 可以通过在事件开始时对第一电容器充电并且在事件结束时对第二电容器进行计数,同时计数它们之间的时钟时间来测量长时间段事件。 通过在事件开始和结束时在第一和第二电容器上充电电压,同时将其上的电压与参考电压进行事件的延迟。
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22.
公开(公告)号:US20240288508A1
公开(公告)日:2024-08-29
申请号:US18440073
申请日:2024-02-13
发明人: Hui Li , Zhehui Guo
CPC分类号: G01R31/52 , G01R19/0053 , G01R19/12 , G01R29/023 , G01R31/2642
摘要: A short-circuit protection and localization circuit for power devices includes a first subcircuit for detecting dv/dt of a power device at turn on, a second subcircuit for short-circuit fault localization and soft turn-off of the power device, the second subcircuit including a totem-pole driver having an upper switch and a lower switch, and a third subcircuit for detecting short-circuit faults based on the output (Vdip) of the first subcircuit and the output of an upper switch (Vp) of the second subcircuit. The first subcircuit outputs a voltage (Vdip) having a magnitude that is proportional to dv/dt of the power device. The third subcircuit outputs a signal (Vsto) to the second subcircuit that causes the second subcircuit to softly turn-off the power device. The second subcircuit outputs a voltage of the upper switch (Vp) and a fault-latching signal for short-circuit localization.
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公开(公告)号:US11743277B2
公开(公告)日:2023-08-29
申请号:US17825304
申请日:2022-05-26
发明人: Naga Raghavendra Surya Vara Prasad Koppisetti , Kevin Bradley D'Souza , Hamidreza Boostanimehr , Shankhanaad Mallick
IPC分类号: H04L9/40 , G06N3/08 , H04W12/128 , G01R29/02 , H04K3/00
CPC分类号: H04L63/1416 , G01R29/023 , G06N3/08 , H04K3/42 , H04W12/128
摘要: The present invention comprises a novel system and method to detect and estimate the time-frequency span of wireless signals present in a wideband RF spectrum. In preferred embodiments, the Faster RCNN deep learning architecture is used to detect the presence of wireless transmitters from the spectrogram images plotted by searching for rectangular shapes of any size, then localize the time and frequency information from the output of the FRCNN deep learning architecture.
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24.
公开(公告)号:US20180316289A1
公开(公告)日:2018-11-01
申请号:US15966020
申请日:2018-04-30
申请人: Nidec Corporation
发明人: Hideyuki TAKEMOTO
CPC分类号: H02P6/12 , G01R29/023 , G01R31/343 , H02P31/00
摘要: An identification method is an identification method for use in an identification apparatus that identifies types of brushless DC motors each including a circuit board on which a terminal for tachometer is mounted. The duty ratios of pulses outputted from the terminals for tachometer vary among multiple types of brushless DC motors. The identification method includes: supplying a power supply voltage from the identification apparatus to a brushless DC motor; inputting pulses outputted from the terminal for tachometer of the circuit board to the identification apparatus; obtaining the duty ratio of the pulses as a unique information piece of the brushless DC motor; and identifying the type of the brushless DC motor based on the unique information piece of the brushless DC motor.
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公开(公告)号:US09780769B2
公开(公告)日:2017-10-03
申请号:US15410011
申请日:2017-01-19
申请人: SK hynix Inc.
发明人: Da In Im , Young Suk Seo
CPC分类号: H03K5/1565 , G01R29/023 , H03K5/14 , H03K2005/00078
摘要: A duty cycle detector may include a rising clock detection unit enabled in response to a first control signal; a falling clock detection unit enabled in response to a second control signal with a different activation timing from the first control signal; and a comparison unit configured to compare an output signal of the rising clock detection unit to an output signal of the falling clock detection unit in response to a comparison enable signal, and output a duty cycle detection signal.
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公开(公告)号:US20170102420A1
公开(公告)日:2017-04-13
申请号:US14881774
申请日:2015-10-13
发明人: Keith A. Jenkins
CPC分类号: G01R29/023 , G01R29/0273 , H03K5/13 , H03K5/133 , H03K2005/00019
摘要: Methods and systems for measuring a duty cycle of a signal include applying a first branch of an input signal directly to a latch. A delay of a second branch of the input signal is incrementally increased, with the second branch being applied to the latch, until the latch changes its output. A delay, corresponding to the latch's changed output, is divided by a period of the input signal to determine a duty cycle of the input signal.
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公开(公告)号:US08917109B2
公开(公告)日:2014-12-23
申请号:US13855708
申请日:2013-04-03
发明人: Shi-Wen Chen , Yung-Hsiang Lin
CPC分类号: G01R29/023 , G01R31/2851 , G01R31/31725
摘要: A pulse width estimation method, applied between an integrated circuit and a circuit system for generating a reference pulse with a predetermined pulse width, includes steps for the following: generating an under-test pulse with an under-test pulse width by the integrated circuit; delivering the under-test and reference pulses to the integrated circuit for multiplying the under-test pulse width and the predetermined pulse width thereof by a timing gain and thereby obtaining a gained under-test pulse and a gained reference pulse, respectively; providing, by the integrated circuit, a count pulse for sampling the gained under-test pulse and the gained reference pulse and thereby obtaining a first count number and a second count number, respectively; and estimating the under-test pulse width by using the predetermined pulse width, the first count number and the second count number. A pulse width estimation device is also provided.
摘要翻译: 应用于集成电路和用于产生具有预定脉冲宽度的参考脉冲的电路系统之间的脉冲宽度估计方法包括以下步骤:通过集成电路产生具有欠测脉冲宽度的欠测脉冲; 将未测试和参考脉冲传送到集成电路,以将欠测脉冲宽度和其预定脉冲宽度乘以定时增益,从而分别获得获得的未测试脉冲和获得的参考脉冲; 通过集成电路提供用于对所获得的被测试脉冲和所获得的参考脉冲进行采样的计数脉冲,从而分别获得第一计数数和第二计数数; 以及通过使用预定脉冲宽度,第一计数和第二计数来估计欠测脉冲宽度。 还提供了一种脉冲宽度估计装置。
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公开(公告)号:US20140300385A1
公开(公告)日:2014-10-09
申请号:US13855708
申请日:2013-04-03
发明人: Shi-Wen CHEN , Yung-Hsiang LIN
CPC分类号: G01R29/023 , G01R31/2851 , G01R31/31725
摘要: A pulse width estimation method, applied between an integrated circuit and a circuit system for generating a reference pulse with a predetermined pulse width, includes steps for the following: generating an under-test pulse with an under-test pulse width by the integrated circuit; delivering the under-test and reference pulses to the integrated circuit for multiplying the under-test pulse width and the predetermined pulse width thereof by a timing gain and thereby obtaining a gained under-test pulse and a gained reference pulse, respectively; providing, by the integrated circuit, a count pulse for sampling the gained under-test pulse and the gained reference pulse and thereby obtaining a first count number and a second count number, respectively; and estimating the under-test pulse width by using the predetermined pulse width, the first count number and the second count number. A pulse width estimation device is also provided.
摘要翻译: 应用于集成电路和用于产生具有预定脉冲宽度的参考脉冲的电路系统之间的脉冲宽度估计方法包括以下步骤:通过集成电路产生具有欠测脉冲宽度的欠测脉冲; 将未测试和参考脉冲传送到集成电路,以将欠测脉冲宽度和其预定脉冲宽度乘以定时增益,从而分别获得获得的未测试脉冲和获得的参考脉冲; 通过集成电路提供用于对所获得的被测试脉冲和所获得的参考脉冲进行采样的计数脉冲,从而分别获得第一计数数和第二计数数; 以及通过使用预定脉冲宽度,第一计数和第二计数来估计欠测脉冲宽度。 还提供了一种脉冲宽度估计装置。
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29.
公开(公告)号:US20140218009A1
公开(公告)日:2014-08-07
申请号:US14241186
申请日:2011-08-29
申请人: David Canard , Matthieu Lecuyer
发明人: David Canard , Matthieu Lecuyer
IPC分类号: G01R22/00
CPC分类号: G01R22/00 , G01R29/023 , G04F10/005 , H03K3/0322
摘要: A device for measuring a duration of a level of an electrical signal, comprising first ring oscillator comprising inverting gates, whose electrical power supply is modulated by the electrical signal; second ring oscillator whose electrical power supply is not modulated by the electrical signal; first counting unit configured to count a total number of gate-to-gate transitions of a point of instability of the first ring oscillator, a point of instability being present at an inverting gate when a logic level at an input to the inverting gate is equal to a logic level at an output from the inverting gate; second counting unit configured to count a total number of gate-to-gate transitions of a point of instability of the second ring oscillator; and determining unit configured to determine a duration of a level of the electrical signal on a basis of values of the first and second counting units.
摘要翻译: 一种用于测量电信号电平持续时间的装置,包括第一环形振荡器,其包括反相门,其电源由电信号调制; 第二环形振荡器,其电源不被电信号调制; 第一计数单元,被配置为对第一环形振荡器的不稳定点的门到门转换的总数进行计数,当反相门的输入端的逻辑电平相等时,不稳定点存在于反相门 在反相门的输出处为逻辑电平; 第二计数单元,被配置为对第二环形振荡器的不稳定点的门到门转换的总数进行计数; 以及确定单元,被配置为基于所述第一和第二计数单元的值来确定所述电信号的电平的持续时间。
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公开(公告)号:US20130249615A1
公开(公告)日:2013-09-26
申请号:US13616606
申请日:2012-09-14
申请人: Kelvin Yi-Tse LAI , Chen-Yi LEE
发明人: Kelvin Yi-Tse LAI , Chen-Yi LEE
IPC分类号: H03K3/017
CPC分类号: G01R23/15 , G01D5/243 , G01P15/125 , G01P21/00 , G01R23/10 , G01R25/08 , G01R29/023 , G01R29/027
摘要: A digital sensing apparatus includes a sensing unit capable of providing a sensing response associated with an environmental parameter, and a digital readout module including a reading unit for generating a pulse signal having a pulse width as sociated with the sensing response, and a converting unit. The converting unit includes a clock signal generator for generating a variable-frequency clock signal, and a counter operable to count a width value of the pulse width of the pulse signal using the clock signal, so as to generate a digital sensing code. The frequency of the clock signal from the clock signal generator is adjustable to adjust resolution of the width value of the pulse width of the pulse signal.
摘要翻译: 数字感测装置包括能够提供与环境参数相关联的感测响应的感测单元和包括用于产生具有与感测响应相关的脉冲宽度的脉冲信号的读取单元的数字读出模块和转换单元。 转换单元包括用于产生可变频率时钟信号的时钟信号发生器和可用于使用时钟信号对脉冲信号的脉冲宽度的宽度值进行计数的计数器,以便产生数字感测代码。 来自时钟信号发生器的时钟信号的频率可调,以调节脉冲信号脉冲宽度宽度值的分辨率。
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