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公开(公告)号：US20090287883A1
公开(公告)日：2009-11-19
申请号：US12119506
申请日：2008-05-13
Applicant: Srinivas Gadde
Inventor： Srinivas Gadde
IPC: G06F12/00
Abstract: During the last 75 years Analog to Digital converters revolutionized the signal processing industry. As transistor sizes reduced, higher resolution of bits is achieved. But FLASH and other full blown faster ADC implementations always consumed relatively higher power. As the analog signal comes into ADC frontend, conversion is initiated from the beginning. ADC conversion process is a highly mathematical number system problem, especially FLASH ADCs are. With faster, low power, and partitioned ADCS, better solutions can be built in so many vast expanding signal processing fields. It is time to come up with logical ADCS instead of brute force, start from the beginning conversion for every sample of analog signal. When the signal does not change abruptly, there is room for applying CACHE principles as it is done in this invention! The approach is to use a smaller ADC for full blown start from the beginning conversions and store it in upfront signal path as CACHED value. Then start using that Cached value set. There must be a balance between number of Cache entries, consumed power, and backend full blown ADC. It is obvious, backend ADC is rarely engaged in conversion when there are too many cache hits, which is desirable.
Abstract translation: 在过去75年中，模拟数字转换器彻底改变了信号处理行业。 随着晶体管尺寸的减小，可实现更高分辨率的位。 但是，FLASH和其他完全更快的ADC实现总是消耗相对较高的功率。 随着模拟信号进入ADC前端，从一开始就开始转换。 ADC转换过程是一个高度数学的数字系统问题，特别是FLASH ADC。 通过更快，低功耗和分区的ADCS，可以在诸多广泛扩展的信号处理领域内建立更好的解决方案。 现在是时候提出逻辑ADCS而不是强力，从每个模拟信号样本的开始转换开始。 当信号不突然变化时，应用CACHE原理就像在本发明中所做的那样有空间！ 该方法是从开始转换开始使用较小的ADC进行完整启动，并将其作为CACHED值存储在前置信号路径中。 然后开始使用该缓存值集。 缓存条目数，消耗功率和后端全功能ADC之间必须有一个平衡。 很显然，当缓存命中太多时，后端ADC很少进行转换，这是可取的。
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公开(公告)号：US07253755B1
公开(公告)日：2007-08-07
申请号：US11357553
申请日：2006-02-16
Applicant: Bruce A. Fette
Inventor： Bruce A. Fette
IPC: H03M1/10
CPC classification number: H03M1/185 , H03M1/0658 , H03M1/208
Abstract: An analog-to-digital converter (“ADC”) architecture as described herein utilizes a digital signal processor having suitably configured waveform prediction logic that can predict expected types of input signals. The ADC architecture subtracts the predictable signal components from the analog input signal prior to the analog-to-digital conversion, which extends the dynamic range of the ADC employed by the ADC architecture. In practice, the ADC architecture can subtract predictable strong signal components from an analog input signal such that the ADC can apply its available dynamic range to the remaining weak signal components.
Abstract translation: 如本文所述的模数转换器（“ADC”）架构利用具有适当配置的波形预测逻辑的数字信号处理器，其可以预测输入信号的预期类型。 ADC架构在模数转换之前从模拟输入信号中减去可预测的信号分量，这扩展了ADC架构采用的ADC的动态范围。 实际上，ADC架构可以从模拟输入信号中减去可预测的强信号分量，使得ADC可以将其可用的动态范围应用于剩余的弱信号分量。
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公开(公告)号：US06587064B2
公开(公告)日：2003-07-01
申请号：US09897325
申请日：2001-07-02
Applicant: Matthew Cushman , Aleksander Ignjatovic
Inventor： Matthew Cushman , Aleksander Ignjatovic
IPC: H03M112
CPC classification number: H03M1/0631 , G06F17/10 , H03H17/06 , H03M1/0881 , H03M1/207 , H03M1/208
Abstract: A signal processor and method of signal processing is disclosed. The signal processor includes a differentiator and an extrapolator coupled to the differentiator. The differentiator is configured to receive an input signal and to generate a vector. The input signal is band-limited. The vector includes at least one chromatic derivative. The extrapolator is coupled to the differentiator and is configured to generate an output signal.
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公开(公告)号：US20030006921A1
公开(公告)日：2003-01-09
申请号：US10141394
申请日：2002-05-08
Inventor： Philip S. Stetson , Teddy D. Thomas
IPC: H03M003/00
Abstract: A data acquisition system uses an analog-to-digital converter (ADC) that includes a prediction feedback element. Using the computing power of a digital signal processor, the system predicts the next sample of the target signal based on pre-defined rules and previous samples. This digital prediction is converted to an analog signal using a digital-to-analog converter (DAC). An analog error summer compares the predicted signal with the target signal and creates an error signal. The digital signal processor uses the prediction error to more accurately predict the next sample. A negative feedback loop is thus formed by this system to drive the prediction error toward zero. Operating on the relatively small error signal in the forward and feedback paths enhances the conversion performance and data transfer efficiency.
Abstract translation: 数据采集系统使用包含预测反馈元件的模数转换器（ADC）。 使用数字信号处理器的计算能力，系统基于预定义的规则和先前的采样来预测目标信号的下一个采样。 该数字预测使用数模转换器（DAC）转换为模拟信号。 模拟误差加法器将预测信号与目标信号进行比较，并产生误差信号。 数字信号处理器使用预测误差来更准确地预测下一个采样。 因此，该系统形成负反馈回路以将预测误差驱动到零。 在正向和反馈路径中操作相对较小的误差信号可以提高转换性能和数据传输效率。
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公开(公告)号：US06452519B1
公开(公告)日：2002-09-17
申请号：US09432502
申请日：1999-11-02
Applicant: Eric J. Swanson
Inventor： Eric J. Swanson
IPC: H03M110
Abstract: A successive approximation ADC is provided. Contacts to a resistor string may be placed outside of the current path of the resistor string to provide a highly stable resistor string having a very low temperature drift. The resistor string may be utilized to calibrate a successive approximation ADC. The resistor string may also be a portion of a resistor array of a resistor and capacitor array ADC. The resistor string may be calibrated with a calibration ADC having a resolution greater than the resistor string. The calibration ADC may be a delta sigma ADC.
Abstract translation: 提供逐次逼近ADC。 与电阻串的接触可以放置在电阻串的电流路径之外，以提供具有非常低的温度漂移的高度稳定的电阻串。 电阻串可用于校准逐次逼近ADC。 电阻器串还可以是电阻器和电容器阵列ADC的电阻器阵列的一部分。 可以使用具有大于电阻串的分辨率的校准ADC校准电阻器串。 校准ADC可以是ΔigmaADC。
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Patent Agency Ranking
公开(公告)号：US6031481A
公开(公告)日：2000-02-29
申请号：US83277
申请日：1998-05-22
Applicant: Peter Graham Craven
Inventor： Peter Graham Craven
CPC classification number: H03M1/1038 , H03M1/208 , H03M3/506 , H03M1/504 , H03M1/822
Abstract: A signal convertor comprising a pulse modulator. and means for modifying the signal input thereto in dependence upon the error in previous values or the output thereof, to reduce the effects of said error within a desired signal band.
Abstract translation: 一种包括脉冲调制器的信号转换器。 以及用于根据先前值或其输出中的误差修改输入到其中的信号的装置，以减少所需信号频带内的所述误差的影响。
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27.发明授权Hybrid analog-to-digital convertor for low power applications, such as use in an implantable medical device 失效用于低功率应用的混合模数转换器，例如在可植入医疗设备中的使用
公开(公告)号：US5543795A
公开(公告)日：1996-08-06
申请号：US460139
申请日：1995-06-02
Applicant: Kenneth W. Fernald
Inventor： Kenneth W. Fernald
Abstract: A method and apparatus is disclosed for an analog-to-digital converter (ADC) to minimize power consumption. The ADC of the present invention minimizes the number of clock cycles required to determine the correct digital code for a particular sample point on an electrogram signal, thus making it possible to turn off some or all of the ADC logic during idle periods. The ADC includes prediction logic that provides a starting point for subsequent digital code representations of the electrogram signal. The prediction logic receives recent code conversions values to predict a current digital code value. This predicted digital code is converted to an analog value and compared with the actual electrogram signal. Next, the ADC adds (or subtracts) a constant value (C) to (or from) the predicted code and compares the result to the electrogram signal. If the ADC determines that the predicted value is within the constant value (C) of the correct digital code, then the ADC counts in the proper direction until the comparator changes output state. If the ADC determines that the predicted value is not within the constant value (C), then the successive approximation logic is enabled and used to find the correct code.
Abstract translation: 公开了一种用于模数转换器（ADC）以最小化功耗的方法和装置。 本发明的ADC使得在电描记图信号上确定特定采样点的正确数字码所需的时钟周期数量最小化，从而使得可以在空闲周期期间关闭一些或全部ADC逻辑。 ADC包括预测逻辑，其提供电描记图信号的后续数字代码表示的起始点。 预测逻辑接收最近的代码转换值以预测当前的数字代码值。 将该预测数字码转换为模拟值并与实际电描记信号进行比较。 接下来，ADC将（或）减去（或从）预测代码的常数值（或减去），并将结果与电描记信号进行比较。 如果ADC确定预测值在正确的数字代码的常数值（C）内，则ADC在正确的方向计数，直到比较器改变输出状态。 如果ADC确定预测值不在恒定值（C）内，则逐次逼近逻辑被使能并用于找到正确的代码。
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公开(公告)号：US5206647A
公开(公告)日：1993-04-27
申请号：US722763
申请日：1991-06-27
Applicant: Wade J. Stone
Inventor： Wade J. Stone
Abstract: An automatically gain controlled multiple approximation analog to digital converter including a gain controlled amplifier responsive to the difference between an analog input signal and an analog version of a digital approximation of the analog input signal for providing a gain controlled analog residue signal, a quantizer for converting the gain controlled analog residue signal to a gain controlled digital residue signal, a digital divide circuit for dividing the gain controlled digital residue signal by a factor representative of the gain contained therein to provide a restored digital residue signal representative of the analog residue signal before it was amplified by the gain controlled amplifier, and a summing circuit for adding the restored digital residue signal and the digital approximation to provide the output of the gain controlled analog to digital converter. The gain controlled amplifier and the divide circuit are controlled by a gain control circuit that tends to maintain the output of the quantizer between first and second thresholds. Circuitry for providing the digital approximation of the analog input signal can include a linear predictor, or a sample and hold circuit and a coarse quantizer, for example.
Abstract translation: 一种自动增益控制的多重近似模数转换器，包括响应于模拟输入信号和模拟输入信号的数字近似的模拟版本之间的差异的增益控制放大器，用于提供增益控制的模拟残余信号，用于转换的量化器 增益控制的模拟残留信号到增益控制的数字残留信号，数字除法电路，用于将增益受控的数字残留信号除以表示其中所含的增益的因子，以提供代表其前的模拟残留信号的恢复的数字残留信号 由增益控制放大器放大，以及用于将恢复的数字残差信号和数字近似相加的求和电路，以提供增益受控模数转换器的输出。 增益控制放大器和除法电路由增益控制电路控制，该增益控制电路倾向于将量化器的输出保持在第一和第二阈值之间。 用于提供模拟输入信号的数字近似的电路可以包括例如线性预测器或采样保持电路和粗略量化器。
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公开(公告)号：US4862168A
公开(公告)日：1989-08-29
申请号：US27747
申请日：1987-03-19
Applicant: Terry D. Beard
Inventor： Terry D. Beard
CPC classification number: H03M1/208 , H04B14/046
Abstract: Apparatus and an associated method are described for encoding an analog signal to a digital representation thereof and then decoding the same to reconstruct the original analog signal with reduced quantization noise and error. The analog signal is first adaptively pre-emphasized. A series of samples of the pre-emphasized signal are then obtained and encoded to create a series of digital representations which have a lower order resolution than the samples. The difference between each sample and its corresponding lower resolution digital representation is obtained and combined with the next sample. Decoding of the combined signals takes place in a complementary manner to create an approximate analog output signal, which is then de-emphasized in a manner complementary to the pre-emphasis to produce an analog output signal closely approximating the original analog signal. In a fully digital implementation the samples are converted to a digital format with a higher order resolution; the digital representations are obtained from the digitized samples, and the difference measurements are combined with the samples in their digital format. In a hybrid digital/analog implementation the difference is combined with the analog signal prior to sampling.
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公开(公告)号：US08009072B2
公开(公告)日：2011-08-30
申请号：US12642780
申请日：2009-12-19
Applicant: Kenneth Wayne Rigby , Robert Gideon Wodnicki , Krishnakumar Sundaresan , Naresh Kesavan Rao
Inventor： Kenneth Wayne Rigby , Robert Gideon Wodnicki , Krishnakumar Sundaresan , Naresh Kesavan Rao
Abstract: Predictive Analog-to-Digital Converter system in one embodiment includes a sampling section producing a sampled analog input signal with a first summer section combining the sampled analog input signal and an analog prediction signal to produce an analog prediction error signal. There is at least one error analog-to-digital convertor digitizing the analog prediction error signal, wherein a digital error signal output from the error analog-to-digital convertor is one of a full bitwidth error signal during an over-range condition else a lower bitwidth error signal. A second summer is coupled to the digital error signal output and a digital prediction signal, and generates a full bitwidth digital output signal. A feedback section is coupled to the digital output signal and providing the digital prediction signal and the analog prediction signal.
Abstract translation: 在一个实施例中，预测模数转换器系统包括产生采样模拟输入信号的采样部分，其中组合采样的模拟输入信号和模拟预测信号的第一加法部分产生模拟预测误差信号。 至少有一个误差模拟数字转换器将模拟预测误差信号数字化，其中从误差模数转换器输出的数字误差信号是在超范围条件期间的完全位宽误差信号之一，否则 较低的位宽错误信号。 第二个夏天耦合到数字误差信号输出和数字预测信号，并产生完整的位宽数字输出信号。 反馈部分耦合到数字输出信号并提供数字预测信号和模拟预测信号。
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