公开(公告)号：US4872206A

公开(公告)日：1989-10-03

申请号：US175994

申请日：1988-03-31

Applicant: Rinaldo Graziadei ,  Giorgio Rossi

Inventor： Rinaldo Graziadei ,  Giorgio Rossi

IPC: H03G3/20 ,  H03G3/34 ,  H04B1/10

CPC classification number: H03G3/3068 ,  H03G3/348

Abstract: A mixer dynamic control (MDC) system for an AM superheterodyne receiver prevents saturation of the mixer stage caused by out-of-tune signals much more effectively than a so-called wide band RF-AGC system of the known art. The system contemplates detecting the converted IF signal before the band filter, amplifying the detected signal, extracting the dc component thereof and summing such a dc component to a dc control signal generated by a narrow band AGC and applying such a sum signal in lieu of the sole narrow band AGC system's control signal.

公开(公告)号：US4868136A

公开(公告)日：1989-09-19

申请号：US178822

申请日：1988-03-24

Applicant: Andrea Ravaglia

Inventor： Andrea Ravaglia

IPC: H01L21/76 ,  H01L21/308 ,  H01L21/32 ,  H01L21/762

CPC classification number: H01L21/76221 ,  H01L21/308 ,  H01L21/32 ,  Y10S438/975

Abstract: Two thin wedges of oxide extending along and from the boundaries of the field oxide layer without solution of continuity inside the substrate for a depth such as to separate dielectrically the region of silicon, present underneath the field oxide layer, having a doping level higher than the doping level of the bulk of the substrate and the regions of oppositely doped silicon in a MOS device allow obtaining simultaneously a high threshold voltage of the parasitic transistor, a high junction breakdown voltage and an excellent immunity to "Reach-through" between the depletion regions of uncorrelated junctions together with a reduced capacitance of the junctions and an improved geometry. Such wedges of oxide are obtained by means of deep anisotropic etch of silicon through a suitably exposed area, for example by means of an overetch of the nitride used for growing the thick oxide layer according to the known technique and by the subsequent filling of the deep etch with thermally grown silicon oxide.

Abstract translation: 两个薄的氧化物沿着场氧化物层的边界延伸并且没有在衬底内部的连续性的溶液的深度，以便介电地存在位于场氧化物层下面的硅的区域，该区域的掺杂水平高于 衬底的大部分的掺杂水平和MOS器件中相反掺杂的硅的区域允许同时获得寄生晶体管的高阈值电压，高结击穿电压和对耗尽区域之间的“到达”的优异抗扰性 不相关的连接点以及连接点的电容减小以及改进的几何形状。 氧化物的这种楔形是通过在适当暴露的区域的硅进行深度各向异性蚀刻而获得的，例如通过用于根据已知技术生长厚氧化物层的氮化物的过蚀刻以及随后的深度填充 用热生长的氧化硅蚀刻。

公开(公告)号：US4827207A

公开(公告)日：1989-05-02

申请号：US131351

申请日：1987-12-04

Applicant: Davide Chieli

Inventor： Davide Chieli

IPC: G01R19/00 ,  G01R19/32 ,  G05F3/16

CPC classification number: G01R19/0092 ,  G01R19/32

Abstract: A circuit for the linear measurement of a current flowing through a load which comprises a current sensor consisting of a resistor, and a first driver transistor connected to the load and a second transistor connected to the resistor, both transistors being field effect transistors interconnected into a current mirror configuration, which includes an operational amplifier having its inputs respectively connected to the drain electrodes of the first and second transistors to regulate the drain-source voltage of the transistors and enable linear measurement of the load current irrespective of the operating temperature.

公开(公告)号：US06973056B2

公开(公告)日：2005-12-06

申请号：US09901460

申请日：2001-07-09

Applicant: Maurizio Tonella

Inventor： Maurizio Tonella

IPC: H04H20/16 ,  H04H20/34 ,  H04H20/42 ,  H04J15/00 ,  H04H1/00

CPC classification number: H04H20/16 ,  H04H20/34 ,  H04H20/42 ,  H04H60/06 ,  H04H2201/13

Abstract: In transmission systems whereby data packets of a single type and having a fixed structure are used to transmit a given type of information, the invention optimizes the transmission by utilizing data packets of the same type to transmit information of different types and by differentiating the information transmitted in such packets by the rate of re-transmission thereof. In an application of the invention to RDS systems, the block PS is used to transmit both the program service name, as usual, and the radio text, and arrangements are made for the rate of re-transmission of the service name to be high and that of the text to be low, or possibly zero.

Abstract translation: 在使用具有固定结构的单一类型的数据分组来发送给定类型的信息的传输系统中，本发明通过利用相同类型的数据分组来优化传输不同类型的信息并通过区分发送的信息来优化传输 在这样的分组中通过其重传速率。 在将本发明应用于RDS系统时，块PS用于传送程序服务名称和通常的无线电文本，并且将服务名称的重传速率设置为高， 文本中的文本为低，或可能为零。

公开(公告)号：US6150844A

公开(公告)日：2000-11-21

申请号：US898811

申请日：1997-07-23

Applicant: Giovanni Campardo ,  Stefano Zanardi ,  Carla Golla

Inventor： Giovanni Campardo ,  Stefano Zanardi ,  Carla Golla

IPC: H03K19/003 ,  H03K19/0175 ,  H03K19/02 ,  H03L5/00

CPC classification number: H03K19/00315 ,  H03K19/00384

Abstract: An output stage for electronic circuits with high voltage tolerance and of the type comprising an output buffer made up of a complementary transistor pair comprising a P-channel MOS pull-up transistor and an N-channel MOS pull-down transistor. The transistors are connected together to make up an output terminal of the stage which comprises in addition a switch having an input connected to the output terminal of the stage and an output connected to the control terminal of the pull-up transistor to drive said control terminal in a state of extinction of the output buffer.

Abstract translation: 一种用于具有高电压容限的电子电路的输出级，其类型包括由包括P沟道MOS上拉晶体管和N沟道MOS下拉晶体管的互补晶体管对构成的输出缓冲器。 晶体管连接在一起以构成电平的输出端，另外还包括具有连接到电平的输出端的输入的开关和连接到上拉晶体管的控制端的输出，以驱动所述控制端 处于输出缓冲区的灭绝状态。

公开(公告)号：US6144588A

公开(公告)日：2000-11-07

申请号：US150802

申请日：1998-09-10

Applicant: Federico Pio ,  Bruno Vajana ,  Paola Paruzzi

Inventor： Federico Pio ,  Bruno Vajana ,  Paola Paruzzi

IPC: G11C17/00 ,  G05F3/24 ,  G11C5/14 ,  G11C11/56 ,  G11C16/06 ,  G11C7/00

CPC classification number: G11C5/147 ,  G11C11/5621 ,  G11C16/30

Abstract: A generator for generating a plurality of predetermined voltage values for non-volatile memories. The generator includes an input node, a plurality of circuit branches, and an output terminal. The input node has a reference voltage and is connected to at least one of the circuit branches. Each of the circuit branches has at least one active element to selectively and independently turn on and turn off each of the circuit branches by a voltage applied to a control terminal of each active element. The output terminal connects to at least one of the circuit branches and supplies a voltage level based on the reference voltage and a voltage drop across each activated circuit branch. Alternatively, the output terminal supplies a floating voltage level in the event of one or more of the active elements along each of the circuit branches being turned off so as to isolate the input node from the output terminal.

Abstract translation: 一种用于为非易失性存储器产生多个预定电压值的发生器。 发生器包括输入节点，多个电路分支和输出端子。 输入节点具有参考电压并且连接到至少一个电路分支。 每个电路分支具有至少一个有源元件，以通过施加到每个有源元件的控制端子的电压来选择性地和独立地接通和关断每个电路分支。 输出端子连接到至少一个电路分支，并且基于参考电压提供电压电平，并且在每个激活的电路分支之间提供电压降。 或者，输出端子在沿着每个电路分支的一个或多个有源元件断开的情况下提供浮动电压电平，以将输入节点与输出端子隔离。

公开(公告)号：US6133766A

公开(公告)日：2000-10-17

申请号：US087549

申请日：1998-05-29

Applicant: Francesco Pulvirenti ,  Patrizia Milazzo

Inventor： Francesco Pulvirenti ,  Patrizia Milazzo

IPC: H02J7/00 ,  H03K4/00 ,  H03K17/16 ,  H02M11/00

CPC classification number: H02J7/0052 ,  H03K17/163 ,  H03K4/00

Abstract: A battery-charging electronic device comprises a current generator adapted to supply a charging current to a battery and a controlled current edge switch having a circuit for controlling the switching edges of current being flowed through a power transistor. The switching edge control circuit comprises a controlled edge variable voltage generator for generating a controlled edge voltage signal, a voltage/current converter for converting the voltage signal to a controlled edge current signal, and a driver circuit for the power transistor being input the controlled edge current signal to mirror, onto the power transistor, an output current which is proportional to the controlled edge current signal.

Abstract translation: 电池充电电子器件包括适于向电池提供充电电流的电流发生器和具有用于控制流过功率晶体管的电流的开关边缘的电路的受控电流边缘开关。 开关边缘控制电路包括用于产生受控边沿电压信号的受控边缘可变电压发生器，用于将电压信号转换为受控边沿电流信号的电压/电流转换器，以及功率晶体管的驱动电路，输入受控边缘 电流信号反射到功率晶体管上，与受控边沿电流信号成比例的输出电流。

公开(公告)号：US6131466A

公开(公告)日：2000-10-17

申请号：US903168

申请日：1997-07-30

Applicant: Benedetto Vigna ,  Paolo Ferrari ,  Flavio Villa

Inventor： Benedetto Vigna ,  Paolo Ferrari ,  Flavio Villa

IPC: G01L9/06 ,  B81B3/00 ,  B81C1/00 ,  G01L9/00 ,  H01L29/84

CPC classification number: G01L9/0042 ,  G01L9/0055

Abstract: The pressure sensor is integrated in an SOI (Silicon-on-Insulator) substrate using the insulating layer as a sacrificial layer, which is partly removed by chemical etching to form the diaphragm. To fabricate the sensor, after forming the piezoresistive elements and the electronic components integrated in the same chip, trenches are formed in the upper wafer of the substrate and extending from the surface to the layer of insulating material; the layer of insulating material is chemically etched through the trenches to form an opening beneath the diaphragm; and a dielectric layer is deposited to outwardly close the trenches and the opening. Thus, the process is greatly simplified, and numerous packaging problems eliminated.

Abstract translation: 压力传感器集成在使用绝缘层作为牺牲层的SOI（绝缘体上硅）衬底中，其通过化学蚀刻部分去除以形成隔膜。 为了制造传感器，在形成压电元件和集成在同一芯片中的电子部件之后，在基板的上晶片中形成沟槽，并从表面延伸到绝缘材料层; 绝缘材料层通过沟槽进行化学蚀刻，以形成隔膜下面的开口; 并且沉积介电层以向外关闭沟槽和开口。 因此，该过程被大大简化，并且消除了许多封装问题。

公开(公告)号：US6124821A

公开(公告)日：2000-09-26

申请号：US119901

申请日：1998-07-21

Applicant: Saverio Pezzini ,  Paolo Brasca

Inventor： Saverio Pezzini ,  Paolo Brasca

IPC: H03M1/06 ,  H03M1/80 ,  H03M1/38

CPC classification number: H03M1/0648 ,  H03M1/806

Abstract: A capacitive array particularly for converters, comprising a plurality of unitary capacitors, the number of the unitary capacitors being equal to 2.sup.n, where n is the number of bits of the binary code required in output, the unitary capacitors being mutually connectable so as to obtain capacitors in which the capacitance ratio between one capacitor and the adjacent parallel-connected capacitor is equal to a factor of two. The invention is that the factor-of-two capacitance ratio of adjacent capacitors is achieved by mutually diagonally connecting in parallel the unitary-capacitance capacitors of the capacitive array in a preset number according to the capacitance value to be obtained.

Abstract translation: 特别是用于转换器的电容阵列，包括多个单体电容器，单体电容器的数量等于2n，其中n是输出中所需的二进制码的位数，单位电容器是可互相连接的，从而获得 其中一个电容器和相邻的并联电容器之间的电容比等于二的电容器。 本发明是相邻的电容器的二次电容比通过根据要获得的电容值以预先设定的数值并联并联电容阵列的单电容电容器来实现的。

公开(公告)号：US6119529A

公开(公告)日：2000-09-19

申请号：US978335

申请日：1997-11-25

Applicant: Francesco Di Marco ,  Matteo Lo Presti ,  Salvatore Graziani ,  Salvatore Baglio

Inventor： Francesco Di Marco ,  Matteo Lo Presti ,  Salvatore Graziani ,  Salvatore Baglio

IPC: G01F1/696 ,  G01F1/46 ,  G01F1/68

CPC classification number: G01F1/696 ,  G01F1/6965

Abstract: A fluid flow meter is of the type including a heated probe sensor of known electric resistance dipped into or swept by a fluid stream having a predetermined velocity. The sensor is capable of converting each flow velocity value to a voltage value, and is connected to a processor operating using fuzzy logic for producing the flow measurements. The sensor may be an NTC thermistor. The thermistor may be powered from a current generator, and the processor may include a neural network. The sensor may include at least two discrete thermistors, one being a hot thermistor and the other being a cold thermistor.

Abstract translation: 流体流量计的类型包括被具有预定速度的流体流浸入或扫过的已知电阻的加热探针传感器。 传感器能够将每个流速值转换为电压值，并且连接到使用模糊逻辑运行的处理器来产生流量测量值。 传感器可能是NTC热敏电阻。 热敏电阻可以由电流发生器供电，并且处理器可以包括神经网络。 传感器可以包括至少两个分立的热敏电阻，一个是热的热敏电阻，另一个是冷的热敏电阻。