公开(公告)号：US08681281B2

公开(公告)日：2014-03-25

申请号：US12560570

申请日：2009-09-16

Applicant: Hsuan-Chen Liu ,  Sung-Chun Lin ,  Kun Cheng Lee ,  Chia Hua Yu

Inventor： Hsuan-Chen Liu ,  Sung-Chun Lin ,  Kun Cheng Lee ,  Chia Hua Yu

IPC: G02F1/1333 ,  G02F1/1345

CPC classification number: G02F1/13452 ,  G02F1/13454 ,  G02F2001/133334

Abstract: A grounding structure for a display device is provided. The grounding structure includes a substrate, a first connecting pad, a second connecting pad, a connecting structure and a grounding line. The first and second connecting pads are disposed on the substrate. The connecting structure electrically connects the first and second connecting pads. The first grounding line is disposed on the substrate, and has a length larger than two thirds of the projected length of the connecting structure on the surface of the substrate.

Abstract translation: 提供了一种用于显示装置的接地结构。 接地结构包括基板，第一连接焊盘，第二连接焊盘，连接结构和接地线。 第一和第二连接焊盘设置在基板上。 连接结构电连接第一和第二连接焊盘。 第一接地线设置在基板上，并且其长度大于基板表面上的连接结构的突出长度的三分之二。

公开(公告)号：US20140021560A1

公开(公告)日：2014-01-23

申请号：US13551262

申请日：2012-07-17

Applicant: Ru-Yi Su ,  Fu-Chih Yang ,  Chun Lin Tsai ,  Ker Hsiao Huo ,  Jen-Hao Yeh ,  Chun-Wei Hsu

Inventor： Ru-Yi Su ,  Fu-Chih Yang ,  Chun Lin Tsai ,  Ker Hsiao Huo ,  Jen-Hao Yeh ,  Chun-Wei Hsu

IPC: H01L27/06 ,  H01L21/8234

CPC classification number: H01L27/0629

Abstract: Provided is a high voltage semiconductor device. The high voltage semiconductor device includes a transistor having a gate, a source, and a drain. The source and the drain are formed in a doped substrate and are separated by a drift region of the substrate. The gate is formed over the drift region and between the source and the drain. The transistor is configured to handle high voltage conditions that are at least a few hundred volts. The high voltage semiconductor device includes a dielectric structure formed between the source and the drain of the transistor. The dielectric structure protrudes into and out of the substrate. Different parts of the dielectric structure have uneven thicknesses. The high voltage semiconductor device includes a resistor formed over the dielectric structure. The resistor has a plurality of winding segments that are substantially evenly spaced apart.

Abstract translation: 提供高压半导体器件。 高电压半导体器件包括具有栅极，源极和漏极的晶体管。 源极和漏极形成在掺杂衬底中并且由衬底的漂移区域分离。 栅极形成在漂移区域上以及源极和漏极之间。 晶体管被配置为处理至少几百伏特的高电压条件。 高电压半导体器件包括在晶体管的源极和漏极之间形成的电介质结构。 电介质结构突出进出基板。 电介质结构的不同部分具有不均匀的厚度。 高电压半导体器件包括在电介质结构上形成的电阻器。 电阻器具有大致均匀间隔开的多个绕组段。

公开(公告)号：US08629026B2

公开(公告)日：2014-01-14

申请号：US12944959

申请日：2010-11-12

Applicant: Ru-Yi Su ,  Fu-Chih Yang ,  Chun Lin Tsai ,  Chih-Chang Cheng ,  Ruey-Hsin Liu

Inventor： Ru-Yi Su ,  Fu-Chih Yang ,  Chun Lin Tsai ,  Chih-Chang Cheng ,  Ruey-Hsin Liu

IPC: H01L21/22 ,  H01L21/331 ,  H01L21/336 ,  H01L21/38 ,  H01L21/425

CPC classification number: H01L29/7816 ,  H01L21/2253 ,  H01L21/26513 ,  H01L29/0634 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/105 ,  H01L29/42368 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/66795 ,  H01L29/7835

Abstract: The present disclosure provides a method for fabricating a high-voltage semiconductor device. The method includes designating first, second, and third regions in a substrate. The first and second regions are regions where a source and a drain of the semiconductor device will be formed, respectively. The third region separates the first and second regions. The method further includes forming a slotted implant mask layer at least partially over the third region. The method also includes implanting dopants into the first, second, and third regions. The slotted implant mask layer protects portions of the third region therebelow during the implanting. The method further includes annealing the substrate in a manner to cause diffusion of the dopants in the third region.

Abstract translation: 本公开提供了一种用于制造高压半导体器件的方法。 该方法包括在衬底中指定第一，第二和第三区域。 第一和第二区域分别是将形成半导体器件的源极和漏极的区域。 第三区域分隔第一和第二区域。 该方法还包括至少部分地在第三区域上形成开槽的注入掩模层。 该方法还包括将掺杂剂注入到第一，第二和第三区域中。 开槽植入物掩模层在植入期间保护其下方的第三区域的部分。 该方法还包括以使得掺杂剂在第三区域中扩散的方式退火衬底。

公开(公告)号：US08600035B2

公开(公告)日：2013-12-03

申请号：US12547370

申请日：2009-08-25

Applicant: Jon R. Jay ,  Jeremy A. Dashe ,  Brock A. Judkins ,  Donald L. Kaufman ,  Yung-Chun Lin ,  Raymond P. Sharpe, Jr. ,  Joseph D. Sullivan ,  Thomas J. Weiland ,  Tauseef Kidwai

Inventor： Jon R. Jay ,  Jeremy A. Dashe ,  Brock A. Judkins ,  Donald L. Kaufman ,  Yung-Chun Lin ,  Raymond P. Sharpe, Jr. ,  Joseph D. Sullivan ,  Thomas J. Weiland ,  Tauseef Kidwai

IPC: H04M3/00

CPC classification number: G06Q30/016 ,  G06Q10/063114 ,  H04M3/42365 ,  H04M3/51 ,  H04M2201/38 ,  H04M2203/2011

Abstract: A user of a personal computing device may identify an item of interest displayed in a user interface provided by a network-based service and would like to obtain more information. The user may submit one or more electronic contact requests to a contact service in communication with a contact distribution system in order to obtain more information. The contact distribution system determines accurate, real-time availability of service agents and enables communications between the customer and an agent to be established in accordance with user contact information provided by the user.

公开(公告)号：US08581204B2

公开(公告)日：2013-11-12

申请号：US13235088

申请日：2011-09-16

Applicant: Chun-Lin Chang ,  Chih-Hong Hwang ,  Nai-Han Cheng ,  Chi-Ming Yang ,  Chin-Hsiang Lin

Inventor： Chun-Lin Chang ,  Chih-Hong Hwang ,  Nai-Han Cheng ,  Chi-Ming Yang ,  Chin-Hsiang Lin

IPC: G01T1/16

CPC classification number: H01L22/10 ,  H01J37/244 ,  H01J37/3171 ,  H01J2237/24542 ,  H01J2237/30455 ,  H01J2237/31703 ,  H01L21/265

Abstract: An apparatus for monitoring an ion distribution of a wafer comprises a first sensor and a sensor. The first sensor, the second sensor and the wafer are placed in an effective range of a uniform ion implantation current profile. A controller determines the ion dose of each region of the wafer based upon the detected signal from the first sensor and the second sensor. In addition, the controller adjusts the scanning frequency of an ion beam or the movement speed of the wafer to achieve a uniform ion distribution on the wafer.

公开(公告)号：US20130297259A1

公开(公告)日：2013-11-07

申请号：US13533630

申请日：2012-06-26

Applicant: Shiao-Li TSAO ,  Ming-Chun LIN ,  Yung-Chi CHEN

Inventor： Shiao-Li TSAO ,  Ming-Chun LIN ,  Yung-Chi CHEN

IPC: G06F19/00

CPC classification number: G01D4/004 ,  Y02B90/242 ,  Y02B90/244 ,  Y02B90/245 ,  Y02B90/246 ,  Y04S20/322 ,  Y04S20/327 ,  Y04S20/38 ,  Y04S20/40 ,  Y04S20/42

Abstract: A system and method of appropriate services detection for a smart building are disclosed in the present invention. The invention may select appropriate services for a house or a building. After a user lives in a smart building with the system of the present invention for a period of time, the system uses the service gateway to collect and analyze environment information and appliance information so as to find relationship within appliances, sensors and actuators. Thus the cloud service platform selects appropriate services for the building to avoid downloading or installing an inappropriate service by a user. Further the cloud service platform may suggest a user buying additional equipment for matching the requirement of a service. The system of the present invention may learn a relationship of devices; locate positions of devices; and automatically collect state data of appliances to identify the appliances.

Abstract translation: 在本发明中公开了一种用于智能建筑物的适当服务检测的系统和方法。 本发明可以为房屋或建筑物选择合适的服务。 在用户通过本发明的系统住在智能建筑中一段时间​​后，系统使用服务网关来收集和分析环境信息和设备信息，以便在电器，传感器和执行器内找到关系。 因此，云服务平台为建筑物选择合适的服务，以避免用户下载或安装不合适的服务。 此外，云服务平台可能建议用户购买附加设备以匹配服务的要求。 本发明的系统可以学习设备的关系; 定位设备的位置; 并自动收集电器的状态数据，以识别电器。

公开(公告)号：US08576258B2

公开(公告)日：2013-11-05

申请号：US12639835

申请日：2009-12-16

Applicant: Tzong-Kwei Chen ,  Chun-Lin Shen ,  Yi-Chen Liu ,  Chen-Ting Kuan

Inventor： Tzong-Kwei Chen ,  Chun-Lin Shen ,  Yi-Chen Liu ,  Chen-Ting Kuan

IPC: G09G5/10

CPC classification number: G09G3/22 ,  G09G2320/02 ,  G09G2320/0285 ,  G09G2320/048 ,  G09G2330/12 ,  G09G2360/16

Abstract: For improving the brightness decay of a display due to its aging, a non-volatile memory such as Flash can be used to store a brightness accumulation value of each point of the display, and each point can be compensated for its brightness accordingly. However, the non-volatile memory suffers from incorrect write-in data or temporary power disconnection, and thus the error will exist all the time to make the display non-even. Hence, the present invention uses a multiple data backups and CRC error detection, plus new/old data comparison to protect data the non-volatile memory from incorrect brightness compensation value so as to uniform the brightness of the display.

Abstract translation: 为了改善由于老化引起的显示器的亮度衰减，可以使用诸如闪存的非易失性存储器来存储显示器的每个点的亮度累积值，并且可以相应地补偿每个点的亮度。 然而，非易失性存储器存在不正确的写入数据或临时电源断开，因此该错误将一直存在以使显示不均匀。 因此，本发明使用多重数据备份和CRC错误检测，加上新旧数据比较，以保护非易失性存储器的数据免受不正确的亮度补偿值，从而使显示器的亮度均匀。

公开(公告)号：US08575694B2

公开(公告)日：2013-11-05

申请号：US13372037

申请日：2012-02-13

Applicant: Ker Hsiao Huo ,  Chih-Chang Cheng ,  Ru-Yi Su ,  Jen-Hao Yeh ,  Fu-Chih Yang ,  Chun Lin Tsai

Inventor： Ker Hsiao Huo ,  Chih-Chang Cheng ,  Ru-Yi Su ,  Jen-Hao Yeh ,  Fu-Chih Yang ,  Chun Lin Tsai

IPC: H01L29/66 ,  H01L29/786 ,  H01L29/02 ,  H01L23/58 ,  H01L21/70 ,  H01L21/336 ,  H01L21/8238

CPC classification number: H01L29/7394 ,  H01L21/26533 ,  H01L21/76243 ,  H01L21/76283 ,  H01L29/063 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0865 ,  H01L29/0882 ,  H01L29/1083 ,  H01L29/1087 ,  H01L29/1095 ,  H01L29/42368 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/4975 ,  H01L29/66325 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/7816 ,  H01L29/7824 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A high voltage metal-oxide-semiconductor laterally diffused device (HV LDMOS), particularly an insulated gate bipolar junction transistor (IGBT), and a method of making it are provided in this disclosure. The device includes a semiconductor substrate, a gate structure formed on the substrate, a source and a drain formed in the substrate on either side of the gate structure, a first doped well formed in the substrate, and a second doped well formed in the first well. The gate, source, second doped well, a portion of the first well, and a portion of the drain structure are surrounded by a deep trench isolation feature and an implanted oxygen layer in the silicon substrate.

公开(公告)号：US20130285636A1

公开(公告)日：2013-10-31

申请号：US13600531

申请日：2012-08-31

Applicant: Kuo-Sen KUNG ,  Chun-Hao Tu ,  Ren-Hong Jhan ,  Wei-Cheng Wu ,  Ya-Zhi Hsiao ,  Ting-Chun Lin ,  Jen-Pei Tseng ,  Yu-Jung Liu ,  Jiun-Jye Chang

Inventor： Kuo-Sen KUNG ,  Chun-Hao Tu ,  Ren-Hong Jhan ,  Wei-Cheng Wu ,  Ya-Zhi Hsiao ,  Ting-Chun Lin ,  Jen-Pei Tseng ,  Yu-Jung Liu ,  Jiun-Jye Chang

IPC: G05F5/00

CPC classification number: G05F1/67

Abstract: A power tracking device and a power tracking method is disclosed herein. The power tracking device includes a power voltage setting circuit, a switch, a switching signal circuit, and a voltage memory circuit. The switching signal circuit is configured for sending a first control signal to the switch. When the switch receives the first control signal and electrically isolates the power source and the power voltage setting circuit, the voltage memory circuit stores an open circuit voltage of the power source and sends a setting voltage relative to the open circuit voltage, and when the switch receives the first control signal and electrically connects the power source and the power voltage setting circuit, the power voltage setting circuit sets an output voltage of the power source to correspond with the setting voltage.

Abstract translation: 本文公开了功率跟踪装置和功率跟踪方法。 功率跟踪装置包括电源电压设定电路，开关，开关信号电路和电压存储电路。 开关信号电路被配置为向开关发送第一控制信号。 当开关接收到第一控制信号并且电隔离电源和电源电压设置电路时，电压存储电路存储电源的开路电压并发送相对于开路电压的设定电压，并且当开关 接收第一控制信号并电连接电源和电源电压设定电路，电源电压设定电路将电源的输出电压设定为与设定电压对应。

公开(公告)号：US20130272059A1

公开(公告)日：2013-10-17

申请号：US13446250

申请日：2012-04-13

Applicant: Kai-Chun LIN ,  Hung-Chang YU ,  Yue-Der CHIH ,  Chun-Jung LIN

Inventor： Kai-Chun LIN ,  Hung-Chang YU ,  Yue-Der CHIH ,  Chun-Jung LIN

IPC: G11C11/16

CPC classification number: G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C29/74

Abstract: A magnetoresistive memory has first and second magnetic tunnel junction (MTJ) elements operated differentially, each with a pinned magnetic layer and a free magnetic layer that can have field alignments that are parallel or anti-parallel, producing differential high and low resistance states representing a bit cell value. Writing a high resistance state to an element requires an opposite write current polarity through the pinned and free layers, and differential operation requires that the two MTJ elements be written to different resistance states. One aspect is to arrange or connect the layers in normal and reverse order relative to a current bias source, thereby achieving opposite write current polarities relative to the layers using the same current polarity relative to the current bias source. The differentially operated MTJ elements can supplement or replace single MTJ elements in a nonvolatile memory bit cell array.

Abstract translation: 磁阻存储器具有差分地操作的第一和第二磁性隧道结（MTJ）元件，每个具有钉扎磁性层和可以具有并联或反平行的场对准的自由磁性层，产生表示 位单元格值。 向元件写入高电阻状态需要通过固定和自由层的相反的写入电流极性，并且差分操作要求将两个MTJ元件写入不同的电阻状态。 一个方面是相对于电流偏置源以正常和相反的顺序布置或连接层，从而相对于使用相对于电流偏置源的相同电流极性的层获得相反的写入电流极性。 差分操作的MTJ元件可以补充或替代非易失性存储器位单元阵列中的单个MTJ元件。