利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

97 条记录 (耗时 0.021 秒)

    Gate structures of a non-volatile memory device and methods of manufacturing the same
    31.
    发明申请
    Gate structures of a non-volatile memory device and methods of manufacturing the same 有权
    非易失性存储器件的门结构及其制造方法

    公开(公告)号：US20060220106A1

    公开(公告)日：2006-10-05

    申请号：US11375762

    申请日：2006-03-15

    申请人： Han-Mei Choi ,  Kyoung-Ryul Yoon ,  Seung-Hwan Lee ,  Ki-Yeon Park ,  Young-Sun Kim

    发明人： Han-Mei Choi ,  Kyoung-Ryul Yoon ,  Seung-Hwan Lee ,  Ki-Yeon Park ,  Young-Sun Kim

    IPC分类号： H01L29/792

    CPC分类号： H01L29/792 ,  H01L29/513

    摘要： In a gate structure of a non-volatile memory device is formed, a tunnel insulating layer and a charge trapping layer are formed on a substrate. A composite dielectric layer is formed on the charge trapping layer and has a laminate structure in which first material layers including aluminum oxide and second material layers including hafnium oxide or zirconium oxide are alternately stacked. A conductive layer is formed on the composite dielectric layer and then a gate structure is formed by patterning the conductive layer, the composite dielectric layer, the charge trapping layer, and the tunnel insulating layer.

    摘要翻译： 在形成非易失性存储器件的栅极结构中，在衬底上形成隧道绝缘层和电荷俘获层。 在电荷捕获层上形成复合电介质层，并且具有层叠结构，其中包括氧化铝的第一材料层和包括氧化铪或氧化锆的第二材料层交替堆叠。 在复合电介质层上形成导电层，然后通过图案化导电层，复合介电层，电荷俘获层和隧道绝缘层形成栅极结构。

    Semiconductor memory device and method of manufacturing the semiconductor memory device
    32.
    发明申请
    Semiconductor memory device and method of manufacturing the semiconductor memory device 有权
    半导体存储器件及半导体存储器件的制造方法

    公开(公告)号：US20060138523A1

    公开(公告)日：2006-06-29

    申请号：US11311143

    申请日：2005-12-20

    申请人： Jong-Cheol Lee ,  Jae-Hyoung Choi ,  Han-Mei Choi ,  Gab-Jin Nam ,  Young-Sun Kim

    发明人： Jong-Cheol Lee ,  Jae-Hyoung Choi ,  Han-Mei Choi ,  Gab-Jin Nam ,  Young-Sun Kim

    IPC分类号： H01L29/788

    CPC分类号： H01L27/11521 ,  H01L27/115 ,  H01L29/513 ,  H01L29/7881

    摘要： Example embodiments of the present invention disclose a non-volatile semiconductor memory device, which may include a dielectric layer having an enhanced dielectric constant. A tunnel oxide layer pattern and a floating gate may be sequentially formed on a substrate. A dielectric layer pattern including metal oxide doped with Group III transition metals may be formed on the floating gate using a pulsed laser deposition process. The dielectric layer pattern having an increased dielectric constant may be formed of metal oxide doped with a transition metal such as scandium, yttrium, or lanthanum.

    摘要翻译： 本发明的示例实施例公开了一种非易失性半导体存储器件，其可以包括具有增强介电常数的介电层。 可以在衬底上依次形成隧道氧化物层图案和浮栅。 可以使用脉冲激光沉积工艺在浮栅上形成包括掺杂有III族过渡金属的金属氧化物的电介质层图案。 具有增加的介电常数的电介质层图案可以由掺杂有过渡金属如钪，钇或镧的金属氧化物形成。

    Method for forming a multi-layered structure of a semiconductor device and methods for forming a capacitor and a gate insulation layer using the multi-layered structure
    33.
    发明授权
    Method for forming a multi-layered structure of a semiconductor device and methods for forming a capacitor and a gate insulation layer using the multi-layered structure 失效
    用于形成半导体器件的多层结构的方法以及使用该多层结构形成电容器和栅极绝缘层的方法

    公开(公告)号：US06989338B2

    公开(公告)日：2006-01-24

    申请号：US10737394

    申请日：2003-12-15

    申请人： Han-Mei Choi ,  Young-Wook Park ,  Eun-Taek Yim ,  Dong-Jo Kang ,  Kyoung-Seok Kim

    发明人： Han-Mei Choi ,  Young-Wook Park ,  Eun-Taek Yim ,  Dong-Jo Kang ,  Kyoung-Seok Kim

    IPC分类号： H01L21/26

    CPC分类号： H01L21/28194 ,  H01L29/513 ,  H01L29/517

    摘要： Disclosed is a method for forming a multi-layered structure having at least two films on a semiconductor substrate. The substrate is disposed on a thermally conductible stage for supporting the substrate. After the distance between the stage and the substrate is adjusted to a first interval so that the substrate has a first temperature by heat transferred from the stage, a first thin film is formed on the substrate at the first temperature. The distance is then adjusted from the first interval to a second interval so that the substrate reaches a second temperature, and then a second thin film is formed on the first thin film at the second temperature, thereby forming the multi-layered structure on the substrate. The multi-layered structure can be employed for a gate insulation film or the dielectric film of a capacitor.

    摘要翻译： 公开了一种在半导体衬底上形成至少具有两个膜的多层结构的方法。 基板设置在用于支撑基板的导热性台上。 在阶段和衬底之间的距离被调整到第一间隔，使得衬底具有通过从载物台传递的热量的第一温度，在第一温度下在衬底上形成第一薄膜。 然后将距离从第一间隔调整到第二间隔，使得衬底达到第二温度，然后在第二温度下在第一薄膜上形成第二薄膜，从而在衬底上形成多层结构 。 多层结构可以用于栅极绝缘膜或电容器的电介质膜。

    Method for fabricating nonvolatile memory device
    36.
    发明授权
    Method for fabricating nonvolatile memory device 有权
    非易失性存储器件的制造方法

    公开(公告)号：US08735247B2

    公开(公告)日：2014-05-27

    申请号：US13204349

    申请日：2011-08-05

    申请人： Dong-Chul Yoo ,  Ki-Hyun Hwang ,  Han-Mei Choi ,  Jin-Gyun Kim

    发明人： Dong-Chul Yoo ,  Ki-Hyun Hwang ,  Han-Mei Choi ,  Jin-Gyun Kim

    IPC分类号： H01L21/336 ,  H01L21/4763 ,  H01L29/76

    CPC分类号： H01L27/11578 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

    摘要： A method for fabricating a nonvolatile memory device is disclosed. The method includes forming a first structure for a common source line on a semiconductor substrate, the first structure extending along a first direction, forming a mold structure by alternately stacking a plurality of sacrificial layers and a plurality of insulating layers on the semiconductor substrate, forming a plurality of openings in the mold structure exposing a portion of the first structure, and forming a first memory cell string at a first side of the first structure and a second memory cell string at a second, opposite side of the first structure. The plurality of openings include a first through-hole and a second through-hole, each through-hole passing through the plurality of sacrificial layers and plurality of insulating layers, and the first through-hole and the second through-hole overlap each other in the first direction.

    摘要翻译： 公开了一种用于制造非易失性存储器件的方法。 该方法包括在半导体衬底上形成用于公共源极线的第一结构，第一结构沿着第一方向延伸，通过在半导体衬底上交替堆叠多个牺牲层和多个绝缘层来形成模具结构，形成 所述模具结构中的多个开口露出所述第一结构的一部分，以及在所述第一结构的第一侧形成第一存储单元串，以及在所述第一结构的第二相反侧形成第二存储单元串。 多个开口包括第一通孔和第二通孔，每个通孔穿过多个牺牲层和多个绝缘层，并且第一通孔和第二通孔重叠在一起 第一个方向。

    Method of fabricating nonvolatile memory device
    37.
    发明授权
    Method of fabricating nonvolatile memory device 有权
    制造非易失性存储器件的方法

    公开(公告)号：US08642458B2

    公开(公告)日：2014-02-04

    申请号：US13414085

    申请日：2012-03-07

    申请人： Byung-Hong Chung ,  Young-Hee Kim ,  In-Sun Yi ,  Han-Mei Choi

    发明人： Byung-Hong Chung ,  Young-Hee Kim ,  In-Sun Yi ,  Han-Mei Choi

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76883 ,  H01L21/28273 ,  H01L21/32115 ,  H01L21/76882 ,  H01L27/11521 ,  H01L29/66825

    摘要： A method of fabricating a nonvolatile memory device includes providing an intermediate structure in which a floating gate and an isolation film are disposed adjacent to each other on a semiconductor substrate and a gate insulating film is disposed on the floating gate and the isolation film, forming a conductive film on the gate insulating film, and annealing the conductive film so that part of the conductive film on an upper portion of the floating gate flows down onto a lower portion of the floating gate and an upper portion of the isolation film.

    摘要翻译： 一种制造非易失性存储器件的方法包括提供一种中间结构，其中在半导体衬底上相邻设置浮置栅极和隔离膜，并且栅极绝缘膜设置在浮置栅极和隔离膜上，形成 导电膜，并且使导电膜退火，使得浮栅的上部的导电膜的一部分向下流到浮栅的下部和隔离膜的上部。

    Methods of manufacturing a vertical type semiconductor device
    39.
    发明授权
    Methods of manufacturing a vertical type semiconductor device 有权
    制造垂直型半导体器件的方法

    公开(公告)号：US08426304B2

    公开(公告)日：2013-04-23

    申请号：US13241316

    申请日：2011-09-23

    申请人： Dong-Chul Yoo ,  Chan-Jin Park ,  Ki-Hyun Hwang ,  Han-Mei Choi ,  Joon-Suk Lee

    发明人： Dong-Chul Yoo ,  Chan-Jin Park ,  Ki-Hyun Hwang ,  Han-Mei Choi ,  Joon-Suk Lee

    IPC分类号： H01L21/4763

    CPC分类号： H01L27/11582 ,  H01L27/105 ,  H01L27/11573 ,  H01L27/11575

    摘要： Methods of manufacturing a semiconductor device include forming a stopping layer pattern in a first region of a substrate. A first mold structure is formed in a second region of the substrate that is adjacent the first region. The first mold structure includes first sacrificial patterns and first interlayer patterns stacked alternately. A second mold structure is formed on the first mold structure and the stopping layer pattern. The second mold structure includes second sacrificial patterns and second interlayer patterns stacked alternately. The second mold structure partially covers the stopping layer pattern. A channel pattern is formed and passes through the first mold structure and the second mold structure.

    摘要翻译： 制造半导体器件的方法包括在衬底的第一区域中形成停止层图案。 第一模具结构形成在与第一区域相邻的基板的第二区域中。 第一模具结构包括交替堆叠的第一牺牲图案和第一层间图案。 在第一模具结构和止挡层图案上形成第二模具结构。 第二模具结构包括交替堆叠的第二牺牲图案和第二层间图案。 第二模具结构部分地覆盖止挡层图案。 形成通道图案并通过第一模具结构和第二模具结构。

    Charge-trapping nonvolatile memory devices having gate structures therein with improved blocking layers
    40.
    发明授权
    Charge-trapping nonvolatile memory devices having gate structures therein with improved blocking layers 有权
    电荷捕获其中具有栅极结构的非易失性存储器件具有改进的阻挡层

    公开(公告)号：US08410542B2

    公开(公告)日：2013-04-02

    申请号：US12938006

    申请日：2010-11-02

    申请人： Dong-Chul Yoo ,  Byong-Ju Kim ,  Han-Mei Choi ,  Ki-Hyun Hwang

    发明人： Dong-Chul Yoo ,  Byong-Ju Kim ,  Han-Mei Choi ,  Ki-Hyun Hwang

    IPC分类号： H01L29/792

    CPC分类号： H01L29/42324 ,  G11C16/0416 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/4234 ,  H01L29/513

    摘要： Nonvolatile memory devices include a tunnel insulating layer on a substrate and a charge storing layer on the tunnel insulating layer. A charge transfer blocking layer is provided on the charge storing layer. The charge transfer blocking layer is formed as a composite of multiple layers, which include a first oxide layer having a thickness of about 1 Å to about 10 Å. This first oxide layer is formed directly on the charge storing layer. The charge transfer blocking layer includes a first dielectric layer on the first oxide layer. The charge transfer blocking layer also includes a second oxide layer on the first dielectric layer and a second dielectric layer on the second oxide layer. The first and second dielectric layers have a higher dielectric constant relative to the first and second oxide layers, respectively. The memory cell includes an electrically conductive electrode on the charge transfer blocking layer.

    摘要翻译： 非易失性存储器件包括衬底上的隧道绝缘层和隧道绝缘层上的电荷存储层。 电荷转移阻挡层设置在电荷存储层上。 电荷转移阻挡层形成为多层的复合物，其包括厚度为约至约的第一氧化物层。 该第一氧化物层直接形成在电荷存储层上。 电荷转移阻挡层包括在第一氧化物层上的第一电介质层。 电荷转移阻挡层还包括在第一介电层上的第二氧化物层和第二氧化物层上的第二介电层。 第一和第二电介质层分别相对于第一和第二氧化物层具有更高的介电常数。 存储单元包括电荷转移阻挡层上的导电电极。