公开(公告)号：US06461913B2

公开(公告)日：2002-10-08

申请号：US09882284

申请日：2001-06-18

Applicant: Kwon Hong

Inventor： Kwon Hong

IPC: H01L218242

CPC classification number: H01L28/75 ,  H01L21/28568 ,  H01L27/10855 ,  H01L28/55

Abstract: The present invention provides a semiconductor memory device and a method of preventing the contact between a dielectric layer of a capacitor and a diffusion barrier. The plug to be contacted to an electrode of a capacitor, comprises a diffusion barrier layer and a conducting layer. The conducting layer is formed with a material capable of flowing current when the conducting layer is oxidized. Accordingly, it is possible to prevent the dielectric layer being contacted with the diffusion barrier, there by the leakage current may be reduced, and the capacitance of the capacitor may be increased.

Abstract translation: 本发明提供一种半导体存储器件和一种防止电容器介质层与扩散阻挡层之间接触的方法。 要与电容器的电极接触的插头包括扩散阻挡层和导电层。 当导电层被氧化时，导电层由能够流动电流的材料形成。 因此，可以防止介电层与扩散阻挡层接触，由此漏电流可能降低，并且电容器的电容可能增加。

公开(公告)号：US4820933A

公开(公告)日：1989-04-11

申请号：US139736

申请日：1987-12-30

Applicant: Suk-Kwon Hong ,  Ho-Yol Bang ,  Hyun-Jun Shin

Inventor： Suk-Kwon Hong ,  Ho-Yol Bang ,  Hyun-Jun Shin

IPC: G02F1/133 ,  B60R1/04 ,  B60R1/08 ,  G02F1/13 ,  G09G3/18

CPC classification number: B60R1/088

Abstract: A circuit for controlling a liquid crystal rear-vision mirror is disclosed. The liquid crystal rear-vision mirror is equipped in an automobile to sense the amount of lights incident upon the mirror itself from a headlight of another automobile following behind. When the level of incident lights goes higher than a pre-determined level, the circuit generates a pulse signal of a fixed period to make the liquid crystal shutter properly function so that the amount of said incident light reflecting from the mirror to the driver will be decreased to a level adequate to secure driving safety.

Abstract translation: 公开了一种用于控制液晶后视镜的电路。 液晶后视镜配备在汽车中，以从后面的另一辆汽车的前灯感测入射在镜子本身上的光量。 当入射光的电平高于预定电平时，电路产生固定周期的脉冲信号，以使液晶快门适当地起作用，使得从反射镜向驾驶员反射的入射光的量将为 降低到足以确保驾驶安全的水平。

公开(公告)号：US09003995B2

公开(公告)日：2015-04-14

申请号：US13219325

申请日：2011-08-26

Applicant: Hi-Seok Kang ,  Hee-Chang Kim ,  Se-Eun Kim ,  Sam-Kwon Hong

Inventor： Hi-Seok Kang ,  Hee-Chang Kim ,  Se-Eun Kim ,  Sam-Kwon Hong

IPC: B63B35/44 ,  B63B43/06

CPC classification number: B63B43/06 ,  B63B1/041 ,  B63B35/44 ,  B63B35/4413 ,  B63B39/03 ,  B63B2001/044

Abstract: A floating offshore structure is disclosed. The floating offshore structure, which is for drilling or production, includes a semi-submerged platform body in the shape of a cylinder that is extended vertically above and below the sea level. The platform body is formed with a concave part that reduces its cross-sectional area. The concave part is discontinuously formed along an external circumferential surface of the platform body. The depth of submergence of the platform body is adjusted so that the water line is located at the concave part in an extreme marine condition.

Abstract translation: 公开了一种浮式海上结构。 用于钻井或生产的浮式海上结构包括垂直于海平面上方和下方延伸的圆柱形的半潜式平台体。 平台体形成有减小其横截面面积的凹部。 凹部沿着平台体的外周面不连续地形成。 调整平台体的淹没深度，使得水线位于极端海洋状态的凹部处。

公开(公告)号：US09000509B2

公开(公告)日：2015-04-07

申请号：US13403065

申请日：2012-02-23

Applicant: Ki-Hong Lee ,  Kwon Hong ,  Dae-Gyu Shin

Inventor： Ki-Hong Lee ,  Kwon Hong ,  Dae-Gyu Shin

IPC: H01L29/792 ,  H01L29/78 ,  H01L29/772 ,  H01L21/28 ,  H01L27/115 ,  H01L29/66

CPC classification number: H01L21/28282 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

Abstract: A nonvolatile memory device includes a pipe gate having a pipe channel hole; a plurality of interlayer insulation layers and a plurality of gate electrodes alternately stacked over the pipe gate; a pair of columnar cell channels passing through the interlayer insulation layers and the gate electrodes and coupling a pipe channel formed in the pile channel hole; a first blocking layer and a charge trapping and charge storage layer formed on sidewalls of the columnar cell channels; and a second blocking layer formed between the first blocking layer and the plurality of gate electrodes.

Abstract translation: 非易失性存储装置包括具有管道通道孔的管道浇口; 多个层间绝缘层和交替层叠在管栅上的多个栅电极; 一对穿过层间绝缘层和栅电极的柱状电池通道，并且耦合形成在通道孔中的管道; 第一阻挡层和形成在柱状细胞通道的侧壁上的电荷俘获和电荷存储层; 以及形成在第一阻挡层和多个栅电极之间的第二阻挡层。

公开(公告)号：US08847300B2

公开(公告)日：2014-09-30

申请号：US12640491

申请日：2009-12-17

Applicant: Sung-Jin Whang ,  Moon-Sig Joo ,  Kwon Hong ,  Jung-Yeon Lim ,  Won-Kyu Kim ,  Bo-Min Seo ,  Kyoung-Eun Chang

Inventor： Sung-Jin Whang ,  Moon-Sig Joo ,  Kwon Hong ,  Jung-Yeon Lim ,  Won-Kyu Kim ,  Bo-Min Seo ,  Kyoung-Eun Chang

IPC: H01L29/76 ,  H01L29/788 ,  H01L27/108 ,  H01L29/423 ,  H01L21/28 ,  H01L23/00 ,  H01L21/321 ,  H01L29/41

CPC classification number: H01L21/28518 ,  H01L21/28273 ,  H01L21/28282 ,  H01L21/321 ,  H01L21/7685 ,  H01L24/02 ,  H01L27/10873 ,  H01L29/413 ,  H01L29/42324 ,  H01L29/513 ,  H01L29/7881 ,  H01L2224/0401 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01073 ,  H01L2924/04941 ,  H01L2924/12032 ,  H01L2924/00

Abstract: A semiconductor device including a conductive layer, a diffusion barrier layer formed over the conductive layer, including a refractory metal compound, and acquired after a surface treatment, and a metal silicide layer formed over the diffusion barrier layer. The adhesion between a diffusion barrier layer and a metal silicide layer may be improved by increasing the surface energy of the diffusion barrier layer through a surface treatment. Therefore, although the metal silicide layer is fused in a high-temperature process, it is possible to prevent a void from being caused at the interface between the diffusion barrier layer and the metal silicide layer. Moreover, it is possible to increase the adhesion between a conductive layer and the diffusion barrier layer by increasing the surface energy of the conductive layer through the surface treatment.

Abstract translation: 一种半导体器件，包括导电层，形成在导电层上的扩散阻挡层，包括难熔金属化合物，并在表面处理之后获得，以及形成在扩散阻挡层上的金属硅化物层。 通过表面处理增加扩散阻挡层的表面能，可以改善扩散阻挡层和金属硅化物层之间的粘合性。 因此，尽管金属硅化物层在高温工艺中熔合，但是可以防止在扩散阻挡层和金属硅化物层之间的界面处产生空隙。 此外，通过表面处理增加导电层的表面能，可以增加导电层与扩散阻挡层之间的粘合性。

公开(公告)号：US08654579B2

公开(公告)日：2014-02-18

申请号：US13298591

申请日：2011-11-17

Applicant: Beom Yong Kim ,  Kwon Hong ,  Kee Jeung Lee ,  Ki Hong Lee

Inventor： Beom Yong Kim ,  Kwon Hong ,  Kee Jeung Lee ,  Ki Hong Lee

IPC: G11C11/40 ,  H01L29/792

CPC classification number: H01L27/11524 ,  G11C16/14 ,  G11C16/28 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11582

Abstract: A non-volatile memory device includes a plurality of memory cells stacked along a channel protruded from a substrate, a first select transistor connected to one end of the plurality of memory cells, a first interlayer dielectric layer for being coupled between a source line and the first select transistor, and a second interlayer dielectric layer disposed between the first select transistor and the one end of the plurality of memory cells, and configured to include a first recess region.

Abstract translation: 非易失性存储器件包括沿着从衬底突出的通道堆叠的多个存储器单元，连接到多个存储器单元的一端的第一选择晶体管，用于耦合在源极线与源极之间的第一层间电介质层 第一选择晶体管和设置在第一选择晶体管和多个存储单元的一端之间的第二层间电介质层，并且被配置为包括第一凹部区域。

公开(公告)号：US08637919B2

公开(公告)日：2014-01-28

申请号：US13310329

申请日：2011-12-02

Applicant: Ki-Hong Lee ,  Kwon Hong ,  Beom-yong Kim

Inventor： Ki-Hong Lee ,  Kwon Hong ,  Beom-yong Kim

IPC: H01L29/792 ,  H01L21/336

CPC classification number: H01L27/11578 ,  H01L27/11575 ,  H01L27/11582

Abstract: A nonvolatile memory device includes a channel protruding in a vertical direction from a substrate, a plurality of interlayer dielectric layers and gate electrode layers which are alternately stacked over the substrate along the channel, and a memory layer formed between the channel and a stacked structure of the interlayer dielectric layers and gate electrode layers. Two or more gate electrode layers of the plurality of gate electrode layers are coupled to an interconnection line to form a selection transistor.

Abstract translation: 非易失性存储器件包括沿着垂直方向从衬底突出的沟道，多个层间电介质层和栅极电极层，沿着沟道交替堆叠在衬底上;以及存储层，形成在沟道和层叠结构之间 层间电介质层和栅电极层。 多个栅电极层中的两个或多个栅电极层耦合到互连线以形成选择晶体管。

公开(公告)号：US20130294299A1

公开(公告)日：2013-11-07

申请号：US13980833

申请日：2012-01-18

Applicant: Dong Hyun Park ,  Chang Kyu Yoob ,  Sung Kwon Hong

Inventor： Dong Hyun Park ,  Chang Kyu Yoob ,  Sung Kwon Hong

IPC: H04W72/04

CPC classification number: H04W72/0406 ,  H04L1/0041 ,  H04L1/0057 ,  H04L1/0073 ,  H04L1/1621 ,  H04L5/001 ,  H04L5/0055 ,  H04L27/2636 ,  H04L2001/125

Abstract: The present invention relates to a method and apparatus for processing a HARQ ACK/NACK signal. The method for processing a HARQ ACK/NACK signal according to the present invention comprises the following steps: bundling predetermined HARQ ACK/NACK signals from among a plurality of HARQ ACK/NACK signals; ordering transmission-object HARQ ACK/NACK signal including the bundled HARQ ACK/NACK signals; segmenting the ordered transmission-object HARQ ACK/NACK signals; and channel-coding the segmented transmission object HARQ ACK/NACK signals according to the ordered sequence. The method for processing a HARQ ACK/NACK signals according to the present invention may be performed in a terminal which transmits a HARQ ACK/NACK signal through a PUCCH format 3 in a TDD (Time Division Duplex) environment.

Abstract translation: 本发明涉及用于处理HARQ ACK / NACK信号的方法和装置。 根据本发明的用于处理HARQ ACK / NACK信号的方法包括以下步骤：从多个HARQ ACK / NACK信号中捆绑预定的HARQ ACK / NACK信号; 排序包含捆绑的HARQ ACK / NACK信号的发送对象HARQ ACK / NACK信号; 分割有序传输对象HARQ ACK / NACK信号; 并根据有序序列对分段发送对象HARQ ACK / NACK信号进行信道编码。 根据本发明的用于处理HARQ ACK / NACK信号的方法可以在TDD（时分双工）环境中通过PUCCH格式3发送HARQ ACK / NACK信号的终端中执行。

公开(公告)号：US08456909B2

公开(公告)日：2013-06-04

申请号：US13308972

申请日：2011-12-01

Applicant: Ki-Hong Lee ,  Kwon Hong ,  Min-Soo Kim

Inventor： Ki-Hong Lee ,  Kwon Hong ,  Min-Soo Kim

IPC: G11C16/04

CPC classification number: H01L27/11565 ,  H01L27/11575 ,  H01L27/11582 ,  H01L29/7926

Abstract: Provided are a nonvolatile memory device and a method for fabricating the same, which can secure the structural stability of a three-dimensional nonvolatile memory device. The nonvolatile memory device includes one or more columnar channel plugs, a plurality of word lines and a plurality of dielectric layers stacked alternately to surround the columnar channel plug, a memory layer disposed between the word line and the columnar channel plug, a plurality of word line connection portions, each of the word line connection portions connecting ends of word lines of a common layer from among the plurality of word lines, and a plurality of word line extension portions extending from the word line connection portions.

Abstract translation: 提供一种非易失性存储器件及其制造方法，其可以确保三维非易失性存储器件的结构稳定性。 非易失性存储装置包括一个或多个柱状通道插头，多个字线和多个电介质层，交替堆叠以包围柱状通道插头，设置在字线和柱状通道插头之间的存储层，多个字 每个字线连接部分从多个字线中连接公共层的字线的端部，以及从字线连接部分延伸的多个字线延伸部分。

公开(公告)号：US08349689B2

公开(公告)日：2013-01-08

申请号：US12850765

申请日：2010-08-05

Applicant: Ki-Hong Lee ,  Moon-Sig Joo ,  Kwon Hong

Inventor： Ki-Hong Lee ,  Moon-Sig Joo ,  Kwon Hong

IPC: H01L21/336 ,  H01L21/8247

CPC classification number: H01L29/792 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

Abstract: A non-volatile memory device includes a pair of columnar cell channels vertically extending from a substrate, a doped pipe channel arranged to couple lower ends of the pair of columnar cell channels, insulation layers over the substrate in which the doped pipe channel is buried, memory layers arranged to surround side surfaces of the columnar cell channels, and control gate electrodes arranged to surround the memory layers.

Abstract translation: 非易失性存储器件包括从衬底垂直延伸的一对柱状单元通道，布置成耦合该对柱状单元通道的下端的掺杂管道，在其上埋入掺杂管道的衬底上的绝缘层， 布置成围绕柱状单元通道的侧表面的存储层以及布置成围绕存储层的控制栅电极。